MAC97A6 SYC | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 8
Technical content
Features
- One−Piece, Injection−Molded Package
- Blocking V oltage to 600 V olts
- Sensitive Gate Triggering in Four Trigger Modes (Quadrants) for all possible Combinations of Trigger Sources, and especially for Circuits that Source Gate Drives
- All Diffused and Glassivated Junctions for Maximum Uniformity of Parameters and Reliability
- Pb−Free Packages are Available* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive Off-State Voltage (TJ = −40 to +110°C) (Note 1) Sine Wave 50 to 60 Hz, Gate Open MAC97A4 MAC97A6 MAC97A8 VDRM, VRRM 200 400 600 V On-State RMS Current Full Cycle Sine Wave 50 to 60 Hz (TC = +50°C) IT(RMS) 0.6 A Peak Non−Repetitive Surge Current One Full Cycle, Sine Wave 60 Hz (TC = 110°C) ITSM 8.0 A Circuit Fusing Considerations (t = 8.3 ms) I2t 0.26 A2s Peak Gate Voltage VGM 5.0 V Peak Gate Power PGM 5.0 W Average Gate Power (TC = 80°C, t /C0118 8.3 ms) PG(AV) 0.1 W Peak Gate Current IGM 1.0 A Operating Junction Temperature Range TJ −40 to +110 °C Storage Temperature Range Tstg −40 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. V DRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. TRIACS
0.8 AMPERE RMS
Preferred devices are recommended choices for future use and best overall value. See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
G MT2 TO−92 (TO−226AA) CASE 029 STYLE 12 PIN ASSIGNMENT Gate Main Terminal 2 Main Terminal 1 http://onsemi.com MAC 97Ax AYWW/C0071 /C0071 MAC97Ax = Device Code x = 4, 6, or 8 A = Assembly Location Y = Year WW = Work Week /C0071 = Pb−Free Package (Note: Microdot may be in either location) MARKING DIAGRAMS
http://onsemi.com THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case R/C0113JC 75 °C/W Thermal Resistance, Junction−to−Ambient R/C0113JA 200 °C/W Maximum Lead Temperature for Soldering Purposes for 10 Seconds TL 260 °C ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) T J = 25°C TJ = +110°C IDRM, IRRM 100 /C0109A /C0109A ON CHARACTERISTICS Peak On−State Voltage (ITM = /C0034.85 A Peak; Pulse Width /C0118 2.0 ms, Duty Cycle /C0118 2.0%) VTM − − 1.9 V Gate Trigger Current (Continuous dc) (VD = 12 Vdc, RL = 100 /C0087) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) MT2(−), G(+) IGT 5.0 5.0 5.0 7.0 mA Gate Trigger Voltage (Continuous dc) (VD = 12 Vdc, RL = 100 /C0087) MT2(+), G(+) All Types MT2(+), G(−) All Types MT2(−), G(−) All Types MT2(−), G(+) All Types VGT .66 .77 .84 .88 2.0 2.0 2.0 2.5 V Gate Non−Trigger Voltage (VD = 12 V, RL = 100 /C0087, TJ = 110°C) All Four Quadrants VGD 0.1 − − V Holding Current (VD = 12 Vdc, Initiating Current = 200 mA, Gate Open) IH − 1.5 10 mA Turn-On Time D = Rated VDRM, ITM = 1.0 A pk, IG = 25 mA) tgt − 2.0 − /C0109s DYNAMIC CHARACTERISTICS Critical Rate−of−Rise of Commutation Voltage (VD = Rated VDRM, ITM = .84 A, Commutating di/dt = .3 A/ms, Gate Unenergized, T C = 50°C) dV/dt(c) − 5.0 − V//C0109s Critical Rate of Rise of Off−State Voltage (VD = Rated VDRM, TC = 110°C, Gate Open, Exponential Waveform dv/dt − 25 − V//C0109s
http://onsemi.com + Current + Voltage VTM IH Symbol Parameter VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current Voltage Current Characteristic of Triacs (Bidirectional Device) IDRM at VDRM on state off state IRRM at VRRM Quadrant 1 MainTerminal 2 + Quadrant 3 MainTerminal 2 − VTM IH VTM Maximum On State Voltage IH Holding Current MT1 (+) IGT GATE (+) MT2 REF MT1 (−) IGT GATE (+) MT2 REF MT1 (+) IGT GATE (−) MT2 REF MT1 (−) IGT GATE (−) MT2 REF MT2 NEGATIVE (Negative Half Cycle) MT2 POSITIVE (Positive Half Cycle) Quadrant III Quadrant IV Quadrant II Quadrant I Quadrant Definitions for a Triac IGT − + IGT All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used.
Figure 11. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Voltage (dV/dt)c
200 VRMS
Note: Component values are for verification of rated (dv/dt) c. See AN1048 for additional information. Specifications Brochure, BRD8011/D.
Figure 12. Device Positioning on Tape
- Maximum alignment deviation between leads not to be greater than 0.2 mm.
- Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm.
- Component lead to tape adhesion must meet the pull test requirements.
- Maximum non−cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches.
- Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive.
- No more than 1 consecutive missing component is permitted.
- A tape trailer and leader, having at least three feed holes is required before the first and after the last component.
- Splices will not interfere with the sprocket feed holes.
http://onsemi.com PACKAGE DIMENSIONS TO−92 (TO−226AA) CASE 029−11 ISSUE AL NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. R A P J L B K G H SECTION X−X CV D N N XX SEATING PLANE DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.175 0.205 4.45 5.20 B 0.170 0.210 4.32 5.33 C 0.125 0.165 3.18 4.19 D 0.016 0.021 0.407 0.533 G 0.045 0.055 1.15 1.39 H 0.095 0.105 2.42 2.66 J 0.015 0.020 0.39 0.50 N 0.080 0.105 2.04 2.66 STYLE 12: PIN 1. MAIN TERMINAL 1 2. GATE 3. MAIN TERMINAL 2 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 MAC97/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.