K1567 VBSEMI | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 8

Technical content

N-Channel 650V (D-S) Power MOSFET

FEATURES

  • Low figure-of-merit (FOM) Ron x Qg
  • Low input capacitance (Ciss)
  • Reduced switching and conduction losses
  • Ultra low gate charge (Qg)
  • Avalanche energy rated (UIS)

APPLICATIONS

  • Server and telecom power supplies
  • Switch mode power supplies (SMPS)
  • Power factor correction power supplies (PFC)
  • Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting
  • Industrial Notes a. Repetitive rating; puls e width limited by maximum junction temperature. b. V DD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 4.5 A. c. 1.6 mm from case. d. ISD ≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C. PRODUCT SUMMARY 65VDS (V) at TJ max. 0 RDS(on) at 25 °C (Ω) VGS = 10 V Qg max. (nC) 43 Qgs (nC) 5 Qgd (nC) 22 Configuration Single N-Channel MOSFET G D S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage VDS 650 V Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) TCVGS at 10 V = 25 °C ID TC A = 100 °C 9.4 Pulsed Drain Current a IDM 45 Linear Derating Factor 3.6 W/°C Single Pulse Avalanche Energy b EAS mJ Maximum Power Dissipation PD W Operating Junction and Storage Temperature Range TJ, Tstg -55 to +150 °C TJDrain-Source Voltage Slope = 125 °C dV/dt V/ns4.Reverse Diode dV/dt d 1 Soldering Recommendations (Peak Temperature) c for 10 s 300 °C G D S TO-220 FULLPAK Top View 0.6 www.VBsemi.com g K1567-VB 290

a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. C oss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum Junction-to-Ambient -6RthJA 0 °C/WMaximum Junction-to-Case (Drain) RthJC -0 .8 SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VGS = 0 V, IDVDS = 250 μA 650 - - V ΔVDS/TVDS Temperature Coefficient J -0 .7Reference to 25 °C, ID = 1 mA 5 - V/°C Gate-Source Threshold Voltage (N) VGS(th) VDS = VGS, ID = 250 μA 3 - 5 V Gate-Source Leakage VGS IGSS = ± 20 V - - ± 100 nA VGS = ± 30 V μ- - ± 1 A Zero Gate Voltage Drain Current VDS = 650 V, VGS IDSS = 0 V - - 1 μA VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 10 Drain-Source On-State Resistance VGSRDS(on) = 10 V ID = 8 A - Ω Forward Transconductance VDS = 30 V, IDgfs = 8 A - 16 - S Dynamic Input Capacitance Ciss VGS = 0 V, VDS = 100 V, f = 1 MHz - - pF Output Capacitance Coss - - Reverse Transfer Capacitance Crss - - Effective Output Capacitance, Energy Related a Co(er) VDS = 0 V to 520 V, VGS = 0 V -6 3- Effective Output Capacitance, Time Related b Co(tr) - 213 - Total Gate Charge Qg VGS = 10 V ID = 8 A, VDS = 520 V 3 96 Gate-Sou nCrce Charge Qgs - Gate-Drain Charge Qgd -2 2- Turn-On Delay Time td(on) VDD = 520 V, ID = 8 A, VGS = 10 V, Rg = 9.1 Ω -1 3 2 5 Rise T nsime tr -1 1 3 5 Turn-Off Delay Time td(off) -8 1 9 0 Fall Time tf -2 5 4 0 Gate Input Resistance Rg f = 1 MHz, open drain - 3.5 - Ω Drain-Source Body Diode Characteristics MOSFET symbol showing the integral reverse Continuous Source-Drain Diode Current I S p - n junction diode -- 1 5 A Pulsed Diode Forward Current ISM -- 4 0 Diode Forward Voltage VSD TJ = 25 °C, IS = 8 A, VGS = 0 V - - 1.5 V Reverse Recovery Time trr TJ = 25 °C, IF = IS = 8 A, dI/dt = 100 A/μs, VR = 400 V - 345 - ns Reverse Recovery Charge -4 .Qrr 5 - μ C Reverse Recovery Current IRRM -3 5 - A S D G 0. -6 www.VBsemi.com g K1567-VB 300 200

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics Fig. 2 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage ID VDS, Drain-to-Source Voltage (V) , Drain-to-Source Current (A) 0 5 10 15 20 25 30 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9 V 8 V 7 V 6 V BOTTOM 5 V TJ = 25 °C ID VDS, Drain-to-Source Voltage (V) , Drain-to-Source Current (A) 0 5 10 15 20 25 30 TJ = 150 °C 5 V TOP 15 V 14 V 13 V 12 V 11 V 10 V 9 V 8 V 7 V BOTTOM 6 V I VGS, Gate-to-Source Voltage (V) D, Drain-to-Source Current (A) 0 5 10 15 20 25 TJ = 25 °C TJ = 150 °C VDS = 30.8 V TJ, Junction Temperature (°C) - 60 - 40 - 20 RDS(on), Drain-to-Source 0 20 40 60 80 100 120 140 160 On Resistance (Normalized) 0.5 1.5 2.5 VGS = 10 V ID = 8 A VDS, Drain-to-Source Voltage (V) Capacitance (pF) 1200 600 0 200 400 2400 1800 100 300 500 600 Ciss Coss Crss VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Crss = Cgd Coss = Cds + C Shorted gd ġ ġ VGS, Gate-to-Source Voltage (V)16 0 20 40 60 80 Qg, Total Gate Charge (nC) VDS = 520 V VDS = 325 V VDS = 130 V 100 www.VBsemi.com K1567-VB g

Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Cu Fig. 8 - Maximum Safe Operating Area rrent vs. Case Temperature Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case ISD, Revers VSD, Source-Drain Voltage (V) e Drain Current (A) 0.1 100 TJ = 150 °C TJ = 25 °C VGS = 0 V ID, Drain Current (A) 100 1000 0.01 0.1 1 10 100 1000 VDS - Drain -to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) i s specified Limited by RDS(on)* 1 ms 100 μ 10 ms s Operation in this Area Limited by RDS(on) TC = 25 °C BVDSSTJ = 150 °C Single Pulse Limited IDM = Limited TJ, Case Temperature (°C) ID, Drain Current (A) 25 50 75 100 125 150 VDS TJ, Junction Temperature (°C) Fig. 10 - Temperature vs. Drain-to-Source Voltage , Drain-to-Source Breakdown Voltage (V) - 60 0- 40 - 20 20 40 60 80 100 120 140 160 800 775 750 725 700 675 650 625 600 0.01 0.1 0.0001 0.001 0.1 Normalized Effective Trans ient Thermal Impedance 0.01 Pulse Time (s) Duty Cycle = 0.5 0.2 0.1 0.05 0.02 Single Pulse www.VBsemi.com K1567-VB g

Fig. 12 - Switching Time Test Circuit Fig. 13 - Switching Time Waveforms Fig. 14 - Unclamped Inductive Test Circuit Fig. 16 - Basic Ga Fig. 15 - Unclamped Inductive Waveforms te Charge Waveform Fig. 17 - Gate Charge Test Circuit R Pulse width ≤ 1 µs Duty factor ≤ 0.1 % D VGS RG D.U.T. 10 V V DS - VDD VDS 90 % 10 % VGS td(on) td(off) ttr f R G IAS 0.01 Ωtp D.U.T L VDS - VDD Vary tp to obtain required I 10 V AS V V V IAS DS DD DS tp QGS Q QGD G VG Charge 10 V D.U.T. V V 3 mA GS DS IG 50 k 0.2 µ 0.3 µ ID F F Ω 12 V Current regulator Current sampling resistors Same type as D.U.T. www.VBsemi.com K1567-VB g

Fig. 18 - For N-Channel P.W. Period dI/dt Diode recovery dV/dt Reverse recovery Re-applied Ripple ≤ 5 % Body diode forward drop voltage current Body diode forward VGS = 10 V current a ISD Driver gate drive D.U.T. lSD waveform D.U.T. VDS waveform P.W. Inductor current D = Period Peak Diode Recovery dV/dt Test Circuit  dV/dt controlled by R VDD g  Driver same type as D.U.T.  ISD controlled by duty factor “D” Circuit layout consideration  D.U.T. - device under test D.U.T. s  Low stray inductance  Ground plane  Low leakage inductance current transformer Rg Note a. VGS = 5 V for logic level devices VDD www.VBsemi.com K1567-VB g

TO-220 FULLPAK (HIGH VOLTAGE) Notes 1. To be used only for process drawing. 2. These dimensions apply to all TO-220, FULLPAK leadframe versions 3 leads. 3. All critical dimensions should C meet C pk > 1.33. 4. All dimensions include bur rs and plating thickness. 5. No chipping or package damage. E b n L b b e Ø P D c u V A MILLIMETERS INCHES A 4.570 4.830 0.180 0.190 A1 2.570 2.830 0.101 0.111 A2 2.510 2.850 0.099 0.112 b 0.622 0.890 0.024 0.035 b2 1.229 1.400 0.048 0.055 b3 1.229 1.400 0.048 0.055 c 0.440 0.629 0.017 0.025 D 8.650 9.800 0.341 0.386 d1 15.88 16.120 0.622 0.635 d3 12.300 12.920 0.484 0.509 E 10.360 10.630 0.408 0.419 e 2.54 BSC 0.100 BSC L 13.200 13.730 0.520 0.541 L1 3.100 3.500 0.122 0.138 n 6.050 6.150 0.238 0.242 Ø P 3.050 3.450 0.120 0.136 u 2.400 2.500 0.094 0.098 v 0.400 0.500 0.016 0.020 ECN: X09-0126-Rev. B, 26-Oct-09 DWG: 5972 www.VBsemi.com K1567-VB g

All products due to improve reliability, function or design or for other reasons, product specifications and data are subject to change without notice. Taiwan VBsemi Electronics Co., Ltd., branches, agents, employees, and all persons acting on its or their representatives (collectively, the "Taiwan VBsemi"), assumes no responsibility for any errors, inaccuracies or incomplete data contained in the table or any other any disclosure of any information related to the product.(www.VBsemi.com) Taiwan VBsemi makes no guarantee, representation or warranty on the product for any particular purpose of any goods or continuous production. To the maximum extent permitted by applicable law on Taiwan VBsemi relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability, including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties, including a particular purpose, non-infringement and merchantability guarantee. Statement on certain types of applications are based on knowledge of the product is often used in a typical application of the general product VBsemi Taiwan demand that the Taiwan VBsemi of. Statement on whether the product is suitable for a particular application is non-binding. It is the customer's responsibility to verify specific product features in the products described in the specification is appropriate for use in a particular application. Parameter data sheets and technical specifications can be provided may vary depending on the application and performance over time. All operating parameters, including typical parameters must be made by customer's technical experts validated for each customer application. Product specifications do not expand or modify Taiwan VBsemi purchasing terms and conditions, including but not limited to warranty herein. Unless expressly stated in writing, Taiwan VBsemi products are not intended for use in medical, life saving, or life sustaining applications or any other application. Wherein VBsemi product failure could lead to personal injury or death, use or sale of products used in Taiwan VBsemi such applications using client did not express their own risk. Contact your authorized Taiwan VBsemi people who are related to product design applications and other terms and conditions in writing. The information provided in this document and the company's products without a license, express or implied, by estoppel or otherwise, to any intellectual property rights granted to the VBsemi act or document. Product names and trademarks referred to herein are trademarks of their respective representatives will be all. MaterialCategoryPolicy Taiwan VBsemi Electronics Co., Ltd., hereby certify that all of the products are determined to be RoHS compliant and meets the definition of restrictions under Directive of the European Parliament 2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and electronicequipment(EEE)-modification,unlessotherwisespecifiedasinconsistent.(www.VBsemi.com) PleasenotethatsomedocumentsmaystillrefertoTaiwanVBsemiRoHSDirective2002/95/EC.We confirm that all products identified as consistent with the Directive 2002/95 / EC European Directive 2011/65/. Taiwan VBsemi Electronics Co., Ltd. hereby certify that all of its products comply identified as halogen-free halogen-free standards required by the JEDEC JS709A. Please note that some Taiwanese VBsemi documents still refer to the definition of IEC 61249-2-21, and we are sure that all products conformtoconfirmcompliancewithIEC61249-2-21standardlevelJS709A. www.VBsemi.com K1567-VB