IMP5219 IMP | Alldatasheet
Document overview
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Technical content
N Ultra-Fast response for Fast-20 SCSI applications N Hot swap compatible N 35MHz channel bandwidth N 3.5V operation N Less than 3pF output capacitance N Sleep-mode current less than 375µA N Thermally self limiting N No external compensation capacitors N Implements 8-bit or 16-bit (wide) applications N Compatible with active negation drivers (60ma/channel) N Compatible with passive and active terminations N Approved for use with SCSI 1, 2, 3 and UltraSCSI Block Diagrams Current Biasing Circuit Thermal Limiting Circuit 24mA Current Limiting Circuit Term Power DATA OUTPUT PIN DB (0) 1 of 9 Channels Disable Pin 1.4V 2.85V 5219_01.eps 9-Line SCSI T9-Line SCSI Tererminatminatoror The 9-channel IMP5219 SCSI terminator is part of IMP's family of high- performance SCSI terminators that deliver true UltraSCSI performance. The BiCMOS design offers superior performance over first generation linear regulator/resistor based terminators. IMP's new architecture employs high-speed adaptive elements for each channel, thereby providing the fastest response possible - typically 35MHz, which is 100 times faster than the older linear regulator termi- nator approach. The bandwidth of terminators based on the older regulator/resistor terminator architecture is limited to 500kHz since a large output stabilization capacitor is required. The IMP architecture eliminates the external output compensation capacitor and the need for transient output capacitors while maintaining pin compatibility with first generation designs. Reduced component count is inherent with the IMP5219. The IMP5219 architecture tolerates marginal system designs. A key improvement offered by the IMP5219 lies in its ability to insure reliable, error-free communications even in systems which do not adhere to rec- ommended SCSI hardware design guidelines, such as improper cable lengths and impedance. Frequently, this situation is not controlled by the peripheral or host designer. For portable and configurable peripherals, the IMP5219 can be placed in a sleep mode with an active LOW disable signal. Quiescent current is typically 375µA and output are in a high impedance state when disabled. IMP5IMP5 11111/51/5 111122 D ATA C OMMUNICATIONS IMP52IMP52 1199 D ATA C OMMUNICATIONS Data Communications 1 Daily Silver IMP
Ordering Information
8 GND
1 TERM POWER
9 GND
7 D4 10 D5
6 D3 11 D6
5 D2 12 D7
4 D1 13 D8
3 D0 14 DISABLE
2 NC 15 NC
16 TERM POWER
5219_02.eps IMP5219 SOWB-16
10 GND
11 GND
7 D3 14 D6
8 D4 13 D5
9 NC 12 NC
6 D2 15 NC
5 D1 16 D7
4 D0 17 D8
3 NC 18 NC
2 NC 19 DISABLE
20 TERM POWER
5219_02a.eps IMP5219 TSSOP-20 r e b m u N t r aPe g n a R e r u t a r e p m eTe g a k c a P W D C 9 1 2 5 P MI0 ° 5 2 1 o t C°CB W O S c i t s a l P n i p - 6 1 T W D C 9 1 2 5 P MI0 ° 5 2 1 o t C°CB W O S c i t s a l P n i p - 6 1 , l e e R d n a e p a T W P C 9 1 2 5 P MI0 ° 5 2 1 o t C°CP O S S T c i t s a l P n i p - 0 2 T W P C 9 1 2 5 P MI0 ° 5 2 1 o t C°CP O S S T c i t s a l P n i p - 0 2 , l e e R d n a e p a T 3 t a . 1 0 t _ 9 1 2 5 Thermal Data Note: 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Thermal Resistance Junction-to-Ambient, θ JA Thermal Resistance Junction-to-Ambient, θ JA Junction Temperature Calculation: T J = T A + (P D x θ JA The θ JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the ambient airflow is assumed. IMP5IMP5 11111/51/5 111122 IMP52IMP52 1199 www.ds-imp.com.cn Daily Silver IMP
Recommended Operating Conditions r e t e m a r aPl o b m ySn iMp yTx aMs t i n U e g a t l o V r w p m r eTV M R E T 5 .35 .5V e g a t l o V t u p n I e l b a s i D l e v e L h g iHV H I M R E T V e g a t l o V t u p n I e l b a s i D l e v e L w oLV L I 08 .0V e g n a R e r u t a r e p m e T n o i t c n u J g n i t a r e p O05 21C ° . l a n o i t c n u f s i e c i v e d e h t h c i h w r e v o e g n a r e h t e t a c i d n i s n o i t i d n o c g n i t a r e p o d e d n e m m o c e R . 2 : e t o N s p e . 2 0 t _ 9 1 2 5
Electrical Characteristics
Unless otherwise specified, these specifications apply at an ambient operating temperature of T A = 25°C. TermPwr = 4.75V . Low duty cycle pulse testing techniques are used which maintain junction and case temperatures equal to the ambient temperature. r e t e m a r aPl o b m ySs n o i t i d n oCn iMp yTx aMs t i n U e g a t l o V h g i H t u p t uOV T U O 5 6 .25 8 .2V t n e r r u C y l p p u S r w P m r eTI C C n e p O = s e n i l a t a d l lA6 9 A m V 5 . 0 = s e n i l a t a d l lA5 125 22A m V 8 . 0 < e l b a s iD5 7 3 µA t n e r r u C t u p t uOI T U O V T U O V 5 . 0=1 2– 3 2– 4 2– A m t n e r r u C t u p n I e l b a s iDI N I V 5 7 . 4 = e l b a s iD0 1A n V 0 = e l b a s iD0 9– µA t n e r r u C e g a k a e L t u p t uOI L O V , V 8 . 0 = e l b a s i D O V 5 . 0=0 1A n e d o M d e l b a s i D n i e c n a t i c a p aCC T U O V T U O z H M 1 = y c n e u q e r F , V 0=3 F p h t d i w d n a B l e n n a hCW B5 3z H M l e n n a h C r e p , t n e r r u C k n i S n o i t a n i m r eTI K N I S V T U O V 4=0 6A m s p e . 3 0 t _ 9 1 2 5 IMP5IMP5 11111/51/5 111122 IMP52IMP52 1199 Daily Silver IMP
Application Information
IMP5219 Maximizes Line Current Cable transmission theory suggests to optimize signal speed and quality, the termination should act both as an ideal voltage refer- ence when the line is released (deasserted) and as an ideal current source when the line is active (asserted). Common active terminators which consist of linear regulators in series with resis- tors (typically 110 Ω ) are a compromise. With coventional linear terminators as the line voltage increases the amount of current decreases linearly by the equation; The IMP5219, with its unique new architecture, applies the maxi- mum amount of current regardless of line voltage until the termination high threshold (2.85V) is reached. Acting as a near ideal line terminator, the IMP5219 closely repro- duces the optimum case when the device is enabled. To enable the device the Disable pin must be driven HIGH or left Open. When enabled, quiescent current is 6mA and the device will respond to line demands by delivering 24mA on assertion and by imposing 2.85V on de-assertion. Disable/Sleep Mode Disable mode places the device in a sleep state, where quiescent current typically 375µA. When disabled, all outputs are in a high impedance state and output capacitance is a low 3pF. Sleep mode can be used for power conservation or to remove the terminator from the SCSI chain. An additional feature of the IMP5219 is its compatibility with active negation drivers. Table 1. Power Up/ Power Down Function Table
1 Meter, AWG 28
Figure 1. Receiving Waveform – 20MHz Figure 2. Driving Waveform – 20MHz
Figure 4. Receiving Waveform Figure 5. Driving Waveform
6 Meter, 92Ω
Figure 6. End-Driven Cable
Figure 7. Receiving Waveform Figure 8. Driving Waveform Figure 9. End-Driven Cable Figure 10. 10MHz Waveform Figure 11. 20MHz Waveform
6 Meter, 72Ω
Figure 12. End-Driven Cable
s e h c nIs r e t e m i l l i M n iMx aMn iMx a M ) n i P - 6 1 ( B W O S A3 9 0 .04 0 1 .05 3 .25 6 . 2 1A4 0 0 .02 1 0 .00 1 .00 3 . 0 B3 1 0 .00 2 0 .03 3 .01 5 . 0 C9 0 0 .03 1 0 .03 2 .02 3 . 0 D8 9 3 .03 1 4 .00 1 . 010 5 . 0 1 E1 9 2 .09 9 2 .00 4 .70 6 . 7 eC S B 5 0 .0C S B 7 2 . 1 H4 9 3 .09 1 4 .00 0 . 015 6 . 0 1 L6 1 0 .00 5 0 .00 4 .07 2 . 1 M °0 °8 °0 °8 C L * — 4 0 0 . 0 — 0 1 . 0 ) n i P - 0 2 ( P O S S T A3 3 0 .07 3 0 . 0 — 0 9 . 0 B7 0 0 .02 1 0 .08 1 .00 3 . 0 C5 3 0 0 .08 0 0 .00 9 .00 8 1 . 0 D2 5 2 .00 6 2 .00 4 .60 6 . 6 E9 6 1 .07 7 1 .00 3 .48 4 . 4 FC S B 5 2 0 .0C S B 5 6 . 0 G2 0 0 .05 0 0 .05 0 .05 1 . 0 H — 3 3 4 0 . 0— 0 1 . 1 L0 2 0 .08 2 0 .00 5 .00 7 . 0 M °0 °8 °0 °8 P6 4 2 .06 5 2 .05 2 .60 5 . 6 C L * — 4 0 0 . 0 — 0 1 . 0 y t i r a n a l p o C d a e L * _ _ _ _ _ _ _ _ _ _ _ g n i w a r D C E D E J * 3 t a . 6 0 t _ 8 1 2 5 H E eB D A L M C 16-Pin (SOWB).eps Package Dimensions SOWB (16-Pin) 3 2 1 EP D SEATING PLANE B G A H F E L 20-Pin (TSSOP).eps C M TSSOP (20-Pin) IMP5IMP5 11111/51/5 111122 IMP52IMP52 1199 The IMP logo is a registered trademark of Daily Silver IMP. All other company and product names are trademarks of their respective owners. Daily Silver IMP Microelectronics Co.,Ltd
7 Keda Road , Hi-Tech Park,
NingBo,Zhejiang, P.R.C. Post Code : 315040 Tel:(086)-574-87906358 Fax:(086)-574-87908866 e-mail:sales@ds-imp.com.cn http://www.ds-imp.com.cn
2005 Daily Silver IMP
Revision : A Issue Date: 08 / 08 / 05 Type: Product