IMP2119

IMP2119 IMP | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

N Auto-selectable LVD or single-ended termination N 3.0pF maximum disabled output capacitance N Fast response, no external capacitors required N Compatible with active negation drivers N 15µA supply current in disconnect mode N Logic command disconnects all termination lines N DIFFSENSE line driver N Ground driver integrated for single-ended operation N Current limit and thermal protection N Hot-swap compatible (single-ended) N Compatible with SCSI, SPI-2, SPI-3, SPI-4 ULTRA160 and ULTRA320 N Pin compatible with DS2119 Block Diagram 9-Line UL9-Line ULTRA3 LTRA3 LVD/SEVD/SE SCSI TSCSI Tererminatminatoror The IMP2119 is a multimode SCSI terminator that conforms to the SCSI Parallel Interconnect-2 (SPI-2) specification developed by the T10 stan- dards committee for low voltage differential (LVD) termination. Multimode compatibility permits the use of legacy devices on the bus without hardware alterations. Automatic mode selection is achieved through voltage detection on the diffsense line. The IMP2119 delivers the ultimate in SCSI bus performance while saving component cost and board area. Elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. The indi- vidual high bandwidth drivers also maximize channel separation and reduce channel to channel noise and cross talk. The high bandwidth architecture insures ULTRA3 performance. When the IMP2119 is enabled, the differential sense (DIFFSENSE) pin supplies a voltage between 1.2V and 1.4V . In application, this pin is tied to the DIFFSENSE input of the corresponding LVD transceivers. This action enables the LVD transceiver function. DIFFSENSE is capable of supplying a maximum of 15mA. Tying the DIFFSENSE pin HIGH places the IMP2119 in a high impedance state indicating the presence of an HVD device. Tying the pin LOW places the part in a single-ended mode while also signaling the multimode transceiver to operate in a single- ended mode. Recognizing the needs of portable and configurable peripherals, the IMP2119 have a TTL compatible sleep/disable mode. During this sleep/disable mode, power dissipation is reduced to a meager 15 µA while also placing all outputs in a high impedance state. Also during sleep/disable mode, the DIFFSENSE function is disabled and is placed in a high impedance state. Another key feature of the IMP2119 is the master/slave function. Driving this pin HIGH or floating the pin enables the 1.3V DIFFSENSE reference. Driving the pin LOW dis- ables the on board DIFFSENSE reference and enables use of an external master reference device. Power ON & MODE Delay Internal VREF 1.30V LVD 1.25V 200 52.5 1.07mA 1.07mA 20 52.5 SE 2.2V Power ON Power ON SE 2.85V, 22.5mA Latch SE DISC/HVD LVD SE LVD(-) / SE 1 of 9 LVD(+) / SE (Pseudo-GND) SE HVD LVD HVD DIFF_CAP DIFFSENSE M/S ISO TPWR LVD Window Comp. LVD SE 10mA HVD 20kΩ MODE Control & Delay 5241/42 01 eps IMP2IMP2 111199IMP2IMP2 111199 © 2002 IMP, Inc. Data Communications 1 DATA COMMUNICATIONS

2 408-432-9100/www.impweb.com © 2002 IMP, Inc.

Ordering Information

Operating Junction Temperature Note: 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. NC R1P R1N R2P R2N HS GND R3P R3N TPWR NC R9N R9P R8N R8P HS GND R7N R4P R4N R5P R5N ISO GND R6N R7P R6P DIFF_CAP DIFFSENSE MASTER/SLAVE IMP2119 TSSOP-28 Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. No ambient airflow is assumed. r e b m u N t r aPe g n a R e r u t a r e p m eTe g a k c a P W P C 9 1 1 2 P MI0 ° 0 7 o tC° C P O S S T c i t s a l P n i p - 8 2 ) T / W P C 9 1 1 2 P M I . e . i ( . r e b m u n t r a p o t ” T “ r e t t e l e h t d n e p p a , l e e R d n a e p a T r o F : e t o N s p e . 2 0 t _ 2 4 / 1 4 2 5 IMP2IMP2 111199IMP2IMP2 111199

© 2002 IMP, Inc. Data Communications 3 e m a NniPn o i t c n u F ,R(1,2,3,4,5,6,7,8)N .e d o m E Srof s enil noitani mretla ngiS.e d o m D V Lrof s enil noitani mretla ngis evita g e N R(1,2,3,4,5,6,7,8)P .e d o m E Srof s enil d n uorg-o d u e s P.e d o m D V Lrof s enil noitani mretla ngis evitis o P TPWR eno y b d e l p u o c e d e b t s u M . r w P m r e T s u b I S C S o t t c e n n o C . r o t a n i m r e t r o f n i p y l p p u s r e w o P 7 . 4µ o t y r a s s e c e n y l e t u l o s b a s i t I . s e c i v e d r o t a n i m r e t e e r h t y r e v e r o f r o t i c a p a c R S E - w o l F . ) B C P n o s e c a r t g i b ( e c n a d e p m i w o l y r e v a h g u o r h t r o t i c a p a c g n i l p u o c e d e h t o t n i p s i h t t c e n n o c TPWRe h t o t s r o t i c a p a c g n i l p u o c e d e h t m o r f t r o h s y r e v s e c n a t s i d g n i p e e K.lacitirc osla s i n i p s n o i t a c i l p p a e m o s d n a t n a d n e p e d t u o y a l t a h w e m o s s i r o t i c a p a c g n i l p u o c e d e h t f o e u l a v e h T 1 . 0 l a n o i t i d d a n a m o r f t i f e n e b y a m µ TPWRe h t t a r o t i c a p a c g n i l p u o c e d F.nip OSI elsv e l c i g o l r o f 2 e l b a T e e S . r o t a n i m r e t s e l b a s i d / s e l b a n E D NG. d n u o r g o t t c e n n o C . n i p d n u o r g r o t a n i m r e T E V A L S / R E T S A M .e c i v e d g n i l l o r t n o c e h t s i r o t a n i m r e t h c i h w t c e l e s o t d e s U . n i p S / M s a o t d e r r e f e r s e m i t e m o S . 1 e l b a T e e S . e v i r d t u p t u o E S N E S F F I D e h t s e l b a n e n e p O r o H G I H n i p E V A L S / R E T S A M E S N E S FFI D ot n i p e s n e s e h t o s l a s i t I . e n i l S N E S F F I D s u b I S C S e h t s e v i r d t I . n i p n o i t c n u f l a u d a s i s i h T a h t i w d e l b a s i d e b n a c e v i r d t u p t u o E S N E S F F I D . ) D V H r o E S , D V L ( e d o m s u b I S C S e h t t c e t e d F F I D o t d e t c e n n o c y l l a n r e t n I . 2 e l b a T d n a 1 e l b a T e e S . n i p E V A L S / R E T S A M e h t n o l e v e l W O L _CAP pin trough 20Kohms resistor. _CAPF F I D k 0 2 h g u o r h t n i p E S N E S F F I D o t d e t c e n n o c y l l a n r e t n IΩ e s n e s e d o m a s a d e s u e b n a c t I . r o t s i s e r r e t l i f C R n A . ) W O L s i n i p E V A L S / R E T S A M ( r o t a n i m r e t g n i l l o r t n o c - n o n a s i e c i v e d e h t n e h wnip k 02( Ω 1.0 / µ .re mitlanretni n a s a hti s a,2119P M I e h t n o d e r i u q e r t o n s i ) F N.C. No Connect. Pins should be left open. IMP2IMP2 111199IMP2IMP2 111199

4 408-432-9100/www.impweb.com © 2002 IMP, Inc. Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0 °C ≤ TA ≤ 70°C. TermPwr = 4.75V . ISO : IMP2 119 = LO W. Low duty cycle pulse testing techniques a re used which maintain junction and case temperatures equal to the ambient temperature. r e t e m a r aPl o b m ySn iMp yTx aMs t i n U e g a t l o V r w P m r eTD VLV M R E T 0 .35 2 .5V ES5 .35 2 . 5 e g a t l o V e n i L l a n g i S 00 .5V e g a t l o V t u p n I t c e n n o c s i D 0V M R E T V e g n a R e r u t a r e p m e T n o i t c n u J l a u t r i V g n i t a r e p O00 7° C . l a n o i t c n u f s i e c i v e d e h t h c i h w r e v o e g n a R . 2 : e t o N s p e . 3 0 t _ 2 4 / 1 4 2 5 r e t e m a r aPl o b m ySn o i t i d n oCn iMp yTx aMs t i n U n o i t c e S r o t a n i m r e T D V L t n e r r u C y l p p u S r w P m r eTD V L C C I n e p O = s e n i l r o t a n i m r e t l lA5 20 3A m V0.2ISO> 15 3 µA e g a t l o V e d o M n o m m oCV M C 5 2 1 .15 2 .15 7 3 .1V e g a t l o V t e s f fOV B S F ) 3 e t o N e e s ( + d n a – n e e w t e b t i u c r i c n e pO0 012 115 21V m r o t a n i m r e T l a i t n e r e f f iDe c n a d e p mIZ D V T U O V 1 o t V 1 – = l a i t n e r e f f id0 015 010 1 1 Ω e c n a d e p m I e d o M n o m m oCZ M C V 5 . 2 o t V00 010 020 0 3 Ω e c n a t i c a p a CtuptuOC O 0.2.0 V>OSI 5.2F p e g a k a e L t u p t uOI K A E L V0.2 > ISO 2 µA V E NIL T , V 4 o t V 0 =A 2=5 ° C V0.2ISO > 1 TPWR V , V 0 =E NIL V 7 . 2 = y a l e D e g n a h C e d oMt F D V 0 o t V 4 . 1 = E S N E S F F ID5 11s m n o i t c e S E S N E S F F I D e g a t l o V t u p t u O E S N E S F F IDV F F I D 2 .13 .14 .1V t n e r r u C e c r u o S t u p t u O E S N E S F F IDI F F I D V F F I DV 0=0 .50 . 51A m t n e r r u C k n i S E S N E S F F IDI ) F F I D ( K NIS V FFI D V 57.2=0 0 2 µA e g a k a e Ltuptu O E S N E S FFIDI )FFI D ( K A E L V0.2 > ISO 01 µA TA 2=5 ° C n o i t c e S r o t a n i m r e T d e d n E - e l g n i S t n e r r u C y l p p u S r w P m r eTI E SC C , n e p O = s e n i l r o t a n i m r e t l lAE V A L S / R E T S AMV 0=7 0 1A m , V 2 . 0 = s e n i l r o t a n i m r e t l lAE V A L S / R E T S AMV 0=4 126 2 2 V 0 . 2 > T C E N N O C S ID5 15 3 µA e g a t l o V h g i H t u p t u O r o t a n i m r eTV O 6 .25 8 .2V t n e r r u C t u p t uOI O V T U O V 2 . 0=1 23 24 2A m t n e r r u C kniSI K N I S V T U O s e n i l l l a , V 4=5 45 6A m e c n a t i c a p a C t uptuOC O V0.2 > ISO 5.2F p t n e r r u C e g a k a eLI K A E L V0.2 > ISO 2 µA V T U O T , V 4 o t V 0 =A 2=5 ° C V0.2ISO > I TPWR , V 0 =E N I L T , V 7 . 2 =A 2=5 ° C e c n a d e p m I r e v i r D d n u o rGZ G A m 1 =I0 0 1 Ω n w o d t u h S l a m r e h T 0 51° C Recommended Operating Conditions2

Electrical Characteristics

Note: 3. Open circuit fallsafe voltage. IMP2IMP2 111199IMP2IMP2 111199

© 2002 IMP, Inc. Data Communications 5 r e t e m a r aPl o b m ySn o i t i d n oCn iMp yTx aMs t i n U O SectionS I O ThresholdsS I V H T 8.00 .2V tnerru Ctu pnII LI 0 V= OSI 01 µA I H I O = 2.4VSI 001A n n o i t c e S E V A L S / R E T S A M s d l o h s e r h T E V A L S / R E T S AMV ) S M ( H T 8.00 .2V t n e r r u C t u p nII ) S M ( L I V 0 = E V A L S / R E T S AM0 1 µA I ) S M ( L I V 4 . 2 = E V A L S / R E T S AM0 01A n 3 t a . 5 0 t _ 2 4 / 1 4 2 5 IMP2IMP2 111199IMP2IMP2 111199

© 2002 IMP, Inc. Data Communications 7

Application Information

1–TPWR ISO TPWR ISO M/S GND NC* NC* Pin 1 Data Lines (9) Data Lines (9) Data Lines (9) DIFFSENSE DIFF_CAP* 20k IMP2119 1–TPWR 4.7µF ISO M/S GND DIFFSENSE DIFF_CAP* IMP2119 1–TPWR ISO M/S GND DIFFSENSE DIFF_CAP* IMP2119 1– TPWR ISO TPWR ISO M/S GND DIFFSENSE DIFF_CAP* IMP2119 HOST PERIPHERAL 1– TPWR 4.7µF ISO M/S GND DIFFSENSE DIFF_CAP* IMP2119 1– TPWR ISO M/S GND DIFFSENSE DIFF_CAP* * The capacitor on pin 1 can be placed on the IMP2119CPW. This capacitor is not required with IMP devices. IMP2119 + + 4.7µF* + Pin 1 4.7µF* 0.1µF 0.1µF NC* Pin 1 4.7µF* NC* Pin 1 4.7µF* NC* Pin 1 4.7µF* NC* Pin 1 4.7µF* 20k Figure 5. Suggested IMP2119 Universal Application Schematic

8 408-432-9100/www.impweb.com © 2002 IMP, Inc. s e h c nIs r e t e m i l l i M n iMx aMn iMx a M ) n i P - 8 2 ( ) P O S S T ( e n i l t u O k n i r h S l l a m S n i h T A2 3 0.1 4 0.0 8 .05 0 . 1 B7 0 0 .02 1 0 .09 1 .00 3 . 0 C5 3 0 0 .09 7 0 0 .09 0 .00 2 . 0 D8 7 3 .06 8 3 .00 6 .90 8 . 9 E9 6 1 .06 7 1 .00 3 .45 . 4 FC S B 5 2 0 .0C S B 5 6 . 0 G2 0 0 .05 0 0 .05 0 .05 1 . 0 H – 7 4 0 . 0 – 0 2 . 1 L7 1 0 .00 3 0 .05 4 .05 7 . 0 M °0 °8 °0 °8 P6 4 2 .06 5 2 .05 2 .60 5 . 6 C L * – 4 0 0 . 0 – 0 1 . 0 *. y t i r a n a l p o C d a e L s p e . 1 0 t _ 2 4 / 1 4 2 5 3 2 1 EP D SEATING PLANE B G A H F E L 24-Pin (TSSOP).eps C M Thin Small Shrink Outline (TSSOP) (28-Pin) PW Package Dimensions IMP2IMP2 111199IMP2IMP2 111199

IMP , Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Fax: 408-434-1085 e-mail: info@impinc.com http://www.impweb.com The IMP logo is a registered trademark of IMP , Inc. All other company and product names are trademarks of their respective owners. © 2002 IMP, Inc. Printed in USA Publication #: 7001 Revision: C Issue Date: 11/01/01 Type: Product IMP2IMP2 111199IMP2IMP2 111199