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High Dense Cell Design Reliable and Rugged Advanced Trench Process Technology Power Management in Inverter System Synchronous Rectification Parameter Value Unit BVDSS 100 V ID 6.3 A RDS(on), typ 33 Pȍ
Electrical Characteristics TJ=25 qC unless otherwise specified Symbol Parameter Test Conditions Min Typ Max Units IS Continuous Source-Drain Diode Forward Current -- -- 6.3 A ISM Pulsed Source-Drain Diode Forward Current -- -- 25 VSD Source-Drain Diode Forward Voltage I S = 6.3 A, VGS = 0 V -- -- 1.3 V trr Reverse Recovery Time IS = 6.3 A, VGS = 0 V diF/dt = 100 A/ȝV -- 40 -- Ꭸ Qrr Reverse Recovery Charge -- 70 -- nC On Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 Ꮃ 100 -- -- V IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V -- -- 1 Ꮃ VDS = 80 V, TJ = 125 -- -- 100 Ꮃ IGSS Gate-Body Leakage Current VGS = ρ20 V, VDS = 0 V -- -- ρ100 Ꮂ Off Characteristics Ciss Input Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 2770 -- Ꮔ Coss Output Capacitance -- 140 -- Ꮔ Crss Reverse Transfer Capacitance -- 90 -- Ꮔ Rg Gate Resistance V GS = 0 V, VDS = 0 V, f = 1MHz -- 1.2 -- Dynamic Characteristics td(on) Turn-On Time VDS = 50 V, ID = 6.3 A, RG = 6 -- 36 -- Ꭸ tr Turn-On Rise Time -- 19 -- Ꭸ td(off) Turn-Off Delay Time -- 123 -- Ꭸ tf Turn-Off Fall Time -- 22 -- Ꭸ Qg Total Gate Charge VDS = 80 V, ID = 6.3 A, VGS = 10 V -- 50 65 nC Qgs Gate-Source Charge -- 10 -- nC Qgd Gate-Drain Charge -- 13 -- nC Switching Characteristics Source-Drain Diode Maximum Ratings and Characteristics VGS Gate Threshold Voltage VDS = VGS, ID = 250 Ꮃ 2.0 -- 4.0 V RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 6.3 A -- 33 40 m gFS Forward Transconductance V DS = 5, ID = 6.3 A -- 16 -- S Notes : 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L=1mH, IAS=9.5A, VDD=25V, RG=25:, Starting TJ =25qC
Fig 12. Gate Charge Test Circuit & Waveform Fig 13. Resistive Switching Test Circuit & Waveforms Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms EAS =L L IAS 2----2 BVDSS -- VDD BVDSS Vin VDS 10% 90% td(on) tr t on t off td(off) tf Charge VGS 10V Qg Qgs Qgd VDD VDS BVDSS t p VDD IAS VDS (t) ID (t) Time VDD ( 0.5 rated VDS ) 10V VDS RL DUT RG 3mA VGS DUT VDS 300nF 200nF12V Same Type as DUT 10V DUT RG L I D
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT VDS Driver RG Same Type as DUT VGS • dv/dt controlled by RG
- IS controlled by pulse period VDD L I S 10V VGS ( Driver ) I S ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop Vf IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width
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