GF9103 GENNUM | Alldatasheet

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GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com Revision Date: August 1997 Document No. 521 - 33 - 04 DATA SHEET

FEATURES

  • 4:2:2 to over-sampled RGB or YCB C R conversion in a single device
  • single 10 bit 4:2:2 input
  • internal 4:2:2 de-multiplexer
  • 4:2:2 to 8:8:8 interpolation filters
  • internal YC B CR to RGB color space conversion
  • optional YCB C R (8:8:8) output mode
  • setup insertion in Luminance channel under user control
  • user selectable digital SIN X/X correction
  • rounding to 10/8 bit resolution per output channel
  • 40 MHz maximum clock rate
  • single +5 V power supply

APPLICATIONS

  • Over-Sampling 4:2:2 to Analog RGB Conversions for video monitoring
  • Over-Sampling 4:2:2 to Analog YCBCR Conversions for video monitoring DEVICE DESCRIPTION The GF9103 is specifically designed to simplify conversions from 4:2:2 component digital video to analog RGB or analog YC BCR component video. The GF9103 simplifies this process by performing 4:2:2 to 8:8:8 interpolation, digital color space conversion and digital SIN X/X correction in a single device. Immediately following the GF9103, three over-sampled channels of RGB or YC BCR data may be passed through Digital to Analog converters and simplified analog reconstruction filters. The GF9103 accepts a single 10 bit stream of 4:2:2 data and internally de-multiplexes it into three 10 bit channels of YC BCR data. The YC BCR data is then passed through three linear phase FIR filters that over-sample the Y data by a factor of 2 and the CB and CR data by a factor of 4. While operating in an over-sampled RGB output mode, the interpolated YC BCR data is passed through the internal color space converter to convert the YC BCR data to RGB data according to CCIR-601. Alternatively, the color space converter may be bypassed to obtain over-sampled YC BCR (8:8:8) output data. While operating in YCBCR output mode, setup may be dynamically inserted into the Luminance channel. Prior to output rounding, over-sampled YC BCR or RGB data may be corrected for SIN X/X characteristics of D/A conversion. Output data may be rounded to 10 or 8 bit resolution per channel. C B and C R may be presented as signed or unsigned data. The GF9103 is packaged in a 68 pin PLCC package, operates with a single +5 V power supply and typically consumes only 85 mA of current when operated at 27 MHz. FUNCTIONAL BLOCK DIAGRAM

ORDERING INFORMATION

PART NUMBER PACKAGE TEMPERATURE RANGE GF9103-CPS 68 pin PLCC 0° to 70° C GF9103-CTS 68 pin PLCC Tape 0° to 70° C CLIP & ROUND CLIP & ROUND CLIP & ROUND SELECT_MATRIXSETUP SETUP SIN X/X SIN X/X SIN X/X Y MULTIPLEXED 4:2:2 DATA STREAM IN YCBCR TO RGB MATRIX BYPASS CB4:2:2 DEMUX SYNC CLK OE CR Y X4 CB CR CR Y CB Y/G CR/R CB/B Y/G CB/B CR/R Y/G CB/B CR/R Y/G CB/B CR/R CB/B CR/R 2's COMP CONVERT 2's COMP MultiGEN ™ GF9103 Over-Sampling Color Space Converter for Video Monitoring

PIN NO. SYMBOL DESCRIPTION 61, 68 VDD ±5 V ± 5% power supply. 40, 43, 60, 64 GND Ground. 3 SCAN_EN Set Low. 8, 11-17, 19, 20 SI 9..0 Input Data Port: Input data port with internal pull-downs. Input data is assumed to be a multiplexed stream of CBYCR [Y] CB..., where [Y] denotes an isolated Luminance sample. SI9 is the Most Significant Bit and SI 0 is the Least Significant Bit. 4O E Output Enable: Active low input with internal pull-up. When OE is high, the output data ports are in high impedance state. 59-53, 51-49 SOA 9..0 Output Data Port A: Depending on device configuration, SOA 9..0 may output over-sampled Y or G video. SOA 9 is the Most Significant Bit and SOA 0 is the Least Significant Bit. SOB9..0 Output Data Port B: Depending on device configuration, SOB 9..0 may output over-sampled CB or B video. SOB9 is the Most Significant Bit and SOB 0 is the Least Significant Bit. 33-31, 29, 28, 25-21 SOC 9..0 Output Data Port C: Depending on device configuration, SOC 9..0 may output over-sampled CR or R video. SOC9 is the Most Significant Bit and SOC 0 is the Least Significant Bit. 2 CLK System Clock: All timing information relative to rising edge of clock. 5 SYNC Synchronization: Control signal input with internal pull-up. This input is used to synchronize the incoming data by holding SYNC high on clock period N and low on clock period N+1 when the first CB sample is presented to the SI 9..0 inputs. SYNC may be held low until re- synchronization is desired or may be toggled at every occurrence of a C B sample. 65 SELECT_MATRIX Select Color Space Conversion: Control signal input with internal pull-down. SELECT_MATRIX is used to enable and disable the internal YC BCR to RGB color space converter. Color space conversion is enabled while SELECT_MATRIX is high and is disabled while SELECT_MATRIX is low. 66 BYPASS Bypass SIN X/X Correction: Control signal input with internal pull-up. When BYPASS is high, SIN X/X correction for the three output channels is enabled. While BYPASS is low, SIN X/X correction is by-passed. 63 SETUP Setup: Control signal input with internal pull-down. SETUP is used to enable and disable setup insertion in the Luminance channel. 62 CONVERT Two's Complement Conversion: Control signal input with internal pull-up. While CONVERT operating in RGB output mode, the CONVERT pin is over-ridden and both SOB 9..0 and modes. 67 RND10/8 Output Rounding: Control signal input with internal pull-up. RND10/8 selects rounding to 10 bit resolution per channel when high and rounding to 8 bit resolution per channel when low.

Fig. 1 GF9103 Pin Connections Fig. 2a Equivalent Input Circuit Fig. 2b Equivalent Output Circuit GND SOA9 SOA8 SOA7 SOA6 SOA5 SOA4 SOA3 VDD SOA2 SOA1 SOA0 SOB9 SOB8 SOB7 SOB6 VDD VDD SI8 SI7 SI6 SI5 SI4 SI3 SI2 VDD SI1 SI0 SOC0 SOC1 SOC2 SOC3 SOC4 GND VDD SOC5 SOC6 GND SOC7 SOC8 SOC9 SOB0 GND VDD SOB1 SOB2 SOB3 GND SOB4 SOB5 GND GND SI9 GND GND SYNC OE SCAN_EN CLK GND VDD RND10/8 BYPASS SELECT_MATRIX GND SETUP CONVERT VDD GF9103 TOP VIEW 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 n SUBSTRATE CONTROL INPUT p WELL GND n p VDD GND n SUBSTRATE p WELL n p VDD

CONTROL SIGNAL/OPERATING MODE SUMMARY SYNC The SYNC control signal provides synchronization for the internal 4:2:2 de-multiplexer. SYNC should be held high on clock period N and low on clock period N+1 when the first CB sample is presented to the SI9..0 inputs. SYNC may be held low until re-synchronization is desired or may be toggled at every occurrence of a CB sample. SELECT_MATRIX AND SETUP SELECT_MATRIX and SETUP select the color space conversion and offset insertions which the GF9103 is to perform. The following chart presents the available color space conversions and the corresponding states of the SELECT_MATRIX and SETUP control pins. SETUP is a dynamic pin that may be modified every clock cycle. SELECT_MATRIX SETUP DESCRIPTION 00 Selects output to be over-sampled YCBCR with no setup in Y channel.

01 Selects output to be over-sampled YCBCR with a scaling factor of

+947/1024 and an offset of +71 (decimal) applied to the Y channel. 1 X Selects output to be over-sampled RGB with no setup. SIN X/X CORRECTION BYPASS DESCRIPTION 1 SIN X/X correction enabled on all output data channels. Latency through the device is 24 clock cycles. 0 SIN X/X correction disabled. Latency through the device is 22 clock cycles. OUTPUT ROUNDING RND10/8 DESCRIPTION 1 Output data rounded to 10 bit resolution per channel. 0 Output data rounded to 8 bit resolution per channel. TWO’S COMPLEMENT OUTPUT CONVERSION CONVERT SELECT_MATRIX DESCRIPTION OUTPUT ENABLE OE DESCRIPTION 0 All output data ports are enabled. 1 All output data ports are in high impedance state.

Fig. 3 Frequency Response of Luminance Interpolation Filter (Sampling at ƒs=27MHz) Fig. 5 Frequency Response of Chrominance Interpolation Filter (Sampling at ƒs=27MHz) Fig. 7 SIN X/X Compensation Filter Frequency Response (Sampling at ƒs=27MHz) Fig. 4 Frequency Response of Luminance Interpolation Filter (Sampling at ƒs=27MHz) Fig. 6 Frequency Response of Chrominance Interpolation Filter (Sampling at ƒs=27MHz) -16 -24 -32 -40 -48 -56 -64 -72 -80 FREQUENCY (MHz) MAGNITUDE (dB) -12 -16 -20 -24 -28 -32 -36 -40 FREQUENCY (MHz) MAGNITUDE (dB) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 FREQUENCY (MHz) MAGNITUDE (dB) PARAMETER LUMINANCE FILTER CHROMINANCE FILTER Filter Order 31 15 Pass Band Ripple +0.038 / -0.025 dB (0.0 ƒs to 0.21 ƒs) +0.2 / -0.2 dB (0.0 ƒs to 0.21 ƒs) DC Gain 0.0 dB 0.0 dB Attenuation -6.00 dB (at ƒ S/4) -6.00 dB (at ƒ S/8) Stop Band Attenuation -47 dB (0.30 ƒs to 0.50 ƒs) -28 dB (0.17 ƒs to 0.50 ƒs) fig. 8 luminance and chrominance filter characteristics 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 -0.10 FREQUENCY (MHz) MAGNITUDE (dB) 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 FREQUENCY (MHz) MAGNITUDE (dB)

Fig. 9 Operation of SYNC Control Signal ABSOLUTE MAXIMUM RATINGS PARAMETER VALUE Supply Voltage -0.3 to +7.0 V Input Voltage Range (any input) +0.5 to (V DD +0.5) V Operating Temperature Range 0°C ≤ TA ≤ 70°C Storage Temperature Range -65°C ≤ TS ≤ 150°C Lead Temperature Range (soldering 10 seconds) 260°C

ELECTRICAL CHARACTERISTICS

VDD = 5V , TA = 0°C, RL = 150 Ω to GND and 144 Ω AC coupled unless otherwise shown. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage V DD 4.75 5 5.25 V Supply Current Quiescent I DDQ VDD = Max, VIN = 0V - 5 9 mA Supply Current Unloaded I DDU VDD = Max, OE = VDD, ƒ = 27MHz - 85 150 mA Input Voltage, Logic Low V IL - - 0.2V DD V Input Voltage, Logic High V IH 0.7VDD -- V Switching Threshold V T CMOS - 2.5 - V Input Current: (CMOS Inputs) I IN VIN = VDD or GND -10 ±1 10 µA Inputs with Pulldown Resistors V IN = VDD 35 115 222 µA Inputs with Pullup Resistors V IN = GND -35 -115 -214 µA Output Voltage, Logic Low V OL VDD = Min, IOL = 4mA - 0.2 0.4 V Output Voltage, Logic High V OH VDD = Min, IOH = -4mA 2.4 4.5 - V Hi-Z Output Leakage Current I OZ VDD = Max, OE = 1 -10 ±1 10 µA Short Circuit Output Current I OS VDD = Max, output high one pin to ground, one second duration max - - 140 mA Input Capacitance C IN TA = 25°C, ƒ = 1MHz - - 10 pF Output Capacitance C OUT TA = 25°C, ƒ = 1MHz - - 10 pF 01234567 CLOCK tPWH tPWL tS tH SYNC YCB YCR CRYCBSI9..0 tCY

Fig. 10 Operation of SETUP Control Signal Fig. 11 Input/Output Timing, BYPASS = 1 SWITCHING CHARACTERISTICS TA from 0°C to 70°C unless otherwise specified. NAME PARAMETER TEST CONDITIONS MIN TYP MAX UNITS tD Output delay V DD = Min, CL = 25pF 8 9 10 ns tOH Output hold time V DD = Max, CL = 25pF 1 - - ns tEN Output enable V DD = Min, CL = 25pF - - 8 ns tDIS Output disable V DD = Min, CL = 25pF - - 8 ns tCY Cycle time 25 - - ns tPWL Clock pulse width low 10 - - ns tPWH Clock pulse width high 10 - - ns tS Input setup time 8 - - ns tH Input hold time 1 - - ns Y CB Y CR Y CB Y 01234567 CLOCK tPWH tPWL tS tH SETUP SI9..0 tCY 01234567 CLOCK tPWH tPWL tS tH tD SYNC 25 26 27 28 29 30 31 32 CLOCK SOA9..0 SOB9..0 SOC9..0 1 2 3 4 5 6 7 8 YCB YCR CRYCB tOH SI9..0 tCY

MAILING ADDRESS: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 SHIPPING ADDRESS:

970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5

C-101, Miyamae Village, 2-10-42 Miyamae, Suginami-ku Tokyo 168-0081, Japan Tel. +81 (03) 3334-7700 Fax. +81 (03) 3247-8839 GENNUM UK LIMITED Centaur House, Ancells Bus. Park, Ancells Rd, Fleet, Hants, England GU13 8UJ Tel. +44 (0)1252 761 039 Fax +44 (0)1252 761 114 Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. © Copyright March 1995 Gennum Corporation. All rights reserved. Printed in Canada. Fig. 12 Input/Output Timing, BYPASS = 0 tPWH tPWL OE 23 24 25 26 27 28 29 30 tS tH tD SYNC CLOCK YCB YCR CRYCB tOH 01234567 CLOCK 1234 5 SOA9..0 SOB9..0 SOC9..0 tDIS tEN SI9..0 tCY 6 7 8 REVISION NOTES: DOCUMENT IDENTIFICATION DATA SHEET The product is in production. Gennum reserves the right to make changes at any time to improve reliability, function or design, in order to provide the best product possible. CAUTION ELECTROSTATIC SENSITIVE DEVICES DO NOT OPEN PACKAGES OR HANDLE EXCEPT AT A STATIC-FREE WORKSTATION