G648D

G648D SII | Alldatasheet

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AN.No.G648D-992E LIQUID CRYSTAL DISPLAY MODULE G648D USER MANUAL Seiko Instruments Inc.

AN.No.G648D-992E NOTICE This manual describes the technical information, the function, and the operation of the G648D Liquid Crystal Display Module of Seiko Instruments Ine. Please read this manual carefully to familiarize yourself with the functions and to make best use of them. The descriptions here are subject to change without notice. Revision Record Edition Revision Date

1 Original November 1988

2 March 1989

3 Optical characteristics, September 1989

recommended Vopr. ©Seiko Instruments Inc. 1988 Printed in Japan -i-

AN.No.G648D-992E 1. SPECIFICATIONS

1.1 General

The G648D is a thin liquid crystal display (LCD) module that consists of a full dot- matrix LCD panel and CMOS LSls. The panel features a wide viewing angle and high contrast. The full dot-matrix structure allows both graphics and character display. In addition, the display is clear and stable, with no image warping or position skew, because the display position is specified by the intersection of transparent electrodes in a matrix.

1.2 Features

• Full dot-matrix structure with 640 dotsx200 dots - 1/200 duty - Four-bit parallel data input - Two power supplies : Vpp= 5 V, Vic= -24 V ( for driving liquid crystal ) + Weight : 450 ¢

1.3 Option Specifications

pret |e | omer | magn | “enngane | color* STN type** Yellow Transflective STNtype Transmissive, with EL backlightin * The LCD colors are affected by temperature, so the colors at low or high temperature differs slightly from those in the above table. STN (Super New TN) LCD The STN has even better display than the conventional new TN because of its increased twist angles. It has the following features : @eEven clearer display - QWider visibility and high contrast @Easy to see in vertical directions * G648D25B000 is a negative type; when the display data is 1, the dots are white. When the display data is 0, the dots are blue. To change to positive display, invert the display data and input it into the module. **** For the EL backlighting data and specifications, refer to EL Backlightings for LCD Modules Technical Data -1-

AN.No.G648D-992E

1.4 Absolute Maximum Ratings

Vss = 0V. Symbol | voo | | os | oT Vos = 300 input vorage | vw | | 03 | voo+03 | ov | Operatingtemperature | Tow | | io] so | | storageremperature | tag [| | 0 To |e

1.5 Electrical Characteristics

Vss = OV, Ta = 0°C ~ 50°C | tem | symbor_ | conaitions |i. | typ. | max | unit | voo [| ars | 500 | 525 | ov | Vpp = 5V 5%, _ ad | put vot Voo= 5ve5% | 08voo | - | voo | v | nput voltage Current consumption* Vic= - 24.0V Frame frequency Voo=sves% | 65 | 70 | 75 | we | + STN -type (Yellow green, blue)

1.6 Optical Characteristics

1.6.1 STN type (Yellow green, reflective type)

1/200 duty, 1/15 bias, Vopr=22.5V, Ta = 25°C Viewi cz2gG=0 | so | - | - | iewing angle 62-6; Notes 1&2 Response time (is) a=. @=0 | - | om | - | notes | Response time (Fall) e=s,o=0 | - | ssom | - | notes |

1.6.2 STN type (Blue, transmissive type)

1/200 duty, 1/15 bias, Vopr=22.5V, Ta = 25°C symbol in | Typ. | Max ezsa=0 | 2 | 3s | - | notes | Response time (rise) a=s,@=0 | - | roms | - | voter | Response time (fall) a=so=0 | - | s50ms | - | notes | -2-

AN.No.G648D-992E

1.6.3 STN type (Blue green, reflective type)

1/200 duty, 1/15 bias, Vopr=24.5V, Ta = 25°C Viewing angle | @-6, [e220@=0 | se | - | - | eies Response time (ise) a=, @=0 | - | 220m | - | Noted _| Response time (all) a=s.a=0 | - | a6om | - | notes | Note 1: Definition of angles @ and @ Note 2 : Definition of viewing angles 61 and 62 Z (@=0°) Light (when reflected) Sensor a oe db 62 L Y (@ = 180°) rm Contrast fi

4 LCD panel 20 pron pr nn mene nn Ne

» Sawer ew NAN a a \\ ' | \\O a1 a Zz @ Viewing angle 6 (@ fixed) Light (when transmitted) Y¥(@ = 0%) Note: Optimum viewing angle with the (6 = 90°) naked eye and viewing angie 6 at Cmax. above are not always the same. Note 3: Definition of contrast C Note 4: Definition of response time ery Vopr c Brightness (reflection) of unselected dot (B2) Voltage _ "Brightness (reflection) of selected dot (8,) ™) - ~ - Brightness (reflection) of --- selected dot Unselected | Selected state | Unselected state ep ig, state (dispaly ON! (dispaly OFF) - Bright \\T 10% { Brightness Brightness xO (reflection) of (transmission) {100% 90% Brightness unselected dot (reflection) Dark ri kK anal fon tott \\ Note: Measured with a transmissive LCD 0 panel which is displayed 1 cm? Operating voltage (v) Vopr : Operating voltage frm : Frame frequency ton: Response time (rise) toy: Response time (fall) -3-

AN.No.G648D-992E

1.7 Dimensions

Unit : mm/inch General tolerance : + 0.5mm 270.0+1.0/10.630 Bla) 52453, 239.0/9.409 (Viewing area) _(1!,5)/( 453) | SIZ} te1577a9 998 9778 ATR iaplay area) 119, 018)/C-T48) Stage O'? 82/205] 1.620.2/.063 s\\sje8 | fT [TT i hai > = | s|é 5|5 ! 3\\_|{zla} It SBR Eg eIsisiere Height of 1C aisjsisie sl I-iSie] ft H Ly | 4.Smax,/.17% Blele £ _[rsz0se ST 5) /(.059) pt Sma 17a. 228 265.0/10.433 28 60/236 xe S als 2.54 x 13=33.02/1.3 2 2 fcr SS SS $[s$- 0000

37 OOD

s!| DOD Figure 1 Dimensions [VO Terminal Functions } | No. | symbot [ No. | symbe | 2], | Display data input Lo | vo _| Power supply voltage (1): +5 V One-frome timing signal Liquid crystal AC drive control Vic Power supply voltage (2) : signal -24V ls | cu | One-common-line timing signal 12 Vo Liquid crystal drive voltage [6 | cz | disptaycatashiricock | soley ONOFF con cL2 Display data shift clock Display ON/OFF control * The INH terminal is normally set to NC. To use this terminal, cut off T2 of module circuit substrate, and unite J25. The display will then be on when INH is H, and off when INH is L. n se > < 325 inl & l< ** The Fenp terminal is connected to the metal frame of the module. Use this terminal to ground the frame. -4-

AN.No.G648D-992E 2. CIRCUIT STRUCTURE

2.1 Liquid Crystal Driving Circuit

The drive waveform of the LCD panel is shown in Figure 2 on the next page. Since DC voltage will damage the liquid crystal, an AC voltage is applied between the two frames. The signal controlling this is the liquid crystal AC drive control signal (M). The display quality of some LCD panels may be improved by increasing the frequency of liquid crystal AC drive waveform. For the G648D, in addition to the liquid crystal driving circuit that uses external signals M as AC drive control signals, a liquid crystal driving circuit is provided that includes a circuit that generates AC drive control signals (M') of higher frequency than M so that the best display quality ean be obtained. M signals need not be input to the liquid crystal driving circuit that uses M' signals. However, interface circuit that ean input M signals should be designed to use both types of liquid crystal driving circuit. The frame frequency is normally set to about 70+5 Hz to prevent screen flicker. The G648D has a 1/200 duty cycle, and the common electrodes are selected within a frame by time division from electrode 1 to electrode 200. This is called line sequential scanning. The voltage level of the segment electrodes determines whether the dots at the intersection of the segment electrodes are selected or not, when the common electrode is selected. As shown in Table 1, there are six drive waveform voltage levels, Va to Vf. The voltage level is determined by the bias value. The voltage between the segment and common electrodes is thus applied to the liquid crystal. The selection waveform for SEGg-COMg and the non-selection waveform for SEG1-COMy are shown in Figure 2. The size of the effective voltage of the waveform determines whether the liquid crystal under the selected dots is in the selection or non-selection state. Table 1 Common and segment selection level Segment non-selection level : Common non-selection level Common and segment selection level -5-

AN.No.G648D-992E /<—— 1 frame SEG 0 1 2 M | |

0 EA L] ~~ | |

2 :| -— I, 3 tt) HOU 1 wee Ve ' vi Va eee ——_ Vp COM ; —__ Ve | —— * wee _— Ve | 7" | Ve SEG | —f v | a Vopr tL- W15Vopr SEG 9-COM 9 wee — asy, (Selection waveform) | W15Vopr —_ Vopr 7 13/15Vopr -—Tb- W5Vopr SEG ;-COM , we +11 5V opr (Non-selection waveform) 1B5v - opr Figure 2 Drive waveform -~6-

AN.No.G648D-992E

2.2 Cireuit Structure

The G648D consists of common drivers, segment drivers, a bias voltage generation circuit, a M' generation circuit and a Vopr control circuit. Figure 3 shows the block diagram. In the liquid crystal driving circuit where the M' generation circuit is not built in, CL1 and M are directly input to the segment driver and common driver instead of CL' and M'. i aa a! A 4 9 Bae cl2 fe TT i i ali i NIMNIINIINIINIIII cu acc aa BAA aE WV AVAS -ration FLM driver 1 driver 2 driver 8 M Von Vss| Common ; [E> ; IL, Common CY ariver2 640x200 full dot-matrix LCD Va ly Common a Ve driver 3 Va Va Var Vb, Ve. Vi Bias voltage generation circuit - CD : Common driver (OKI MSM5298GS) SD : Segment driver (OKI MSM5299BGS) Vo Vopr(Va - V4) control Vic circuit Figure 3 Block diagram -7-

AN.No.G648D-992E (1) Common driver (OKI MSM5298GS) A common driver (CD) is a CMOS IC with 68 drive outputs. The G648D has three CDs, whose internal registers are connected each other. They operate as follows. Input one-frame timing signal (FLM) is taken into the internal shift register by the falling edge trigger of the one-common-line timing signal (CL1), and sequentially shifted. After 200-CL1 input, the next FLM is input and the same operation is repeated. As shown in Table 2, the common output is selected according to the shift register contents and the liquid crystal AC drive control signal (M) in the drive circuit, and the common drive waveform is formed. Table 2 Shift register content | | COM output H L (2) Segment driver (OKI MSM5299BGS) A segment driver (SD) is a CMOS IC with 80 drive outputs. It operates as follows. Input four-bit data is sequentially taken into the internal register by the falling edge trigger of the display data shift clock (CL2). SD has a chip enable function. After 80 bits of data are taken into SD1, the next data is automatically taken into SD2. G648D has eight SDs and 640 bits of data can be taken. The display data taken into internal register are latched by the falling edge trigger of CL1. As shown in the Table 3, the segment output is selected according to the display data and M in the drive circuit, and the segment drive waveform is formed. Table 3 [oinarane [w | aeann | H L -8-

AN.No.G648D-992E

2.3 Timing Characteristics

2.3.1 Power ON/OFF and Signal Input Timing

Power ON/OFF and signal input should be performed according to the timing shown in the figure below in order not to damage the LCD driving cireuit and the LCD panel. . A75Vy Srv BY Yop 0 ~ 50 ms 0~50ms Input signals Oms min. Oms min. Vo Vic Figure 8 Power ON/OFF and signal input timing

2.3.2 Timing Characteristics

Ta = 0°C to 50°C, Vpp = 5.0V+5% symbol [min | mm | une | See fe we fous seupine | ws [0 | = |_| -mw-

AN.No.G648D-992E

2.4 Interface Circuit

2.4.1 Interface with MPU signal

The G648D is controlled by the MPU circuit, whose interface is easily set up when the LCD controller is used. The LCD controller has basie functions such as receiving information related to the display from the MPU circuit, and sending display timing signals and display data to the LCD module, and other functions such as cursor display. The G648D must use LCD controllers conforming to the following conditions. e For a full dot-matrix LCD module © Where data is transferred to the LCD module in four-bit parallel © Where G648D display screen has 1/200 duty The following section gives examples of interfaces using the OK] MSM6255GSK, SEIKO EPSON SED1330FBA, HITACHI HD64646FS and YAMAHA V6366B controllers. -13-

AN.No.G648D-992E (1) OKI MSM6255GSK MPU MSM6255GSK cs DIEN G648D WR Us [1 [bs Data DBp~DB ‘0~ DB7 bs fame Ta Tw -_ oe ic UDo : BIR ccf oF | co ROM RAg~RAs ee G OE rt Voo 110 | vss | tt rans az | omin [13 fina WE i RAM [14 | Fon | Address R= 20kQ bus oo ag~ As VR= 10kQ DC power supply +5V GND -24V Figure 11 Interface circuit with MSM6255GSK [ Features of the MSM6255GSK ] e Interface with 80-series MPU possible ¢@ Cursor : ON/OFF; blinking speed, form, and position are programmable © Scrolling and paging @ CMOS process e 5-V single power supply -14-

AN.No.G648D-992E (2) SEIKO EPSON SED1330FBA MPU SED1330FBA rat G648D nn reg : x & Po —2To | é pYO TS Trust| WE ms Fol Data KO Do~D7 LP bus sete Tea | XD, VDo~VD7 xy Le I mene Piply w H2| vo | RAM VR/W 12 | Vo

1 L14 | Fen |

VAg~VAis R= 20kQ : VR= 10kQ DC power supply +5V GND -24V Figure 12 Interface circuit with SED1330FBA [ Features of the SED1330FBA ] © Interface with 80-series or 68-series MPU possible © Built-in character generator ROM : 160 kinds e External character generator CG RAM : (8X16 dot-matrix) x64 kinds -CG ROM : (8x16 dot-matrix) x 256 kinds e Layered mode : AND, OR, XOR, "preferred" OR e CMOS process © Scrolling (vertical and horizontal) 5-V single power supply -15-

AN.No.G648D-992E (3) HITACHI HD64646FS MPU HD64646FS RES Data —SF5 7, DBo~DB7 bus [ | A CUDISP va wa | G648D Ll eco}>}oy-nouy tts —of Ta] cHiGR | +212 |b, | | eu 3 Tum r Met u | Sel selector > MDo~MD7|_CL2 mia — LU, tro vs | rtd sc | 112 | Vo | arc ‘ ‘ [14 | Feno | RS R= 20kQ Address f f VR= 10kQ bus 0 MAg~MA15| DC power supply +5V GND -24V Figure 13 Interface circuit with HD64646FS [ Features of the HD64646FS] © Interface with 80-series MPU possible @ Character font e@ Layered mode : OR (character and - Vertical : 1 dot to 32 dots graphics) - Horizontal : 8 dots Character reverse, blinking, all black, © Scrolling all white - Vertical : smooth or character unit ® Cursor - Horizontal : character unit - ON/OFF; blinking speed, form and ® CMOS process position are programmable © 5-V single power supply - 16-

AN.No.G648D-992E (4) YAMAHA V6366B meu V63668 JOSEL 1OW — | 1OR MEMW G648D MEMR LD, MEMRDY |-to Meer ip RY Data Do~D7 csY g Coe pst rs Fa LATCH Pe GT, | Pa I's | bo | rhe ie

1 RAg~RAg 110 | vss |

rt ve | LATCH fa [ne | TOR [4 Fen! R= 20kQ VR= 10kQ Display WE RAM — OE bus ADy~ADi5 XA DC power supply Ag~As +5V GND -24V Figure 14 Interface circuit with V6366B { Features of the V6366B ] © Compatible with CGA, MDA, and HGC © Character font for IBM-PC - Vertical: 1 dot to 32 dots e Gradation and hatching - Horizontal: 6,7, 8,9, 10, 8Xinteger ¢ Cursor dots - ON/OFF/Blink; form and position are = CMOS process programmable e 5-V single power supply e Scrolling smoothly -17-

AN.No.G648D-992E

2.4.2 Interface with video signal

When interfacing with SEIKO EPSON SED1341F controller, the G648D displays using separate video signals, without changing hardware or software. Both SED1341FOB and SED1341FOC can be used for G648D interface. Figure 15 shows an example of interface circuit using the SED1341F. P . COMPUTER SED1341F G648D X31 T bs | x x2 To, | Separate vD [3 | eum | video 2 [use pwr Tat | signals vse ets ta | Le | cuz | [8 | by | a 10 | Vss | Raa [Me | "aM we RAM 1 Q [13 | inn | if [14 | Fen | MAg~MAd R= 20kQ VR= 10kQ DC power supply +5V GND -24V Figure 15 Interface cireuit with SED1341F | Features of the SED1341F ] © Separate signal input compatible with TTL . - Video data, Horizontal synchronizing signal, Vertical synchronizing signal, Dot clock @ Dot-clock generation with PLL, which has built-in PLL. program counter and phase comparator. Clock frequency is selectable of 14.32 MHz typ. and 21.05 MHz typ. e Fine adjustment of display position - Register programming method via four-bit bus @ 5-V single power supply -18-

AN.No.G648D-992E 3. NOTES Safety + If the LCD panel breaks, be careful not to get the liquid crystal in your mouth. If the liquid crystal touches your skin or clothes, wash it off immediately using soap and plenty of water. Handling + Avoid statie electricity as this can damage the CMOS LSI. + The LCD panel is made of plate glass; do not hit or press against it. + Do not remove the panel or frame from the module. + The polarizer on the display is very fragile; handle it very carefully. Mounting and Design + Mount the module in the specified installation sections and holes. + To protect the module from external pressure, put a plate of transparent material such as acrylic or glass over the display surface, frame, and polarizer. Leave a small gap between the transparent plate and the module. vy Example Small gap Transparent plate | oP Exterior surface S = h) DD eee a Sa Screw + Keep the module dry. Condensation can damage the transparent electrodes . - 19 -

AN.No.G648D-992E . Storage + Store the module in a dark place where the temperature is 25°C +10°C and the humidity below 65% RH. + Do not store the module near organic solvents or corrosive gases. + Do not crush, shake, or jolt the module or its components. Cleaning + Do not wipe the polarizer with a dry cloth, as it may scratch the surface. + Wipe the module gently with a soft cloth soaked with a petroleum benzine. + Do not use ketonie solvents (ketone and acetone) or aromatic solvents (toluene and xylene), as they may damage the polarizer. -20-

AN.No.G648D-992E Index -B- Bias ValUC 2... cece eee cece ce cece eect teen eee e te ceseeescees OF Bias voltage generation circuit ....+eeeeeeeeecee ec eeeeceeecee 7,10 Block diagram oo eee eee ee ee ce cere eect cece e eee cr ceseccscces 7 -C- Cleaning 2... cece cece cece cece e cent eee e reece ree reccccces 20 Common drive waveform .... eee ee cece eee e cect cece ec cereveee 8B Common driver... ce cece eee cece ee reece eer were nen nenes 7, 8, 12 Contrast 2. cece cece cece ec eee cece eee cece cee eseeecee 12,3 Current consumption 2... ee eee eee ee cece eee ee ec eeececsccsesces 2 -D- Definition of response time. ee eee eee eect e cere ere eee eeeee BF Display data input 2... eee eee eee eee r cree e eee e scree ecervenvvcee & Display data shift clock 2.2... eee eee cee eee cece nec e ern ne 48 -E- Effective voltage 2.2... cece cece eee rere cere e ena c essere ercees § -F- Flicker 2... eee ee ec cece ee eee eee eee e ener eee e ec eeeceencee 5 -H- ~ Input voltage 2... ee cece cee eee cee eee eee cere n eee encccesces 2

AN.No.G648D-992E -L- LCD controller 2... cece eee e cere cece eee cece ce ceccsceccce 13 -M- . M' generation Circuit 2... ee eee ee eee eee eee eee eee cece eecee 7,10 -N- -O- One-common-line timing signal 2... .eeeee eee e eee nceesccees 48 Operational amplifier 2.2... eee ee eee eee ee eee eee een cece eeeee 9,10 -p- Power supply voltage .. cece cece cece eee e cere rece reeeceecccee 24 -R- Resistance division «2.2... eee eee eee eee ee eee ween cece eenccee 10 Response time (fall) 2... - eee eee eee eee eee cette eee cee e ences 23 Response time (rise) 2.2... cece eee cee ee eee eee eee eee reeene 23 -S- Segment driver... eee eee eee ee eee eee ee eee eee eter e eee eee 7, 8, 12 SEIKO EPSON SED1330FBA .... eee cece ee ee eee eee e cece ee es = 13,15 Selection waveform... eee eee cece eee eee cence cence cccceces 5,6 Storage occ cece eee eee cece eee r reece eee c cence ceecccccccces 20 “Storage temperature 2... ee ee ee ee cece eee eee eect cece cree ceceee 2 -y- Viewing angle 2.2... cece cece cece eee reece cece eccccces 2B Vopr control circuit... eee cece cree cece cree cece reer er cecces 1,9 -Y-

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