ESP32-S2-SOLO ESPRESSIF | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 34
Technical content
Datasheet sections
- 1 Module Overview
- 1.1 Features
- 1.2 Description
- 1.3 Applications
- 2 Block Diagram
- 3 Pin Definitions
- 3.1 Pin Layout
- 3.2 Pin Description
- 3.3 Strapping Pins
- 3.3.1 Chip Boot Mode Control
- 3.3.2 VDD_SPI Voltage Control
- 3.3.3 ROM Messages Printing Control
- 4 Electrical Characteristics
- 4.1 Absolute Maximum Ratings
- 4.2 Recommended Operating Conditions
- 4.4 Current Consumption Characteristics
- 4.4.1 Power Consumption in Active Mode
- 4.4.2 Current Consumption in Other Modes
- 4.5 Wi-Fi RF Characteristics
- 4.5.1 Wi-Fi RF Standards
- 4.5.2 Transmitter Characteristics
- 4.5.3 Receiver Characteristics
- 5 Module Schematics
- 6 Peripheral Schematics
- 7 Physical Dimensions and PCB Land Pattern
- 8 Product Handling
- 8.1 Storage Conditions
- 8.2 Electrostatic Discharge (ESD)
- 8.3 Soldering Profile
- 8.3.1 Reflow Profile
- 8.4 Ultrasonic Vibration
Datasheet sections
- 9 MAC Addresses and eFuse
Datasheet Version 1.8 2.4 GHz Wi-Fi (802.11 b/g/n) module Built around ESP32-S2 series of SoC, Xtensa® single-core 32-bit LX7 microprocessor Flash up to 16 MB, optional 2 MB PSRAM in chip package
36 GPIOs, rich set of peripherals
On-board PCB antenna or external antenna connector ESP32-S2-SOLO ESP32-S2-SOLO-U www.espressif.com End ofLife (EOL)
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1 Module Overview
Note: Check the link or the QR code to make sure that you use the latest version of this document: https://www.espressif.com/documentation/esp32-s2-solo_esp32-s2-solo-u_datasheet_en.pdf
1.1 Features
- ESP32-S2 or ESP32-S2R2 embedded, Xtensa® single-core 32-bit LX7 microprocessor, up to
240 MHz
- 128 KB ROM
- 320 KB SRAM
- 16 KB SRAM in RTC
- 2 MB embedded PSRAM (ESP32-S2R2 only) Wi-Fi
- 802.11 b/g/n
- Bit rate: 802.11n up to 150 Mbps
- A-MPDU and A-MSDU aggregation
- 0.4 µs guard interval support
- Operating frequency: 2412~ 2484 MHz Peripherals
- GPIO, SPI, LCD, UART , I2C, I2S, Camera interface, IR, pulse counter, LED PWM, TWAI® (compatible with ISO 11898-1, i.e. CAN Specification 2.0), full-speed USB OTG, ADC, DAC, touch sensor, temperature sensor Note: * Please refer toESP32-S2 Series Datasheetfor detailed information about the module peripher- als. Integrated Components on Module
- 40 MHz crystal oscillator
- 4 MB SPI flash Antenna Options
- On-board PCB antenna (ESP32-S2-SOLO)
- External antenna via a connector (ESP32-S2-SOLO-U) Operating Conditions
- Operating voltage/Power supply: 3.0~ 3.6 V
- Operating ambient temperature: – 85 °C version: –40~ 85 °C – 105 °C version: –40~ 105 °C (ESP32-S2-SOLO-H4 and ESP32-S2-SOLO-U-H4 only) Certification
- RF certification: Seecertificates
- Green certification: RoHS/REACH Test
- HTOL/HTSL/uHAST/TCT/ESD Espressif Systems 2 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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1.2 Description
ESP32-S2-SOLO and ESP32-S2-SOLO-U are two powerful, generic Wi-Fi MCU modules that have a rich set of peripherals. They are an ideal choice for a wide variety of application scenarios relating to Internet of Things (IoT), wearable electronics, and smart home. ESP32-S2-SOLO comes with a PCB antenna (ANT). ESP32-S2-SOLO-U comes with an external antenna connector (CONN). A wide selection of module variants are available for customers as shown in T able1 and T able2. Table 1: ESP32-S2-SOLO (ANT) Series Comparison1 Chip Ambient Temp.4 Size5 Embedded (°C) (mm) ESP32-S2-SOLO-N4 (End of life) 4 MB (Quad SPI) — ESP32-S2 –40 ∼ 85 18.0 × 25.5 × 3.1ESP32-S2-SOLO-H4 (End of life) — –40 ∼ 105 ESP32-S2-SOLO-N4R2 (End of life) 2 MB (Quad SPI) ESP32-S2R2 –40 ∼ 85 1 This table shares the same notes presented in T able2 below. Table 2: ESP32-S2-SOLO-U (CONN) Series Comparison Chip Ambient Temp.4 Size5 Embedded (°C) (mm) ESP32-S2-SOLO-U-N4 (End of life) 4 MB (Quad SPI) — ESP32-S2 –40 ∼ 85 18.0 × 19.2 × 3.2ESP32-S2-SOLO-U-H4 (End of life) — –40 ∼ 105 ESP32-S2-SOLO-U-N4R2 (End of life) 2 MB (Quad SPI)4 ESP32-S2R2 –40 ∼ 85 2 All modules can be equipped with 8 MB or 16 MB flash. For details, please contact our sales team. 3 The PSRAM is integrated in the chip’s package. 4 Ambient temperature specifies the recommended temperature range of the environment immediately outside the Espressif mod- ule. 5 For details, refer to Section7 .1Physical Dimensions. In this datasheet, unless otherwise stated, ESP32-S2-SOLO refers to all variants of ESP32-S2-SOLO, whereas ESP32-S2-SOLO-U refers to all variants of ESP32-S2-SOLO-U. The ESP32-S2 chip and the ESP32-S2R2 chip at the core of the two modules fall into the same category, namely ESP32-S2 series. ESP32-S2 series of chips have an Xtensa® 32-bit LX7 CPU that operates at up to 240 MHz. It has a low-power co-processor that can be used instead of the CPU to save power while performing tasks that do not require much computing power, such as monitoring of peripherals. ESP32-S2 series of chips integrate a rich set of peripherals, ranging from SPI, I2S, UART , I2C, LED PWM, TWAI®, LCD, Camera interface, ADC, DAC, touch sensor, temperature sensor, as well as up to 43 GPIOs. It also includes a full-speed USB On-The-Go (OTG) interface for USB communication. For more information on ESP32-S2 series of chips, please refer toESP32-S2 Series Datasheetand ESP32-S2 Series SoC Errata. Information about ESP-IDF release that supports a specific chip revision is provided inESP Product Selector. Espressif Systems 3 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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1.3 Applications
- Generic Low-power IoT Sensor Hub
- Generic Low-power IoT Data Loggers
- Cameras for Video Streaming
- Over-the-top (OTT) Devices
- USB Devices
- Speech Recognition
- Image Recognition
- Mesh Network
- Home Automation
- Smart Home Control Panel
- Smart Building
- Industrial Automation
- Smart Agriculture
- Audio Applications
- Health Care Applications
- Wi-Fi-enabled Toys
- Wearable Electronics
- Retail & Catering Applications
- Smart POS Machines Espressif Systems 4 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) List of T ables List of Tables
1 ESP32-S2-SOLO (ANT) Series Comparison 1 3
2 ESP32-S2-SOLO-U (CONN) Series Comparison 3
3 Pin Definitions 11
4 Default Configuration of Strapping Pins 12
5 Description of Timing Parameters for the Strapping Pins 13
6 Chip Boot Mode Control 13
7 VDD_SPI Voltage Control 14
8 ROM Messages Printing Control 14
9 Absolute Maximum Ratings 15
10 Recommended Operating Conditions 15
11 DC Characteristics (3.3 V, 25 °C) 15 12 Current Consumption for Wi-Fi (2.4 GHz) in Active Mode 16
13 Current Consumption in Modem-sleep Mode 16
14 Current Consumption in Low-Power Modes 17
15 Wi-Fi RF Standards 17
16 TX Power with Spectral Mask and EVM Meeting 802.11 Standards 18
17 TX EVM Test1 18
18 RX Sensitivity 19
19 Maximum RX Level 19
20 Adjacent Channel Rejection 20
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End of Life (EOL) List of Figures List of Figures
1 ESP32-S2-SOLO Block Diagram 9
2 ESP32-S2-SOLO-U Block Diagram 9
3 Pin Layout (Top View) 10
4 Visualization of Timing Parameters for the Strapping Pins 13
5 ESP32-S2-SOLO Schematics 21
6 ESP32-S2-SOLO-U Schematics 22
7 Peripheral Schematics 23
8 ESP32-S2-SOLO Physical Dimensions 24
9 ESP32-S2-SOLO-U Physical Dimensions 24
10 ESP32-S2-SOLO Recommended PCB Land Pattern 25
11 ESP32-S2-SOLO-U Recommended PCB Land Pattern 26
12 Dimensions of External Antenna Connector 27
13 Reflow Profile 28
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2 Block Diagram
ESP32-S2ESP32-S2R2RF Matching40 MHzCrystal3V3ESP32-S2-SOLO-UENGPIOsAntenna ESP32-S2ESP32-S2R2RF Matching40 MHzCrystal3V3ESP32-S2-SOLOENGPIOsAntennaSPI FlashSPICS0SPICLKSPIDSPIQSPIHDSPIWPVDD_SPI SPI FlashSPICS0SPICLKSPIDSPIQSPIHDSPIWPVDD_SPIPSRAM(opt.)(QSPI) PSRAM(opt.)(QSPI) Figure 1: ESP32-S2-SOLO Block Diagram ESP32-S2ESP32-S2R2RF Matching40 MHzCrystal3V3ESP32-S2-SOLO-UENGPIOsAntenna ESP32-S2ESP32-S2R2RF Matching40 MHzCrystal3V3ESP32-S2-SOLOENGPIOsAntennaSPI FlashSPICS0SPICLKSPIDSPIQSPIHDSPIWPVDD_SPI SPI FlashSPICS0SPICLKSPIDSPIQSPIHDSPIWPVDD_SPIPSRAM(opt.)(QSPI) PSRAM(opt.)(QSPI) Figure 2: ESP32-S2-SOLO-U Block Diagram Espressif Systems 9 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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3 Pin Definitions
3.1 Pin Layout
The pin diagram below shows the approximate location of pins on the module. For the actual diagram drawn to scale, please refer to Figure7 .1Physical Dimensions. GND3V3ENIO4IO5IO6IO7IO20 4039383736353433323130292827 GNDIO1IO2TXD0RXD0IO42IO41IO40IO39IO38IO37IO36IO35IO0 41GND Keepout Zone GNDGNDGNDGNDGNDGNDGNDGND181920IO10IO11IO12212223IO13IO14IO21151617IO3IO46IO9242526IO33IO34IO45 1234567891011121314IO15IO16IO17IO18IO8IO19 Figure 3: Pin Layout (Top View) The above pin layout is applicable for ESP32-S2-SOLO and ESP32-S2-SOLO-U, but the latter has no keepout zone.
3.2 Pin Description
The module has 41 pins. See pin definitions in T able3 Pin Definitions. For peripheral pin configurations, please refer toESP32-S2 Series Datasheet> SectionPeripheral Pin Configurations. Espressif Systems 10 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Table 3: Pin Definitions Name No. Type1 Function GND 1 P Ground 3V3 2 P Power supply EN 3 I High: on, enables the chip. Low: off, the chip powers off. Note: Do not leave the EN pin floating. IO4 4 I/O/T RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3 IO5 5 I/O/T RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4 IO6 6 I/O/T RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5 IO7 7 I/O/T RTC_GPIO7 , GPIO7 , TOUCH7 , ADC1_CH6 IO15 8 I/O/T RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P IO16 9 I/O/T RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N IO17 10 I/O/T RTC_GPIO17 , GPIO17 , U1TXD, ADC2_CH6, DAC_1 IO18 11 I/O/T RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7 , DAC_2, CLK_OUT3 IO8 12 I/O/T RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7 IO19 13 I/O/T RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D- IO20 14 I/O/T RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+ IO3 15 I/O/T RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2 IO46 16 I GPIO46 IO9 17 I/O/T RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD IO10 18 I/O/T RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4 IO11 19 I/O/T RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5 IO12 20 I/O/T RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6 IO13 21 I/O/T RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7 IO14 22 I/O/T RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS IO21 23 I/O/T RTC_GPIO21, GPIO21 IO33 24 I/O/T SPIIO4, GPIO33, FSPIHD IO34 25 I/O/T SPIIO5, GPIO34, FSPICS0 IO45 26 I/O/T GPIO45 IO0 27 I/O/T RTC_GPIO0, GPIO0 IO35 28 I/O/T SPIIO6, GPIO35, FSPID IO36 29 I/O/T SPIIO7 , GPIO36, FSPICLK IO37 30 I/O/T SPIDQS, GPIO37 , FSPIQ IO38 31 I/O/T GPIO38, FSPIWP IO39 32 I/O/T MTCK, GPIO39, CLK_OUT3 IO40 33 I/O/T MTDO, GPIO40, CLK_OUT2 IO41 34 I/O/T MTDI, GPIO41, CLK_OUT1 IO42 35 I/O/T MTMS, GPIO42 RXD0 36 I/O/T U0RXD, GPIO44, CLK_OUT2 TXD0 37 I/O/T U0TXD, GPIO43, CLK_OUT1 IO2 38 I/O/T RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1 IO1 39 I/O/T RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0 Cont’d on next page Espressif Systems 11 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Table 3 – cont’d from previous page Name No. Type1 Function GND 40 P Ground EPAD 41 P Ground 1 P: power supply; I: input; O: output; T: high impedance.
3.3 Strapping Pins
Note: The content below is excerpted fromESP32-S2 Series Datasheet> SectionStrapping Pins. For the strapping pin mapping between the chip and modules, please refer to Chapter5 Module Schematics. At each startup or reset, a module requires some initial configuration parameters, such as in which boot mode to load the module, voltage of flash memory, etc. These parameters are passed over via the strapping pins. After reset, the strapping pins operate as regular IO pins. The parameters controlled by the given strapping pins at module reset are as follows:
- Chip boot mode– GPIO0 and GPIO46
- VDD_SPI voltage– GPIO45
- ROM messages printing– GPIO46 GPIO0, GPIO45, and GPIO46 are connected to the chip’s internal weak pull-up/pull-down resistors at chip reset. These resistors determine the default bit values of the strapping pins. Also, these resistors determine the bit values if the strapping pins are connected to an external high-impedance circuit. Table 4: Default Configuration of Strapping Pins Strapping Pin Default Configuration Bit Value GPIO0 Pull-up 1 GPIO45 Pull-down 0 GPIO46 Pull-down 0 To change the bit values, the strapping pins should be connected to external pull-down/pull-up resistances. If the ESP32-S2 is used as a device by a host MCU, the strapping pin voltage levels can also be controlled by the host MCU. All strapping pins have latches. At system reset, the latches sample the bit values of their respective strapping pins and store them until the chip is powered down or shut down. The states of latches cannot be changed in any other way. It makes the strapping pin values available during the entire chip operation, and the pins are freed up to be used as regular IO pins after reset. Regarding the timing requirements for the strapping pins, there are such parameters assetup timeand hold time. For more information, see T able5 and Figure4. Espressif Systems 12 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Table 5: Description of Timing Parameters for the Strapping Pins Parameter Description Min (ms) tSU Setup timeis the time reserved for the power rails to stabilize be- fore the CHIP_PU pin is pulled high to activate the chip. 0 tH Hold timeis the time reserved for the chip to read the strapping pin values after CHIP_PU is already high and before these pins start operating as regular IO pins. Strapping pin VIL_nRST VIH tSU tH CHIP_PU Figure 4: Visualization of Timing Parameters for the Strapping Pins
3.3.1 Chip Boot Mode Control
GPIO0 and GPIO46 control the boot mode after the reset is released. See T able6 Chip Boot Mode Control. Table 6: Chip Boot Mode Control Boot Mode GPIO0 GPIO46 Default configuration 1 (Pull-up) 0 (Pull-down) SPI Boot(default) 1 Any value Download Boot 0 0 Invalid combination1 0 1
1 This combination triggers unexpected behavior
and should be avoided.
3.3.2 VDD_SPI Voltage Control
Depending on the value of EFUSE_VDD_SPI_FORCE, the voltage can be controlled in two ways. Espressif Systems 13 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Table 7: VDD_SPI Voltage Control EFUSE_VDD_SPI_FORCE GPIO45 eFuse 1 Voltage VDD_SPI power source2 0 0 Ignored 3.3 V VDD3P3_RTC_IO via RSPI 1 1.8 V Flash Voltage Regulator 1 Ignored 0 1.8 V Flash Voltage Regulator 1 3.3 V VDD3P3_RTC_IO via RSPI 1 eFuse: EFUSE_VDD_SPI_ TIEH
2 See ESP32-S2 Series Datasheet> SectionPower Scheme
3.3.3 ROM Messages Printing Control
During boot process the messages by the ROM code can be printed to:
- (Default) U0TXD pin. For this, EFUSE_UART _PRINT _CONTROL should be 0.
- DAC_1 pin. For this, EFUSE_UART _PRINT _CONTROL should be 1. EFUSE_UART _PRINT _CONTROL and GPIO46 control ROM messages printing as shown in T able8 ROM Messages Printing Control. Table 8: ROM Messages Printing Control eFuse1 GPIO46 ROM Messages Printing
0 Ignored Always enabled
1 Disabled
1 Enabled
3 Ignored Always disabled
1 eFuse: EFUSE_UART _PRINT _CONTROL Espressif Systems 14 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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4 Electrical Characteristics
4.1 Absolute Maximum Ratings
Stresses above those listed in T able9 Absolute Maximum Ratingsmay cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under T able10 Recommended Operating Conditionsis not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Table 9: Absolute Maximum Ratings Symbol Parameter Min Max Unit VDD33 Power supply voltage –0.3 3.6 V TSTORE Storage temperature –40 105 °C
4.2 Recommended Operating Conditions
Table 10: Recommended Operating Conditions Symbol Parameter Min Typ Max Unit VDD33 Power supply voltage 3.0 3.3 3.6 V IV DD Current delivered by external power supply 0.5 — — A TA Operating ambient temperature 85 °C version –40 — 85 °C105 °C version 105 4.3 DC Characteristics (3.3 V, 25 °C) Table 11: DC Characteristics (3.3 V, 25 °C) Symbol Parameter Min Typ Max Unit CIN Pin capacitance — 2 — pF VIH High-level input voltage 0.75 × VDD1 — VDD1 + 0.3 V VIL Low-level input voltage –0.3 — 0.25 × VDD1 V IIH High-level input current — — 50 nA IIL Low-level input current — — 50 nA VOH2 High-level output voltage 0.8 × VDD1 — — V VOL2 Low-level output voltage — — 0.1 × VDD1 V IOH High-level source current (VDD1 = 3.3 V, VOH >= 2.64 V, PAD_DRIVER = 3) — 40 — mA IOL Low-level sink current (VDD1 = 3.3 V, VOL =
0.495 V, PAD_DRIVER = 3) — 28 — mA
RPU Pull-up resistor — 45 — kΩ RPD Pull-down resistor — 45 — kΩ VIH_nRST Chip reset release voltage 0.75 × VDD1 — VDD1 + 0.3 V VIL_nRST Chip reset voltage –0.3 — 0.25 × VDD1 V Espressif Systems 15 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) 1 VDD is the I/O voltage for pins of a particular power domain. 2 VOH and VOL are measured using high-impedance load.
4.4 Current Consumption Characteristics
Owing to the use of advanced power-management technologies, the module can switch between different power modes. For details on different power modes, please refer to SectionRTC and Low-Power Management in ESP32-S2 Series Datasheet.
4.4.1 Power Consumption in Active Mode
Table 12: Current Consumption for Wi-Fi (2.4 GHz) in Active Mode Work Mode RF Condition Description Peak (mA) Active (RF working) TX 802.11b, 1 Mbps, DSSS, @19.0 dBm 320 802.11g, 54 Mbps, OFDM, @17 .5 dBm 273 802.11n, HT20, MCS7 , @17 .0 dBm 265 802.11n, HT40, MCS7 , @16.0 dBm 274 RX 2 802.11b/g/n, HT20 77 802.11n, HT40 81 1 The current consumption measurements are taken with a 3.3 V supply at 25 °C of ambient tem- perature at the RF port. All transmitters’ measurements are based on 100% duty cycle.
2 The current consumption figures in RX mode are for cases where the peripherals are disabled
and the CPU idle. Note: The content below is excerpted fromSection Power Consumption in Other Modesin ESP32-S2 Series Datasheet.
4.4.2 Current Consumption in Other Modes
The measurements below are applicable to ESP32-S2, ESP32-S2FH2, and ESP32-S2FH4. Since ESP32-S2FN4R2 and ESP32-S2R2 come with in-package PSRAM, their current consumption might be higher. Table 13: Current Consumption in Modem-sleep Mode Typ Mode CPU Frequency (MHz) Description All Peripherals Clocks Disabled (mA) All Peripherals Clocks Enabled (mA)1 Modem-sleep2,3 240 CPU is idle 20.0 28.0 CPU is running 23.0 32.0 160 CPU is idle 14.0 21.0 CPU is running 16.0 24.0 Cont’d on next page Espressif Systems 16 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Table 13 – cont’d from previous page Typ Mode CPU Frequency (MHz) Description All Peripherals Clocks Disabled (mA) All Peripherals Clocks Enabled (mA)1 80 CPU is idle 10.5 18.4 CPU is running 12.0 20.0 1 In practice, the current consumption might be different depending on which peripherals are enabled. 2 In Modem-sleep mode, Wi-Fi is clock gated. 3 In Modem-sleep mode, the consumption might be higher when accessing flash. For a flash rated at 80 Mbit/s, in SPI 2-line mode the consumption is 10 mA. Table 14: Current Consumption in Low-Power Modes Work mode Description Typ (µA) Light-sleep1 VDD_SPI and Wi-Fi are powered down, and all GPIOs are high-impedance750 Deep-sleep The ULP co-processor is powered on2 ULP-FSM 170 ULP-RISC-V 190 ULP sensor-monitored pattern3 22 RTC timer + RTC memory 25 RTC timer only 20 Power off CHIP_PU is set to low level, the chip is powered off 1
1 In Light-sleep mode, with all related SPI pins pulled up, the current consumption of the embedded
PSRAM is 140µA. Chip variants with in-package PSRAM include ESP32-S2FN4R2 and ESP32-S2R2.
2 During Deep-sleep, when the ULP co-processor is powered on, peripherals such as GPIO and I2C
are able to operate.
3 The “ULP sensor-monitored pattern” refers to the mode where the ULP coprocessor or the sensor
works periodically. When touch sensors work with a duty cycle of 1%, the typical current consump- tion is 22µA.
4.5 Wi-Fi RF Characteristics
4.5.1 Wi-Fi RF Standards
Table 15: Wi-Fi RF Standards Name Description Center frequency range of operating channel1 2412 ~ 2484 MHz Wi-Fi wireless standard IEEE 802.11b/g/n Data rate 20 MHz 802.11b: 1, 2, 5.5 and 11 Mbps 802.11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps 802.11n: MCS0-7 , 72.2 Mbps (Max) 40 MHz 802.11n: MCS0-7 , 150 Mbps (Max) Antenna type PCB antenna, external antenna connector Espressif Systems 17 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) 1 Device should operate in the center frequency range allocated by regional regulatory authorities. The target center frequency range is configurable by software. 2 For the modules that use external antenna connectors, the output impedance is 50Ω. For other modules without external antenna connectors, the output impedance is irrelevant.
4.5.2 Transmitter Characteristics
T arget TX power is configurable based on device or certification requirements. The default characteristics are provided in T able16. Table 16: TX Power with Spectral Mask and EVM Meeting 802.11 Standards Min Typ Max Rate (dBm) (dBm) (dBm) 802.11b, 1 Mbps, DSSS — 19.5 — 802.11b, 11 Mbps, CCK — 19.5 — 802.11g, 6 Mbps, OFDM — 17 .5 — 802.11g, 54 Mbps, OFDM — 17 .5 — 802.11n, HT20, MCS0 — 17 .5 — 802.11n, HT20, MCS7 — 16.5 — 802.11n, HT40, MCS0 — 17 .5 — 802.11n, HT40, MCS7 — 16.5 — Table 17: TX EVM Test1 Min Typ Limit Rate (dB) (dB) (dB) 802.11b, 1 Mbps, DSSS — –25.0 –10.0 802.11b, 11 Mbps, CCK — –25.0 –10.0 802.11g, 6 Mbps, OFDM — –25.0 –5.0 802.11g, 54 Mbps, OFDM — –28.0 –25.0 802.11n, HT20, MCS0 — –27 .0 –5.0 802.11n, HT20, MCS7 — –30.5 –27 .0 802.11n, HT40, MCS0 — –27 .0 –5.0 802.11n, HT40, MCS7 — –30.0 –27 .0
1 EVM is measured at the corresponding typical TX power provided
in T able16 TX Power with Spectral Mask and EVM Meeting 802.11 Standards above.
4.5.3 Receiver Characteristics
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End of Life (EOL) Table 18: RX Sensitivity Min Typ Max Rate (dBm) (dBm) (dBm) 802.11b, 1 Mbps, DSSS — –97 .0 — 802.11b, 2 Mbps, DSSS — –94.5 — 802.11b, 5.5 Mbps, CCK — –92.0 — 802.11b, 11 Mbps, CCK — –88.0 — 802.11g, 6 Mbps, OFDM — –92.5 — 802.11g, 9 Mbps, OFDM — –91.0 — 802.11g, 12 Mbps, OFDM — –89.5 — 802.11g, 18 Mbps, OFDM — –87 .5 — 802.11g, 24 Mbps, OFDM — –84.5 — 802.11g, 36 Mbps, OFDM — –80.5 — 802.11g, 48 Mbps, OFDM — –76.5 — 802.11g, 54 Mbps, OFDM — –75.0 — 802.11n, HT20, MCS0 — –92.0 — 802.11n, HT20, MCS1 — –89.0 — 802.11n, HT20, MCS2 — –86.5 — 802.11n, HT20, MCS3 — –83.5 — 802.11n, HT20, MCS4 — –79.5 — 802.11n, HT20, MCS5 — –75.5 — 802.11n, HT20, MCS6 — –74.0 — 802.11n, HT20, MCS7 — –72.5 — 802.11n, HT40, MCS0 — –89.0 — 802.11n, HT40, MCS1 — –86.5 — 802.11n, HT40, MCS2 — –84.0 — 802.11n, HT40, MCS3 — –80.0 — 802.11n, HT40, MCS4 — –76.5 — 802.11n, HT40, MCS5 — –72.5 — 802.11n, HT40, MCS6 — –71.0 — 802.11n, HT40, MCS7 — –69.5 — Table 19: Maximum RX Level Min Typ Max Rate (dBm) (dBm) (dBm) 802.11b, 1 Mbps, DSSS — 5 — 802.11b, 11 Mbps, CCK — 5 — 802.11g, 6 Mbps, OFDM — 5 — 802.11g, 54 Mbps, OFDM — 0 — 802.11n, HT20, MCS0 — 5 — 802.11n, HT20, MCS7 — 0 — 802.11n, HT40, MCS0 — 5 — Cont’d on next page Espressif Systems 19 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Table 19 – cont’d from previous page Min Typ Max Rate (dBm) (dBm) (dBm) 802.11n, HT40, MCS7 — 0 — Table 20: Adjacent Channel Rejection Min Typ Max Rate (dB) (dB) (dB) 802.11b, 1 Mbps, DSSS — 35 — 802.11b, 11 Mbps, CCK — 35 — 802.11g, 6 Mbps, OFDM — 31 — 802.11g, 54 Mbps, OFDM — 14 — 802.11n, HT20, MCS0 — 31 — 802.11n, HT20, MCS7 — 13 — 802.11n, HT40, MCS0 — 19 — 802.11n, HT40, MCS7 — 8 — Espressif Systems 20 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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5 Module Schematics
This is the reference design of the module. D D C C B B A A The values of C11, L2 and C12 vary with the actual PCB board. The values of C1 and C4 vary with the selection of the crystal. The value of R4 varies with the actual PCB board. ESP32-S2-SOLO(pin-out) ESP32-S2 ESP32-S2R2 NC: No component. 50 ohm Impedance Control SPICLK SPICS0 SPIHD SPID SPIWP SPIQ GPIO0 GPIO1 GPIO2 GPIO4 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 SPIHD SPIWP SPID SPIQ SPICS0 LNA_INRF_ANT GPIO39 GPIO40 GPIO41 GPIO42 U0RXD GPIO46 CHIP_PU GPIO45 U0TXD SPICLK GPIO8 GPIO5 GPIO6 GPIO7 CHIP_PU GPIO4 GPIO5 GPIO6 GPIO7 GPIO15 GPIO16 GPIO17 GPIO18 GPIO3 GPIO46 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO21 GPIO33 GPIO34 GPIO45 GPIO0 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 U0RXD U0TXD GPIO2 GPIO1 GPIO3 GPIO19 GPIO20 GPIO8 VDD_SPI GND GND GND GND VDD33 GND GND GND GNDGND GND GND VDD33 VDD33 GND GNDGND VDD33 GND GNDGND VDD33 GND VDD33 GND GND GND VDD33 VDD_SPI GNDVDD33 GND GND VDD33 C11 TBD C12 TBD C13 0.1uF TBD ESD R3 499 10K(NC) C14 1uF VDDA1 LNA_IN2 VDD3P33 VDD3P34 GPIO05 GPIO16 GPIO27 GPIO38 GPIO49 GPIO510 GPIO611 GPIO712 GPIO1015 GPIO1116 GPIO1217 GPIO1318 GPIO1419 XTAL_32K_P21 VDD3P3_RTC20 XTAL_32K_N22 DAC_123 DAC_224 GPIO1925 GPIO2026 VDD_SPI 30 SPICS1 29 SPIWP 32SPICS0 33 SPIQ 35SPID 36 SPICLK 34 GPIO33 37 GND 57 GPIO34 38GPIO35 39 MTCK 43 GPIO46 55 VDDA 51XTAL_N 52XTAL_P 53 MTMS 47 MTDO 44 U0TXD 48 VDD3P3_CPU 45 CHIP_PU 56 VDDA 54 MTDI 46 GPIO813 GPIO914 VDD3P3_RTC_IO27 GPIO2128 SPIHD 31 GPIO36 40GPIO37 41GPIO38 42 U0RXD 49GPIO45 50C9 NC 10uF L1 2.0nH 10K(NC) U2 FLASH-3V3 VDD 8GND4 /CS1 CLK6 /HOLD7 /WP 3 DO 2 DI 5 C10 0.1uF 40MHz(±10ppm) XIN1 GND2 XOUT 3 GND 4 100pF L2 TBD 1uF TBD ANT1 PCB_ANT U3 ESP32-S2-SOLO GND1 3V32 EN3 IO44 IO55 IO66 IO77 IO158 IO169 IO1710 IO1811 IO1913 IO2014 IO812 GND 40 IO1 39 IO2 38 TXD0 37 RXD0 36 IO42 35 IO41 34 IO40 33 IO39 32 IO38 31 IO37 30 IO36 29 IO35 28 IO0 27 IO4616 IO917 IO1018 IO1119 IO1220 IO1321 IO1422 IO2123 IO3324 IO3425 IO315 IO4526 EPAD 41 R10 0 1uF C16 0.1uF C15 0.1uF R4 0 0.1uF 0.1uF Figure 5: ESP32-S2-SOLO Schematics Espressif Systems 21 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) The values of C11, L2 and C12 vary with the actual PCB board. The values of C1 and C4 vary with the selection of the crystal. The value of R4 varies with the actual PCB board. ESP32-S2-SOLO-U(pin-out) ESP32-S2 ESP32-S2R2 NC: No component. 50 ohm Impedance Control SPICLK SPICS0 SPIHD SPID SPIWP SPIQ GPIO0 GPIO1 GPIO2 GPIO4 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 SPIHD SPIWP SPID SPIQ SPICS0 LNA_INRF_ANT GPIO39 GPIO40 GPIO41 GPIO42 U0RXD GPIO46 CHIP_PU GPIO45 U0TXD SPICLK GPIO8 GPIO5 GPIO6 GPIO7 CHIP_PU GPIO4 GPIO5 GPIO6 GPIO7 GPIO15 GPIO16 GPIO17 GPIO18 GPIO3 GPIO46 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO21 GPIO33 GPIO34 GPIO45 GPIO0 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 U0RXD U0TXD GPIO2 GPIO1 GPIO3 GPIO19 GPIO20 GPIO8 VDD_SPI GND GND GND GND VDD33 GND GND GND GNDGND GND GND VDD33 VDD33 GND GNDGND VDD33 GND GNDGND VDD33 GND VDD33 GND GND GND VDD33 VDD_SPI GNDVDD33 GND GND VDD33 C11 TBD C12 TBD C13 0.1uF TBD R3 499 10K(NC) C14 1uF VDDA1 LNA_IN2 VDD3P33 VDD3P34 GPIO05 GPIO16 GPIO27 GPIO38 GPIO49 GPIO510 GPIO611 GPIO712 GPIO1015 GPIO1116 GPIO1217 GPIO1318 GPIO1419 XTAL_32K_P21 VDD3P3_RTC20 XTAL_32K_N22 DAC_123 DAC_224 GPIO1925 GPIO2026 VDD_SPI 30 SPICS1 29 SPIWP 32SPICS0 33 SPIQ 35SPID 36 SPICLK 34 GPIO33 37 GND 57 GPIO34 38GPIO35 39 MTCK 43 GPIO46 55 VDDA 51XTAL_N 52XTAL_P 53 MTMS 47 MTDO 44 U0TXD 48 VDD3P3_CPU 45 CHIP_PU 56 VDDA 54 MTDI 46 GPIO813 GPIO914 VDD3P3_RTC_IO27 GPIO2128 SPIHD 31 GPIO36 40GPIO37 41GPIO38 42 U0RXD 49GPIO45 50C9 NC 10uF L1 2.0nH 10K(NC) U2 FLASH-3V3 VDD 8GND4 /CS1 CLK6 /HOLD7 /WP 3 DO 2 DI 5 C10 0.1uF 40MHz(±10ppm) XIN1 GND2 XOUT 3 GND 4 100pF L2 TBD 1uF ESD TBD ANT1 CONN U3 ESP32-S2-SOLO-U GND1 3V32 EN3 IO44 IO55 IO66 IO77 IO158 IO169 IO1710 IO1811 IO1913 IO2014 IO812 GND 40 IO1 39 IO2 38 TXD0 37 RXD0 36 IO42 35 IO41 34 IO40 33 IO39 32 IO38 31 IO37 30 IO36 29 IO35 28 IO0 27 IO4616 IO917 IO1018 IO1119 IO1220 IO1321 IO1422 IO2123 IO3324 IO3425 IO315 IO4526 EPAD 41 R10 0 1uF C16 0.1uF C15 0.1uF R4 0 0.1uF 0.1uF Figure 6: ESP32-S2-SOLO-U Schematics Espressif Systems 22 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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6 Peripheral Schematics
This is the typical application circuit of the module connected with peripheral components (for example, power supply, antenna, reset button, JTAG interface, and UART interface). D D C C B B A A NC: No component. X1: ESR = Max. 70 Kȍ EN IO42 TMS IO41 TDI IO37 IO36 IO38 IO40 TDO IO39 TCK RXD0 TXD0 IO35 IO34 IO33 IO12 IO13 IO3 IO6 IO7 IO9 IO10 IO11 IO15 IO16 IO14 IO21 IO17 IO18 USB_D- USB_D+ IO1 IO2 IO45 IO4 IO5 IO0 EN IO19 IO20 IO46 IO8 GND GND GND VDD33 GND GND GND GND GND VDD33 GNDGND GND GND SW1 0.1uF C4 12pF(NC) JP4 Boot Option 11 22 ESP32-S2-SOLO/ESP32-S2-SOLO-U GND1 3V32 EN3 IO44 IO55 IO66 IO77 IO158 IO169 IO1710 IO1811 IO1913 IO2014 IO812 GND 40 IO1 39 IO2 38 TXD0 37 RXD0 36 IO42 35 IO41 34 IO40 33 IO39 32 IO38 31 IO37 30 IO36 29 IO35 28 IO0 27 IO4616 IO917 IO1018 IO1119 IO1220 IO1321 IO1422 IO2123 IO3324 IO3425 IO315 IO4526 EPAD 41 R7 0 R4 0 R1 TBD 32.768KHz(NC) R2 NC R5 0(NC) TBD R3 0(NC) JP1 UART 22uF C8 0.1uF R6 0 JP3 USB OTG 1 12 2 C2 TBD JP2 JTAG C7 12pF(NC) TBD Figure 7: Peripheral Schematics
- Soldering the EPAD to the ground of the base board is not a must, however, it can optimize thermal performance. If you choose to solder it, please apply the correct amount of soldering paste. Too much soldering paste may increase the gap between the module and the baseboard. As a result, the adhesion between other pins and the baseboard may be poor.
- To ensure that the power supply to the ESP32-S2 chip is stable during power-up, it is advised to add an RC delay circuit at the EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ and C = 1µF. However, specific parameters should be adjusted based on the power-up timing of the module and the power-up and reset sequence timing of the chip. For ESP32-S2’s power-up and reset sequence timing diagram, please refer toESP32-S2 Series Datasheet> SectionPower Scheme. Espressif Systems 23 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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7 Physical Dimensions and PCB Land Pattern
7 .1Physical Dimensions Figure 8: ESP32-S2-SOLO Physical Dimensions Figure 9: ESP32-S2-SOLO-U Physical Dimensions Note: For information about tape, reel, and product marking, please refer toEspressif Module Packaging Information. Espressif Systems 24 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) 7 .2 Recommended PCB Land Pattern This section provides the following resources for your reference:
- Figures for recommended PCB land patterns with all the dimensions needed for PCB design. See Figure
10 ESP32-S2-SOLO Recommended PCB Land Patternand Figure11 ESP32-S2-SOLO-U Recommended
PCB Land Pattern.
- Source files of recommended PCB land patterns to measure dimensions not covered in Figure10. You can view the source files forESP32-S2-SOLO and ESP32-S2-SOLO-U with Autodesk Viewer.
- 3D models ofESP32-S2-SOLO and ESP32-S2-SOLO-U. Please make sure that you download the 3D model file in .STEP format (beware that some browsers might add .txt). Figure 10: ESP32-S2-SOLO Recommended PCB Land Pattern Espressif Systems 25 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Figure 11: ESP32-S2-SOLO-U Recommended PCB Land Pattern Espressif Systems 26 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) 7 .3 Dimensions of External Antenna Connector ESP32-S2-SOLO-U uses the first generation external antenna connector as shown in Figure12 Dimensions of External Antenna Connector. This connector is compatible with the following connectors:
- U.FL Series connector from Hirose
- MHF I connector from I-PEX
- AMC connector from Amphenol Unit: mm Figure 12: Dimensions of External Antenna Connector Espressif Systems 27 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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8 Product Handling
8.1 Storage Conditions
The products sealed in moisture barrier bags (MBB) should be stored in a non-condensing atmospheric environment of < 40 °C and 90%RH. The module is rated at the moisture sensitivity level (MSL) of 3. After unpacking, the module must be soldered within 168 hours with the factory conditions 25±5 °C and 60%RH. If the above conditions are not met, the module needs to be baked.
8.2 Electrostatic Discharge (ESD)
- Human body model (HBM): ±2000 V
- Charged-device model (CDM): ±500 V
8.3 Soldering Profile
8.3.1 Reflow Profile
Solder the module in a single reflow. 50 150 1 ~ 3 ℃/s 200 250 200 –1 ~ –5 ℃/s Cooling zone 100 217 100 250 Reflow zone !217 ℃ 60 ~ 90 s Temperature (℃) Preheating zone 150 ~ 200 ℃ 60 ~ 120 s Ramp-up zone Peak Temp. 235 ~ 250 ℃ Soldering time > 30 s Time (sec.) Ramp-up zone — Temp. : 25 ~ 150 ℃ Time: 60 ~ 90 s Ramp-up rate: 1 ~ 3 ℃/s Preheating zone — Temp.: 150 ~ 200 ℃ Time: 60 ~ 120 s Reflow zone — Temp.: >217 ℃ 7LPH 60 ~ 90 s; Peak Temp.: 235 ~ 250 ℃ Time: 30 ~ 70 s Cooling zone — Peak Temp. ~ 180 ℃ Ramp-down rate: –1 ~ –5 ℃/s Solder — Sn-Ag-Cu (SAC305) lead-free solder alloy Figure 13: Reflow Profile Espressif Systems 28 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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8.4 Ultrasonic Vibration
Avoid exposing Espressif modules to vibration from ultrasonic equipment, such as ultrasonic welders or ultrasonic cleaners. This vibration may induce resonance in the in-module crystal and lead to its malfunction or even failure. As a consequence,the module may stop working or its performance may deteriorate. Espressif Systems 29 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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9 MAC Addresses and eFuse
The eFuse in ESP32-S2 series of chips has been burnt into 48-bit mac_address. The actual addresses the chip uses in station or AP modes correspond to mac_address in the following way:
- Station mode: mac_address
- AP mode: mac_address + 1 There are seven blocks in eFuse for users to use. Each block is 256 bits in size and has independent write/read disable controller. Six of them can be used to store encrypted key or user data, and the remaining one is only used to store user data. Espressif Systems 30 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Related Documentation and Resources Related Documentation and Resources Related Documentation
- ESP32-S2 Series Datasheet – Specifications of the ESP32-S2 hardware.
- ESP32-S2 TechnicalReferenceManual – Detailed information on how to use the ESP32-S2 memory and periph- erals.
- ESP32-S2 HardwareDesign Guidelines – Guidelines on how to integrate the ESP32-S2 into your hardware product.
- ESP32-S2 Series SoC Errata – Descriptions of known errors in ESP32-S2 series of SoCs.
- Certificates https:/ /espressif.com/en/support/documents/certificates
- ESP32-S2 Product/Process Change Notifications (PCN) https:/ /espressif.com/en/support/documents/pcns?keys=ESP32-S2
- ESP32-S2 Advisories– Information on security, bugs, compatibility, component reliability. https:/ /espressif.com/en/support/documents/advisories?keys=ESP32-S2
- Documentation Updates and Update Notification Subscription https:/ /espressif.com/en/support/download/documents Developer Zone
- ESP-IDF Programming Guide for ESP32-S2 – Extensive documentation for the ESP-IDF development framework.
- ESP-IDF and other development frameworks on GitHub. https:/ /github.com/espressif
- ESP32 BBS Forum– Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions, share knowledge, explore ideas, and help solve problems with fellow engineers. https:/ /esp32.com/
- The ESP Journal– Best Practices, Articles, and Notes from Espressif folks. https:/ /blog.espressif.com/
- See the tabsSDKs and Demos, Apps, Tools, AT Firmware. https:/ /espressif.com/en/support/download/sdks-demos Products
- ESP32-S2 Series SoCs– Browse through all ESP32-S2 SoCs. https:/ /espressif.com/en/products/socs?id=ESP32-S2
- ESP32-S2 Series Modules– Browse through all ESP32-S2-based modules. https:/ /espressif.com/en/products/modules?id=ESP32-S2
- ESP32-S2 Series DevKits– Browse through all ESP32-S2-based devkits. https:/ /espressif.com/en/products/devkits?id=ESP32-S2
- ESP Product Selector– Find an Espressif hardware product suitable for your needs by comparing or applying filters. https:/ /products.espressif.com/#/product-selector?language=en Contact Us
- See the tabsSales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples (Online stores),Become Our Supplier, Comments & Suggestions. https:/ /espressif.com/en/contact-us/sales-questions Espressif Systems 31 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
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Revision History
Date Version Release notes 2024-09-05 v1.8 • Marked ESP32-S2-SOLO-N4, ESP32-S2-SOLO-N4R2, ESP32-S2-SOLO- U-H4 and ESP32-S2-SOLO-U-H4R2 as end of life 2024-04-23 v1.7
- Marked ESP32-S2-SOLO-H4 and ESP32-S2-SOLO-U-H4 as end of life, and other variants as NRND
- According to PCN20230601 and PCN20230702, upgraded the chip ESP32-S2 and ESP32-S2R2 from chip revision v0.0 to chip revision v1.0, and information in Section4.4.1 Power Consumption in Active Mode, Section 4.5 Wi-Fi RF Characteristics, and Section6 Peripheral Schemat- ics is updated to that of chip revision v1.0 accordingly 2023-05-25 v1.6
- Changed T ableOrdering Informationto T ableESP32-S2-SOLO (ANT) Se- ries Comparison1 and T ableESP32-S2-SOLO-U (CONN) Series Compari- son
- Added links to some reference documents in Section1 Module Overview
- Updated EPAD descriptions in Section6 Peripheral Schematics
- Added descriptions in Section7 .2Recommended PCB Land Pattern
- Other formatting updates 2022-09-23 v1.5 • Added Section8.4 Ultrasonic Vibration
- Removed NRND watermark 2022-03-01 v1.4
- Added module pictures on the title page
- Added NRND watermark
- Updated Section ”Learning Resources” and renamed to ”Related Docu- mentation and Resources”
- Added a note with a link and QR code to the latest version of the docu- ment
- Updated T able13 Current Consumption in Modem-sleep Modeand T able
14 Current Consumption in Low-Power Modes
Cont’d on next page Espressif Systems 32 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Cont’d from previous page Date Version Release notes 2021-06-21 v1.3
- Added module variants embedded with the ESP32-S2R2 chip
- Added module description to the title page
- Updated Chapter1 Module Overview
- Updated Pin Layout (Top View), in which IO3, IO46 and IO45 are newly added
- Updated Figure10 ESP32-S2-SOLO Recommended PCB Land Pattern
- Added description in Section7 .3Dimensions of External Antenna Con- nector
- Replaced ”chip family” with ”chip series” following Espressif’s taxonomy 2020-12-17 v1.2
- Added TWAI to Chapter1 Module Overview
- Updated T able12 Current Consumption for Wi-Fi (2.4 GHz) in Active Mode
- Updated the capacitance value of RC delay circuit to 1µF in Chapter6 Peripheral Schematics
- Updated note in Section8.3.1Reflow Profile 2020-07-31 v1.1 Updated notes in T able Ordering Information 2020-07-22 v1.0 Official release 2020-05-19 v0.1 Preliminary release Espressif Systems 33 Submit Documentation Feedback ESP32-S2-SOLO & SOLO-U Datasheet v1.8
End of Life (EOL) Disclaimer and Copyright Notice Information in this document, including URL references, is subject to change without notice. ALL THIRD PARTY’S INFORMATION IN THIS DOCUMENT IS PROVIDED AS IS WITH NO WARRANTIES TO ITS AUTHENTICITY AND ACCURACY . NO WARRANTY IS PROVIDED TO THIS DOCUMENT FOR ITS MERCHANTABILITY , NON-INFRINGEMENT , FITNESS FOR ANY PARTICULAR PURPOSE, NOR DOES ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. All liability, including liability for infringement of any proprietary rights, relating to use of information in this document is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rights are granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a registered trademark of Bluetooth SIG. All trade names, trademarks and registered trademarks mentioned in this document are property of their respective owners, and are hereby acknowledged. Copyright © 2024 Espressif Systems (Shanghai) Co., Ltd. All rights reserved. www.espressif.com