CHR3394-QEG UMS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 14
Technical content
Ref. : DSCHR3394-QEG1192 - 11 Jul 11 1/14 Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Route Départementale 128 - BP46 - 91401 Orsay Cedex France Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 37-40GHz Integrated Down Converter GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHR3394-QEG is a multifunction monolithic receiver, which integrates a balanced cold FET mixer, a LO chain with buffers associated to a time two multiplier, and a RF low noise amplifier. It is designed for a wide ra nge of applications, from military to commercial communication systems. The circuit is manufactured with a pHEMT process, 0.15µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in RoHS compliant SMD package. Main Features ■ Broadband performances: 37-40GHz ■ 13dB Conversion gain ■ 15dBc Image Rejection ■ 1dBm IIP3 ■ 3.5dB Noise Figure for IF>0.1GHz ■ 0dBm LO input Power ■ DC bias: Vd=4V @ Id=250mA ■ 24L-QFN4x5 ■ MSL1 Main Characteristics Tamb.= +25°C Symbol Parameter Min Typ Max Unit FRF RF frequency range 37 40 GHz FLO LO frequency range 17.5 21.0 GHz FIF IF frequency range DC 3.5 GHz G Conversion gain 13 dB UMS R3394 YYWW UMS R3394 YYWW UMS R3394 YYWW 35 36 37 38 39 40 41 Conversion Gain (dB) RF Frequency (GHz) USB LSB Conversion gain @ IF 2GHz (USB & LSB modes)
CHR3394-QEG 37-40GHz Integrated Down Converter Ref. : DSCHR3394-QEG1192 - 11 Jul 11 2/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Main Characteristics Tamb.= +25°C, VD = VD1 = +4V (1) Symbol Parameter Min Typ Max Unit FRF RF frequency range 37 40 GHz FLO LO frequency range 17.5 21.0 GHz FIF IF frequency range DC 3.5 GHz G Conversion gain (2) 13 dB NF Noise Figure for IF>0.1GHz 3.5 dB Im_rej Image rejection (2) 15 dBc PLO LO Input power 0 dBm IIP3 Input IP3 1 dBm LO RL LO return loss -12 dB RF RL RF return loss -6 dB VGL LNA DC gate voltage -0.1 V VGX Multiplier DC gate voltage -0.9 V IDt Total Drain current (ID+ID1) (3) 250 mA These values are representative of on-board measurements. (1) VD: LO-chain drain bias voltage. VD1: LNA drain bias voltage. (2) An external combiner 90° is required on I/Q. (3) ID: LO-chain drain current, typically 125mA. (3) ID1: LNA drain current, typically 125mA, should be tuned with VGL. Electrostatic discharge sensitive device observe handling precautions!
37-40GHz Integrated Down Converter CHR3394-QEG Ref. : DSCHR3394-QEG1192 - 11 Jul 11 3/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Absolute Maximum Ratings (1) Tamb.= +25°C Symbol Parameter Values Unit VD, VD1 Drain bias voltages 4.5V V IDt Drain bias current 340 mA VGL, VGX Gate bias voltages -2 to +0.4 V P_RF Maximum peak input power overdrive (2) +15 dBm P_LO Maximum LO input power +15 dBm Tj Junction temperature 175 °C Ta Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to +155 °C (1) Operation of this device above anyone of these parameters may cause permanent damage. (2) Duration < 1s. Typical Bias Conditions Tamb.= +25°C Symbol Pad No Parameter Values Unit VD1, VD 10, 11 DC drain voltages (LNA and LO-chain) 4 V ID1 10 LNA drain current controlled with VGL 125 mA VGL 9 LNA DC gate voltage -0.1 V VGX 12 Multiplier DC gate voltage -0.9 V
CHR3394-QEG 37-40GHz Integrated Down Converter Ref. : DSCHR3394-QEG1192 - 11 Jul 11 4/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Device thermal performances All the figures given in this section are obtained assuming that the QFN device is cooled down only by conduction through the package thermal pad (no convection mode considered). The temperature is monitored at the package back-side interface (Tcase) as shown below. The system maximum temperature must be adjusted in order t o guarantee that Tcase remains below than the maximum value specified in the next table. So, the system PCB must be designed to comply with this requirement. A derating must be applied on the dissipated power if the Tcase temperature can not be maintained below than the maximum temperature specified (see the curve Pdiss. Max) in order to guarantee the nominal device life time (MTTF). Recommended max. junction temperature (Tj max) : 147 °C Junction temperature absolute maximum rating : 175 °C Max. continuous dissipated power @ Tcase= 85 °C : 1 W => Pdiss derating above Tcase(1)= 85 °C : 16 mW/°C Junction-Case thermal resistance (Rth J-C)(2) : <62 °C/W Min. package back side operating temperature(3) : -40 °C Max. package back side operating temperature(3) : 85 °C Min. storage temperature : -55 °C Max. storage temperature : 155 °C (1) Derating at junction temperature constant = Tj max (2) Rth J-C is calculated for a worst case where the hotter junction of the MMIC is considered. (3) Tcase=Package back side temperature measured under the die-attach-pad (see the drawing below). 5.8 DEVICE THERMAL SPECIFICATION : CHR3394-QEG 0.2 0.4 0.6 0.8 1.2 -50 -25 0 25 50 75 100 125 Tcase (°C) Pdiss. Max. (W) Pdiss. Max. (W) Tcase Example of QFN 16L 3x3 back-side view, temperature reference point (Tcase) location.
37-40GHz Integrated Down Converter CHR3394-QEG Ref. : DSCHR3394-QEG1192 - 11 Jul 11 5/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Typical Board Measurements Tamb.= +25°C, VD = VD1 =+4V, VGL = -0.1V, VGX = -0.9V, P_LO = 0dBm (IDt = 250mA) These values are representative of onboard measurements as defined on the drawing in paragraph "Evaluation mother board". Data given in the package access planes. Conversion Gain versus RF & IF frequency (USB & LSB modes) Noise figure versus RF frequency at IF 3GHz 35 36 37 38 39 40 41 Conversion Gain (dB) RF Frequency (GHz) LSB- 2GHz USB- 2GHz LSB- 3.5GHz USB- 3.5GHz 35 36 37 38 39 40 41 42 Noise figure (dB) RF Frequency (GHz) USB LSB
CHR3394-QEG 37-40GHz Integrated Down Converter Ref. : DSCHR3394-QEG1192 - 11 Jul 11 6/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Typical Board Measurements Tamb.= +25°C, VD = VD1 = +4V, VGL = -0.1V, VGX = -0.9V, P_LO = 0dBm (IDt = 250mA) Image rejection versus RF & IF frequency Return Losses (LO & RF) versus frequency 35 36 37 38 39 40 41 Image rejection (dBc) RF Frequency (GHz) LSB- 2GHz USB- 2GHz LSB- 3.5GHz USB- 3.5GHz -20 -18 -16 -14 -12 -10 0 5 10 15 20 25 30 35 40 45 Frequency (GHz) Return losses (dB) RF LO
37-40GHz Integrated Down Converter CHR3394-QEG Ref. : DSCHR3394-QEG1192 - 11 Jul 11 7/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Typical Board Measurements Tamb.= +25°C, VD = VD1 = +4V, VGL = -0.1V, VGX = -0.9V, P_LO = 0dBm (IDt = 250mA) Input IP3 vs RF frequency at IF 2GHz Input IP3 vs RF frequency at IF 3.5GHz IMD3 vs RF frequency at IF 2GHz IMD3 vs RF frequency at IF 3.5GHz IIP3 (dBm) Input Power DCL (dBm) 38GHz 39GHz 40GHz IIP3 (dBm) Input Power DCL (dBm) 37.5GHz 38.5GHz 39.5GHz 40.5GHz IMD3 (dBc) Input Power DCL (dBm) 38GHz 39GHz 40GHz IMD3 (dBc) Input Power DCL (dBm) 37.5GHz 38.5GHz 39.5GHz 40.5GHz
CHR3394-QEG 37-40GHz Integrated Down Converter Ref. : DSCHR3394-QEG1192 - 11 Jul 11 8/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Typical Board Measurements Tamb = +25°C, Tcold = -40°C, Thot = +85°C VD = VD1 = +4V, VGL = -0.1V, VGX = -0.9V, P_LO = 0dBm Conversion Gain versus temperature at IF 2 GHz (USB mode) Noise figure versus temperature at IF 2GHz (USB mode) 35 36 37 38 39 40 41 Conversion gain (dB) RF Frequency (GHz) 85°C 25°C -40°C 35 36 37 38 39 40 41 42 Noise Figure (dB) RF Frequency (GHz) 85°C 25°C -40°C
37-40GHz Integrated Down Converter CHR3394-QEG Ref. : DSCHR3394-QEG1192 - 11 Jul 11 9/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Typical Board Measurements Tamb = +25°C, Tcold = -40°C, Thot = +85°C VD = VD1 = +4V, VGL = -0.1V, VGX = -0.9V, P_LO = 0dBm Input IP3 versus temperature at 38GHz (IF 2GHz) IIP3 (dBm) Input Power DCL (dBm) 85°C 25°C -40°C
CHR3394-QEG 37-40GHz Integrated Down Converter Ref. : DSCHR3394-QEG1192 - 11 Jul 11 10/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Package outline (1) Matt tin, Lead Free (Green) 1- Nc 9- VGL 17- Gnd(2) Units : mm 2- Nc 10- VD1 18- Nc From the standard : JEDEC MO-220 3- Nc 11- VD 19- Nc (VGGD) 4- Gnd(2) 12- VGX 20- IF_I 25- GND 5- RF in 13- Nc 21- Gnd(2) 6- Gnd(2) 14- Nc 22- IF_Q 7- Nc 15- Gnd(2) 23- Nc 8- Nc 16- LO in 24- Nc (1) The package outline drawing included to this data-sheet is given for indication. Refer to the application note AN0017 (http://www.ums-gaas.com) for exact package dimensions. (2) It is strongly recommended to ground all pins marked “Gnd” through the PCB board. Ensure that the PCB board is designed to provide the best possible ground to the package.
37-40GHz Integrated Down Converter CHR3394-QEG Ref. : DSCHR3394-QEG1192 - 11 Jul 11 11/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Evaluation mother board ■ Compatible with the proposed footprint. ■ Based on typically Ro4003 / 8mils or equivalent. ■ Using a micro-strip to coplanar transition to access the package. ■ Recommended for the implementation of this product on a module board. ■ Decoupling capacitors of 10nF ±10% are recommended for all DC accesses. ■ See application note AN0017 for details. ■ Hybrid coupler 90° for 2-4GHz. IF_IIF_Q RF IN LO IN IF_IIF_Q RF IN LO IN
CHR3394-QEG 37-40GHz Integrated Down Converter Ref. : DSCHR3394-QEG1192 - 11 Jul 11 12/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Notes Due to ESD protection circuits on RF and LO inputs, an external capacitance might be requested to isolate the product from external voltage that could be present on these accesses. ESD protections are also implemented on gate access. The DC connections do not include any decoupling capacitor in package, therefore it is mandatory to provide a good external DC decoupling (10nF) on the PC board, as close as possible to the package. RF IN GND IF_Q IF_I NC VD1 NC NC VGL VD VGX20 1 2 3 4 5 6 141516171819 LO IN GND NC NC NC GND GND NC NC GND NC NC NC RF IN GND IF_Q IF_I NC VD1 NC NC VGL VD VGX20 1 2 3 4 5 6 141516171819 LO IN GND NC NC NC GND GND NC NC GND NC NC NC
37-40GHz Integrated Down Converter CHR3394-QEG Ref. : DSCHR3394-QEG1192 - 11 Jul 11 13/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 DC Schematic LNA: 4V, 125mA LO chain: 4V, 125mA VGL# -0.1V 34.5 43mA VD1 10mA 150 550 1.9k 16 RF 15mA 90 530 1.9k 16 2.5k 1.5k 26.5 53mA 1.5k VGL# -0.1V 34.5 43mA VD1 10mA 150150 550 1.9k 16 RF x4x4 15mA 9090 530 1.9k 16 2.5k 1.5k 26.5 53mA 1.5k 2k 200 185 30 16 VD 45mA 25mA @Pin=0dBm 50mA LO VGX=-0.9V 26 18 800 70 Mixer Gate 700 515 515
CHR3394-QEG 37-40GHz Integrated Down Converter Ref. : DSCHR3394-QEG1192 - 11 Jul 11 14/14 Specifications subject to change without notice Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 Recommended package footprint Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot print recommendations. SMD mounting procedure For the mounting process standard techniques involving solder paste and a suit able reflow process can be used. For further details, see application note AN0017. Recommended environmental management Refer to the application note AN0019 available at http://www.ums-gaas.com for environmental data on UMS package products. Recommended ESD management Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD sensitivity and handling recommendations for the UMS package products.
Ordering Information
QFN 4x5 RoHS compliant package: CHR3394-QEG/XY Stick: XY = 20 Tape & reel: XY = 21 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S. . Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S.