CHK015A-QIA

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Ref. : DSCHK015A-QIA5357 - 23 Dec 15 1/18 Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com 15W Power Packaged Transistor GaN HEMT on SiC

Description

The CHK015A-QIA is a n unmatched packaged Gallium Nitride High Electron Mobility Transistor. It offers general purpose and broadband solutions for a variety of RF power applications. It is well suited for multi-purpose applications such as radar and telecommunication. The CHK015A-QIA is developed on a 0.5µm gate length GaN HEMT process. It requires an external matching circuitry. It is proposed in low cost plastic package providing low parasitic and low thermal resistance. Main Features VDS = 50V, ID_Q = 100mA, Freq = 2.9GHz Pulsed mode (100µs, 10%) Performances on S-band Evaluation Board ■ Wide band capability: up to 6GHz ■ Pulsed and CW operating modes ■ High power: > 15W ■ High Efficiency: up to 70% ■ DC bias: Vd=50Volt @ Id=100mA ■ Low cost package: 14L-DFN3x4 ■ MTTF > 106 hours @ Tj=200°C Main Electrical Characteristics Tcase= +25°C, Pulsed mode, F = 3GHz, VDS=50V, ID_Q=100mA Symbol Parameter Min Typ Max Unit Gain Linear Gain 18 20 dB Pout Output Power 15 20 W PAE Max Power Added Efficiency 60 % GPAE_MAX Associated Gain at Max PAE 16 dB 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Drain Current (A) Gain (dB), Pout (dBm) & PAE (%) Input Power (dBm) PAE Pout Gain ID

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 2/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Recommended DC Operating Ratings Tcase= +25°C Symbol Parameter Min Typ Max Unit Conditions VDS Drain to Source Voltage 50 V VGS_Q Gate to Source Voltage -1.9 V VD=50V. ID_Q=100mA ID_Q Quiescent Drain Current 0.1 0.35 A VD=50V ID_MAX Drain Current 0.65 (1) A VD=50V. compressed mode IG_MAX Gate Current (forward mode) 0 24 mA Compressed mode Tj_MAX Junction temperature(1) 200 °C (1) Power dissipation must be considered DC Characteristics Tcase= +25°C Symbol Parameter Min Typ Max Unit Conditions VP Pinch-Off Voltage -3 -2 -1 V VD=50V. ID= IDSS /100 ID_SAT Saturated Drain Current 2.7 (1) A VD=7V. VG=2V IG_leak Gate Leakage Current (reverse mode) -0.8 mA VD=50V. VG=-7V VBDS Drain-Source Break-down Voltage 180 V VG=-7V. ID=20mA RTH Thermal Resistance (2) 6 °C/W CW (1) For information, limited by ID_MAX . see on Absolute Maximum Ratings (2) CW mode, reference = package back-side RF Characteristics Tcase= +25°C. Pulsed mode Symbol Parameter Min Typ Max Unit Conditions GSS Small Signal Gain @ 3GHz Small Signal Gain @ 6GHz dB dB VD=50V. ID_Q=100mA PSAT Saturated Output Power 15 20 W VD=50V. ID_Q=100mA PAE Max PAE @ 3GHz Max PAE @ 6GHz VD=50V. ID_Q=100mA GPAE_MAX Associated Gain at Max PAE @ 3GHz @ 6GHz dB dB VD=50V. ID_Q=100mA These values are the intrinsic performance of the packaged device. They are deduced from measurements and simulations. They are considered in the reference plane defined by the leads of the package, at the connection interface with the PCB. The typical pe rformance achievable in more than 10% frequency band around 3GHz was demonstrated using the reference board 61502522 presented hereafter.

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 3/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Absolute Maximum Ratings Tcase= +25°C(1) (2) (3) Symbol Parameter Rating Unit Note VDS Drain-Source Biasing Voltage 60 V VGS_Q Gate-Source Biasing Voltage -10. +2 V IG_MAX Maximum Gate Current (forward mode) 48 mA IG_MIN Minimum Gate Current (reverse mode) -2 mA ID_MAX Maximum Drain Current 2 A (4) PIN Maximum Input Power (5) Tj Junction Temperature 220 °C TSTG Storage Temperature -55 to +150 °C TCase Case Operating Temperature See note °C (4) (1) Operation of this device above anyone of these parameters may cause permanent damage. (2) Duration < 1s. (3) The given values must not be exceeded at the same time even momentarily for any parameter, since each parameter is independent from each other. Otherwise deterioration or destruction of the device may take place. (4) Max junction temperature must be considered (5) Linked to and limited by I G_MAX & I G_MIN values. Maximum input power depends on frequency. Simulated Source and Load Impedances VDS = 50V. ID_Q = 100mA Frequency (MHz) Zs Zl Pout (W) PAE (%) The impedances are chosen as a trade -off between Output Power. PAE and Stability of the device. These values are given in the reference plane defined by the connection between the transistor leads and the PCB according to the footprint above mentioned Zl Zs

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 4/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Simulated Package Sij parameters Tamb. = +25°C. VDS = 50V. ID_Q = 100mA Freq (GHz) S11 (dB) PhS11 (°) S12 (dB) PhS12 (°) S21 (dB) PhS21 (°) S22 (dB) PhS22 (°) These values are given in the reference plane defined by the connection between the transistor leads and the PCB according to the footprint previously mentioned

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 5/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Simulated S-parameters Tcase = +25°C. CW mode. VDS=50V. ID_Q=100mA. 0 1 2 3 4 5 6 7 8 9 10 11 S parameters (dB) Frequency (GHz) S11 S22 -40 -30 -20 -10 0 1 2 3 4 5 6 7 8 9 10 11 S parameters (dB) Frequency (GHz) S21 S12+20dB

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 6/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Simulated Maximum Gain & Stability Characteristics Tcase= +25°C. CW mode. VDS=50V. ID_Q=100mA 0 1 2 3 4 5 6 7 8 9 10 11 K Factor MSG/MAG (dB) Frequency (GHz) MSG/MAG K

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 7/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Performance on Evaluation Board (ref 61502522) Calibration and measurements are done on the connector access planes of the evaluation boards. Tamb. = +25°C. Pulsed Mode (1). VDS=50V. ID_Q=100mA Pout. PAE. Gain & ID @ Freq=2.9GHz Pout. PAE. Gain & ID @ Pin=27dBm (1) Input RF and gate voltage are pulsed. Conditions are 100µs width. 10% duty cycle and 1µs offset between DC and RF pulse. 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Drain Current (A) Gain (dB), Pout (dBm) & PAE (%) Input Power (dBm) PAE Pout Gain ID 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 Drain Current (A) Gain (dB), Pout (dBm) & PAE (%) Frequency (GHz) Gain ID Pout PAE

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 8/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Performance on Evaluation Board (ref 61502522) Calibration and measurements are done on the connector access planes of the evaluation boards. Tamb. = +25°C. Pulsed Mode (1). VDS=50V. ID_Q=100mA Pout. PAE. Gain & ID @ Pin=30dBm (1) Input RF and gate voltage are pulsed. Conditions are 100µs width. 10% duty cycle and 1µs offset between DC and RF pulse. 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Drain Current (A) Gain (dB), Pout (dBm) & PAE (%) Frequency (GHz) Gain ID Pout PAE

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 9/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Performance on Evaluation Board (ref 61502522) Calibration and measurements are done on the connector access planes of the evaluation boards. Tamb. = +25°C. CW mode. VDS=50V. ID_Q=100mA S parameters versus frequency -35 -30 -25 -20 -15 -10 Sij (dB) Frequency (GHz) S11 S21 S22

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 10/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Performance in Temperature (on Evaluation Board) Calibration and measurements are done on the connector access planes of the evaluation boards. Tamb. = -40°C, +80°C, Pulsed Mode (1), VDS=50V, ID_Q=100mA Pout, PAE, Gain & Id @ 2.9GHz & -40°C Pout, PAE, Gain & Id @ 2.9GHz & +80°C (1) Input RF and gate voltage are pulsed. Conditions are 100µs width, 10% duty cycle and 1µs offset between DC and RF pulse. 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 Drain Current (A) Gain (dB), Pout (dBm) & PAE (%) Input Power (dBm) PAE Pout Gain ID -40°C 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 Drain Current (A) Gain (dB), Pout (dBm) & PAE (%) Input Power (dBm) PAE Pout Gain ID 80°C

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 11/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Performance in Temperature (on Evaluation Board) Calibration and measurements are done on the connector access planes of the evaluation boards. Tamb. = -40°C, +25°C, +85°C, CW mode. VDS=50V, ID_Q=100mA (fixed @ +25°C) Linear Gain versus temperature with ID_Q fixed @ each temperature (100mA) Input Return Loss versus temperature with ID_Q fixed @ each temperature (100mA) Linear Gain (dB) Frequency (GHz) -40 C 25 C 85 C -15 -10 Input Return Loss (dB) Frequency (GHz) -40 C 25 C 85 C

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 12/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Typical Performance in Temperature (on Evaluation Board) Calibration and measurements are done on the connector access planes of the evaluation boards. Tamb. = -40°C, +25°C, +85°C, CW mode. VDS=50V, ID_Q=100mA (fixed @ +25°C) Output Return Loss versus temperature with ID_Q fixed @ each temperature (100mA) -35 -30 -25 -20 -15 -10 Output Return Loss (dB) Frequency (GHz) -40 C 25 C 85 C

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 13/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Demonstration Amplifier Low Frequency Equivalent Schematic (Ref. 61502522) Demonstration Amplifier Bill of Materials (Ref. 61502522) Designator Type Value - Description Qty 24 Capacitor 1pF. +/- 0.1pF. 0603 1 16 Capacitor 4.7pF. +/- 0.25pF. 0603 1 17 Capacitor 3.9pF. +/- 0.25pF. 0603 1 18 Capacitor 20pF. +/- 5%. 0603 2 20 Capacitor 100pF. +/- 5%. 0603 1 21 Capacitor 1nF. +/- 5%. 0805 1 9 Capacitor 1µF. +/- 10%. 1210 1 3 Capacitor 68µF. +/- 20% 1 25 Resistor 49.9Ω. +/- 1%. 0603 1 19 Resistor 3Ω +/- 1%. 0603 3 30 Resistor 100Ω +/- 1%. 0603 1 J1 Connector CMS 6cts 1 J2. J3 Connector SMA 2 Q1 Packaged Transistor CHK015A-QIA 1 - PCB TACONIC RF35P h=0.203mm - J2 J324 IN OUT Vg + Vd+

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 14/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Demonstration Amplifier Circuit Outline (Ref. 61502522)

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 15/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Demonstration Amplifier Circuit (Ref. 61502522)

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 16/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Package outline Matte tin. Lead Free (Green) 1- Nc 6- Nc 11- D2 Units : mm 2- Nc 7- Nc 12- D1 From the standard : JEDEC MO-220 3- G1 8- Gnd 13- Nc 4- G2 9- Nc 14- Gnd 15- Gnd 5- G3 10- D3 (A) Tcase locates the reference point used to monitor the device temperature. This point has been taken at the device / system interface to ease system thermal design. Tcase (A) (°C)

15W Power Packaged Transistor CHK015A-QIA Ref. : DSCHK015A-QIA5357 - 23 Dec 15 17/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Notes

CHK015A-QIA 15W Power Packaged Transistor Ref. : DSCHK015A-QIA5357 - 23 Dec 15 18/18 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 - www.ums-gaas.com Recommended package footprint Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot print recommendations. SMD mounting procedure For the mounting process standard techniques involving solder paste and a suit able reflow process can be used. For further details, see application note AN0017. Recommended environmental management UMS products are compliant with the regulation in particular with the directives RoHS N°2011/65 and REACh N°1907/2006. More environmental data are available in the application note AN0019 also available at http://www.ums-gaas.com. Recommended ESD management Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD sensitivity and handling recommendations for the UMS package products.

Ordering Information

DFN 3x4 package: CHK015A-QIA/XY Stick: XY = 20 Tape & reel: XY = 21 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S. . Specifications mentioned in thi s publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S.