CHA3092

CHA3092_15 UMS | Alldatasheet

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Technical content

Ref. :DSCHA30920356 21-Dec.-00 1/6 Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Route Départementale 128 - B.P.46 - 91401 Orsay Cedex France Tel. : +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 20-33GHz Medium Power Amplifier GaAs Monolithic Microwave IC

Description

The CHA3092 is a high gain broadband four- stage monolithic medium power amplifier. It is designed for a wide range of applications, from military to commercial communication systems. The backside of the chip is both RF and DC grounds. This helps simplify the assembly process. A B.I.T. ( Build In Test ) monitors a DC voltage that is representative of the microwave output power. The circuit is manufactured with a pHEMT process, 0.25µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is available in chip form. Main Features ■ Broadband performances: 20-33GHz ■ 20dBm output power. ■ 22dB ±1.0dB gain ■ Very good broadband input matching ■ On chip output power level DC detector ■ Low DC power consumption, 300mA @ 3.5V ■ Chip size: 0.88 X 1.72 X 0.10mm Vg1 Vg2 Vg3,4 Vdet Vd2,3,4 Vd1 IN OUT DI Typical on wafer measurements Input Rloss: solid line & output Rloss: dash line Main Characteristics Tamb. = 25° C Symbol Parameter Min Typ Max Unit Fop Operating frequency range 20 33 GHz G Small signal gain 20 22 dB P03 Output power at 3dB gain compression 20 23 dBm Id_ small signal Bias current 300 400 mA ESD Protection : Electrostatic discharge sensitive device. Observe handling precautions !

CHA3092 20-33GHz Medium Power Amplifier Ref. : DSCHA30920356 21-Dec.-00 2/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Electrical Characteristics for Broadband Operation Tamb = +25° C, Vd1,2,3,4 = 3.5V recommended Symbol Parameter Min Typ Max Unit Fop Operating frequency range (1) 20 33 GHz G Small signal gain (1) 20 22 dB ΔG Small signal gain flatness (1) ±1.0 dB Is Reverse isolation (1) 50 dB P1dB Pulsed output power at 1dB compression (1) 18 20 dBm P03 Output power at 3dB gain compression 20 23 dBm IP3 3 rd order intercept point 29 dBm PAE Power added efficiency at saturation 10 % VSWRin Input VSWR (1) 2.0:1 VSWRout Output VSWR (1) 3.0:1 NF Noise figure 10.0 dB Vdet Detected voltage: at 26GHz @ Pout=20dBm (2) 1 V Id_ small signal Bias current 300 400 mA (1) These values are representative for pulsed on-wafer measurements that are made without bonding wires at the RF ports. In the case of a jig or a module CW mode operation, the typical output power may be around 2dB less. (2) Voltage across an external 10kOhm parallel resistor connected to the voltage detector pad. Absolute Maximum Ratings Tamb. = 25° C (1) Symbol Parameter Values Unit Vds Drain bias voltage_small signal (2) 4.0 V Ids Drain bias current_small signal 400 mA Vgs Gate bias voltage -2 to +0.4 V Vdg Negative Drain Gate voltage (= Vds – Vgs) +5 V Pin Maximum continuous input power (2) Maximum peak input power overdrive (3) +15 dBm dBm Ta Operating temperature range -40 to +85 ° C Tstg Storage temperature range -55 to +155 ° C (1) Operation of this device above anyone of these parameters may cause permanent damage. (2) 3.5V recommended for up to a max of 3dB gain compression. (3) Duration < 1s.

20-33GHz Medium Power Amplifier CHA3092 Ref. : DSCHA30920356 21-Dec.-00 3/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Typical Scattering Parameters ( On wafer Sij measurements ) Bias Conditions : Vd1,2,3,4 = 3.5 Volt, Vg1,2,3,4 = -0.15 Volt, Id = 300 mA. Freq. GHz S11 dB S11 // //° S12 dB S12 // //° S21 dB S21 // //° S22 dB S22 // //°

CHA3092 20-33GHz Medium Power Amplifier Ref. : DSCHA30920356 21-Dec.-00 4/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Typical On wafer Power Measurements Bias Conditions : Vd1,2,3,4 = 3.5 Volt, Vg1,2,3,4 = -0.15 Volt, Id = 300 mA. On wafer Pin / Pout at 20 GHz -3 -2 -1 0 1 2 3 4 5 Pin ( dBm ) Pout ( dBm ) P.A.E. ( % ) On wafer Pin / Pout at 22 GHz -3 -2 -1 0 1 2 3 4 5 Pin ( dBm ) Pout ( dBm ) P.A.E. ( % ) Notes : 1- Test conditions : Vd1,2,3,4 = 3.5 Volt, Vg1,2,3,4 = -0.15 Volt. 2- Power measurements are typical ( solid lines ). P.A.E. is representative of on wafer measurements on a typical circuit ( Dotted lines ). On wafer Pin / Pout at 26 GHz -3 -2 -1 0 1 2 3 4 5 Pin ( dBm ) Pout ( dBm ) P.A.E. ( % ) On wafer Pin / Pout at 28 GHz -3 -2 -1 0 1 2 3 4 5 Pin ( dBm ) Pout ( dBm ) P.A.E. ( % )

20-33GHz Medium Power Amplifier CHA3092 Ref. : DSCHA30920356 21-Dec.-00 5/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Typical Bias Tuning The circuit schematic is given below : I N O U T V d 2,3,4 V g 3,4 V g 2 V g1 V d 1 V g 2 V d 2,3,4 V d et For medium power operation, the four drain biases are connected altogether. In a same way, all the gate biases are connected together at the same power supply, tuned to drive a small signal operating current of 300mA. A separate access to the gate voltages of the two first stages ( Vg1,2 ) is provided in order to be able to tune the first stages for the application, as a lower noise amplifier or a multiplier. An additional pad is provided for monitoring the output power, using the Build In Test. This access, when connected to an external resistor of 10 kOhm ( typical value ) provides a DC voltage which follows the output power level. Note : In order to minimize the chip to chip performance spread, it is recommended to bias the chip at fixed drain current Id rather than at fixed Vg voltage. In addition, to prevent unwanted self-biasing of the gates under gain compression, it is preferrable to minimize as much as possible the source resistance of the Vg power supply.

CHA3092 20-33GHz Medium Power Amplifier Ref. : DSCHA30920356 21-Dec.-00 6/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Chip Assembly and Mechanical Data To Vd1,2,3,4 DC Drain supply feed To Vgs2,3,4 DC Gate supply feed To Vgs1 DC Gate supply feed To external control circuit ( 10kOhm ) IN OUT 100pF 100pF 100pF Note: Supply feed should be capacitively bypassed. 25µm diameter gold wire is recommended. 1720 +/- 35 1370 1030 700 450 290 440 270 880 +/- 35 160 340 640 940 1340 Bonding pad positions. (Chip thickness: 100µm. All dimensions are in micrometers)

Ordering Information

Chip form : CHA3092-99F/00 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S. . Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S.