C8051F018 SILABS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 2

Technical content

Precision Mixed Signal Copyright © 2 005 by Silicon Laboratories 5.5.2005 Port 0 Latch Port 1 Latch JTAG Logic TCK TMS TDI TDO UART SMBus SPI Bus 5-Chnl PCA 16 kB FLASH

1024 Byte

C o r e Timers 0,1,2 Timer 3 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P D r v P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P D r v P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 P D r v P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P D r v C R O S S B A R S W I T C H AV+ AV+ VDD VDD VDD DGND DGND DGND AG ND AG ND ResetRST XTAL1 XTAL2 External Oscillator Circuit System Clock Internal Oscillator Digital Power Analog Power Debug HW Boundary Scan

256 Byte

(10-Bit) A M U X AIN0.0 AIN0.1 AIN0.2 AIN0.3 AIN0.4 AIN0.5 AIN0.6 AIN0.7 CP0+ CP0- CP1+ CP1- TEMP SENSOR VREF CP0 CP1 VREF NC NC C8051F018

25 MIPS, 16 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU

  • ±1 LSB INL; no missing codes - Programmable throughput up to 100 ksps - 8 external inputs; programmable as single-ended or differential - Data-dependent windowed interrupt generator - Built-in temperature sensor (±3 °C) Two Comparators - 16 programmable hysteresis values - Configurable to generate interrupts or reset Internal Voltage Reference VDD Monitor/Brown-out Detector On-Chip JTAG Debug & Boundary Scan - On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) - Provides breakpoints, single stepping, watchpoints, stack monitor - Inspect/modify memory and registers - Superior performance to emulation systems using ICE-chips, target pods, and sockets - IEEE1149.1 compliant boundary scan Supply Voltage: 2.8 to 3.6 V - Typical operating current: 12.5 mA at 25 MHz - Multiple power saving sleep and shutdown modes Temperature Range: –40 to +85 °C High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz system clock - Expanded interrupt handler Memory - 1280 bytes data RAM - 16 kB Flash; in system programmamble in 512-byte sectors (512 bytes are reserved) Digital Peripherals - 32 port I/O; all are 5 V tolerant - Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports available concurrently - Programmable 16-bit counter/timer array with five capture/compare modules - 4 general-purpose 16-bit counter/timers - Dedicated watchdog timer; bidirectional reset Clock Sources - Internal programmable oscillator: 2–16 MHz - External oscillator: Crystal, RC, C, or Clock - Can switch between clock sources on-the-fly Package - 64-pin TQFP (standard lead and lead-free packages) Ordering Part Numbers - Lead-free package: C8051F018-GQ - Standard package: C8051F018

Precision Mixed Signal Copyright © 2 005 by Silicon Laboratories 5.5.2005 Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders C8051F018 Selected Electrical Specifications (TA = –40 to +85 C°, VDD = 2.8 V unless otherwise specified) PARAMETER CONDITIONS MIN TYP MAX UNITS GLOBAL CHARACTERISTICS Supply Voltage 2.8 3.6 V Supply Current (CPU active) Clock = 25 MHz Clock = 1 MHz Clock = 32 kHz 12.5 0.5 mA mA µA Supply Current (shutdown) Oscillator not running 10 µA Clock Frequency Range DC 25 MHz A/D CONVERTER Resolution 10 bits Integral Nonlinearity ±½ ±1 LSB Differential Nonlinearity Guaranteed Monotonic ±½ ±1 LSB Signal-to-Noise Plus Distortion 59 61 dB Throughput Rate 100 ksps Input Voltage Range 0 V REF V COMPARATORS Supply Current (each Comparator) 1.3 µA Response Time | (CP+) – (CP-) | = 100 mV 4 µs

Package Information

A b D e E 0.05 0.95 0.17 0.22 12.00 10.00 0.50 12.00 10.00 1.20 0.15 1.05 0.27 MIN (mm) NOM (mm) MAX (mm) E e A1b D PIN 1 DESIGNATOR A C8051F005DK Development Kit