BS616LV1010 BSI | Alldatasheet
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Revision 2.2 April 20011 R0201-BS616LV1010 POWER DISSIPATION SPEED (ns) STANDBY (ICCSB1, Max) Operating (ICC, Max) PRODUCT FAMILY OPERATING TEMPERATURE Vcc RANGE PKG TYPE BS616LV1010EC TSOP2-44 BS616LV1010AC O C to +70 O C 2.4V ~ 5.5V 70 3uA 0.5uA 35mA 20mA BGA-48-0608 BS616LV1010EI TSOP2-44 BS616LV1010AI -40 O C to +85 O C 2.4V ~ 5.5V 70 5uA 1.5uA 40mA 25mA BGA-48-0608 Very Low Power/Voltage 64K X 16 bit CMOS SRAM
- Very low operation voltage : 2.4 ~ 5.5V
- Very low power consumption : Vcc = 3.0V C-grade : 20mA (Max.) operating current I- grade : 25mA (Max.) operating current 0.02uA (Typ.) CMOS standby current Vcc = 5.0V C-grade : 35mA (Max.) operating current I- grade : 40mA (Max.) operating current 0.4uA (Typ.) CMOS standby current
- High speed access time : -70 70ns (Max.) at Vcc = 3.0V
- Automatic power down when chip is deselected
- Three state outputs and TTL compatible
- Fully static operation
- Data retention supply voltage as low as 1.5V
- Easy expansion with CE and OE options
- I/O Configuration x8/x16 selectable by LB and UB pin The BS616LV1010 is a high performance, very low power CMOS Static Random Access Memory organized as 65,536 words by 16 bits and operates from a wide range of 2.4V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.02uA and maximum access time of 70ns in 3V operation. Easy memory expansion is provided by an active LOW chip enable(CE) and active LOW output enable(OE) and three-state output drivers. The BS616LV1010 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV1010 is available in the JEDEC standard 44-pin TSOP Type II and 48-pin BGA package. DESCRIPTION FEATURES Row Decoder Memory Array 512 x 2048 Column I/O Write Driver Sense Amp Column Decoder Data Buffer Output A3 A2 A1 Data Input Buffer Control Gnd Vcc OE DQ0 16 WE CE DQ15 A15 A13 128 2048 BLOCK DIAGRAM 51218 A14 A12 A0A11 Address Input Buffer A10 Address Input Buffer UB LB PRODUCT FAMILY PIN CONFIGURATIONS Brilliance Semiconductor Inc. reserves the right to modify document contents without notice. BS616LV1010 G H F E D C B A 12345 A9A8NC IO15 NC A12 NCA11A10 A13 WE IO7 IO14 VCC VSS IO9 IO13 A14 IO12 IO11 IO10 NC NC IO8 LB UB OE A15 IO5 NC IO4 IO3 IO1 IO6 VSS VCC IO2 CE IO0 NC CE DQ0 DQ2 DQ3 VCC GND DQ4 DQ5 DQ7 DQ1 DQ6 WE A15 A14 A13 A12 NC OE UB LB DQ15 DQ14 DQ13 DQ12 GND VCC DQ11 DQ10 DQ9 DQ8 NC A10 A11 NC BS616LV1010EC BS616LV1010EI BSI
Revision 2.2 April 20012 R0201-BS616LV1010 Name Function A0-A15 Address Input These 16 address inputs select one of the 65,536 x 16-bit words in the RAM. CE Chip Enable Input CE is active LOW. Chip enables must be active when data read from or write to the device. if chip enable is not active, the device is deselected and is in a standby power mode. The DQ pins will be in the high impedance state when the device is deselected. WE Write Enable Input The write enable input is active LOW and controls read and write operations. With the chip selected, when WE is HIGH and OE is LOW, output data will be present on the DQ pins; when WE is LOW, the data present on the DQ pins will be written into the selected memory location. OE Output Enable Input The output enable input is active LOW. If the output enable is active while the chip is selected and the write enable is inactive, data will be present on the DQ pins and they will be enabled. The DQ pins will be in the high impedance state when OE is inactive. LB and UB Data Byte Control Input Lower byte and upper byte data input/output control pins. DQ0 - DQ15 Data Input/Output These 16 bi-directional ports are used to read data from or write data into the RAM. Ports Vcc Power Supply Gnd Ground TRUTH TABLE PIN DESCRIPTIONS BSI BS616LV1010 MODE CE WE OE LB UB DQ0~DQ7 DQ8~DQ15 Vcc CURRENT Not selected (Power Down) H X X X X High Z High Z I CCSB, ICCSB1 Output Disabled L H H X X High Z High Z I CC L L Dout Dout I CC H L High Z Dout I CCRead L H L L H Dout High Z I CC L L Din Din I CC H L X Din I CCWrite L L X L H Din X I CC
Revision 2.2 April 20013 R0201-BS616LV1010 SYMBOL PARAMETER TEST CONDITIONS M I N . T Y P . (1) M A X . UNITS VDR Vcc for Data Retention CE Њ Vcc - 0.2V VIN Њ Vcc - 0.2V or V IN Љ 0.2V 1.5 -- -- V ICCDR Data Retention Current CE Њ Vcc - 0.2V VIN Њ Vcc - 0.2V or V IN Љ 0.2V -- 0.02 0.3 uA tCDR Chip Deselect to Data Retention Time 0- -- - n s tR Operation Recovery Time See Retention Waveform TRC (2) -- -- ns SYMBOL PARAMETER CONDITIONS MAX. UNIT CIN Input Capacitance VIN=0V 6 pF CDQ Input/Output Capacitance VI/O=0V 8 pF RANGE AMBIENT TEMPERATURE Vcc Commercial 0 O C to +70 O C2 . 4 V ~ 5 . 5 V Industrial -40 O C to +85 O C2 . 4 V ~ 5 . 5 V 1. Typical characteristics are at TA = 25oC. 2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included. 3. Fmax = 1/tRC . DATA RETENTION CHARACTERISTICS ( TA = 0oC to + 70oC ) 1. Vcc = 1.5V, TA = + 25OC 2. tRC = Read Cycle Time ABSOLUTE MAXIMUM RATINGS(1) OPERATING RANGE CAPACITANCE (1) (TA = 25oC, f = 1.0 MHz) 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 1. This parameter is guaranteed and not tested. DC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC ) SYMBOL PARAMETER RATING UNITS V TERM Terminal Voltage with Respect to GND -0.5 to Vcc+0.5 V T BIAS Temperature Under Bias -40 to +125 O C T STG Storage Temperature -60 to +150 O C P T Power Dissipation 1.0 W I OUT DC Output Current 20 mA BSI BS616LV1010 PARAMETER NAME PARAMETER TEST CONDITIONS MIN. TYP. (1) M A X . UNITS Vcc=3.0V VIL Guaranteed Input Low Voltage(2) Vcc=5.0V -0.5 -- 0.8 V Vcc=3.0V 2.0 VIH Guaranteed Input High Voltage(2) Vcc=5.0V 2.2 -- Vcc+0.2 V IIL Input Leakage Current Vcc = Max, V IN = 0V to Vcc -- -- 1 uA IOL Output Leakage Current Vcc = Max, CE = V IH, or OE = V IH, VI/O = 0V to Vcc -- -- 1 uA Vcc=3.0V VOL Output Low Voltage Vcc = Max, I OL = 2mA Vcc=5.0V -- -- 0.4 V Vcc=3.0V VOH Output High Voltage Vcc = Min, I OH = -1mA Vcc=5.0V 2.4 -- -- V Vcc=3.0V -- -- 20 ICC Operating Power Supply Current CE = V IL, IDQ = 0mA, F = Fmax (3) Vcc=5.0V -- -- 35 mA Vcc=3.0V -- -- 1 ICCSB Standby Current-TTL CE = V IH, IDQ = 0mA Vcc=5.0V -- -- 2 mA ICCSB1 Standby Current-CMOS CE Њ Vcc-0.2V, VIN Њ Vcc - 0.2V or V IN Љ 0.2V Vcc=5.0V -- 0.4 3 uA
Revision 2.2 April 20015 R0201-BS616LV1010 BSI BS616LV1010 SWITCHING WAVEFORMS (READ CYCLE) READ CYCLE1 (1,2,4) t RC t OHt AA D OUT ADDRESS t OH t OH READ CYCLE3 (1,4) t RC t OE D OUT LB,UB CE OE ADDRESS t CLZ (5) t ACS t CHZ (1,5) t OHZ (5) t OLZ t AA READ CYCLE2 (1,3,4) t CLZ t CHZ (5) D OUT LB,UB CE (5) t BA t ACS NOTES: 1. WE is high for read Cycle. 2. Device is continuously selected when CE = V IL. 3. Address valid prior to or coincident with CE transition low. 4. OE = V IL . 5. Transition is measured 500mV from steady state with C L = 5pF as shown in Figure 1B. The parameter is guaranteed but not 100% tested. t BE t BDO t BDO t BA t BE
Revision 2.2 April 20016 R0201-BS616LV1010 AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 3.0V ) WRITE CYCLE BSI BS616LV1010 JEDEC PARAMETER NAME PARAMETER NAME DESCRIPTION BS616LV1010-70 MIN. TYP. MAX. UNIT tAVAX tWC Write Cycle Time 70 -- -- ns tE1LWH tCW Chip Select to End of Write 70 -- -- ns tAVWL tAS Address Setup Time 0- -- - n s tAVWH tAW Address Valid to End of Write 70 -- -- ns tWLWH tWP Write Pulse Width 50 -- -- ns tWHAX tWR Write recovery Time (CE,WE) 0 -- -- ns tBW tBW Date Byte Control to End of Write (LB,UB) 60 -- -- ns tWLQZ tWHZ Write to Output in High Z 0- - 3 0n s tDVWH tDW Data to Write Time Overlap 30 -- -- ns tWHDX tDH Data Hold from Write Time 0- -- - n s tGHQZ tOHZ Output Disable to Output in High Z 0- - 3 0n s tWHOX tOW End of Write to Output Active 5- -- - n s t WR SWITCHING WAVEFORMS (WRITE CYCLE) WRITE CYCLE1 (1) t WC (3) t CW (11) t BW (2) t WP t AW t OHZ (4,10) t AS (3) t DH t DW D IN D OUT WE LB,UB CE OE ADDRESS (5)
Revision 2.2 April 20017 R0201-BS616LV1010 WRITE CYCLE2 (1,6) BSI BS616LV1010 NOTES: 1. WE must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE and WE low. All signals must be active to initiate a write and any one signal can terminate a write by going inactive. The data input setup and hold timing should be referenced to the second transition edge of the signal that terminates the write. 3. TWR is measured from the earlier of CE or WE going high at the end of write cycle. 4. During this period, DQ pins are in the output state so that the input signals of opposite phase to the outputs must not be applied. 5. If the CE low transition occurs simultaneously with the WE low transitions or after the WE transition, output remain in a high impedance state. 6. OE is continuously low (OE = VIL ). 7. DOUT is the same phase of write data of this write cycle. 8. DOUT is the read data of next address. 9. If CE goes low during this period, DQ pins are in the output state. Then the data input signals of opposite phase to the outputs must not be applied to them. 10. Transition is measured 500mV from steady state with C L = 5pF as shown in Figure 1B. The parameter is guaranteed but not 100% tested. 11. TCW is measured from the later of CE going low to the end of write. 12. The change of Read/Write cycle must accompany with CE or address toggled. t WC t CW (11) (2) t WP t AW t WHZ (4,10) t AS t WR (3) t DH t DW D IN D OUT WE CE ADDRESS (5) t DH (7) (8) (8,9) t BW LB,UB (12)
Revision 2.2 April 20018 R0201-BS616LV1010 PACKAGE E: TSOP II - 44 PIN A: BGA - 48 PIN(6x8mm) ORDERING INFORMATION BSI BS616LV1010 X X -- Y Y GRADE C: +0oC ~ +70oC I: -40oC ~ +85oC SPEED 70: 70ns BS616LV1010 PACKAGE DIMENSIONS TSOP2-44
Revision 2.2 April 20019 R0201-BS616LV1010 BSI BS616LV1010 PACKAGE DIMENSIONS (continued) 48 mini-BGA (6 x 8) VIEW A 1.4 Max. e 1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS. BALL PITCH e = 0.75 D 8.0 6.0 EN 48 3.75 E1D1 5.25 NOTES:
Revision 2.2 April 200110 BSI R0201-BS616LV1010
REVISION HISTORY
Revision Description Date Note 2.2 2001 Data Sheet release Apr. 15, 2001 BS616LV1010