BL6203ITLX BELLING | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 17
Technical content
http://www.belling.com.cn
1.25 Watt Fully Differential Audio Power Amplifier
1 FEATURES
z Fully differential amplifier z Improved PSRR at 217Hz (VDD>3.0V) 90dB (typ) z Power output at 5.0V & 1% THD 1.25W (typ) z Power output at 3.6V & 1% THD 0.6W (typ) z Ultra low shutdown current 0.01 µA (typ) z Improved pop & click circuitry eliminates noises during turn-on and turn-off transitions z Thermal overload protection circuitry z No output coupling capacitors, bootstrap capacitors required z Unity-gain stable z External gain configuration capability z Available in space-saving package: 8-bump micro SMD
2 GENERAL DESCRIPTION
The BL6203 is a fully differential audio power amplifier designed for portable communication device applications. It is capable of delivering 1.25 watt of continuous average power to an 8 Ω BTL load with less than 1% distortion (THD+N) from a 5V battery voltage. It operates from 2.2 to 5.5V. Features like 90dB PSRR at 217Hz, improved RF-rectification immunity, the space-saving 8-bump micro SMD package, the advanced pop & click circuitry, a minimal count of external components and low-power shutdown mode make BL6203 ideal for wireless handsets. The BL6203 is unity-gain stable, and the gain can be configured by external resistors.
3 APPLICATIONS
z PDAs, Handheld computers
4 TYPICAL APPLICATION
5 ORDER INFORMATION
Table 1. Order information
6 PIN DESCRIPTIONS
6.1 Pin Diagram (Top View)
8 Bump micro SMD Package
8 Bump micro SMD Marking
3 VDD VO+ IN-
6.2 Pin Definitions and Functions
Table 2. Pin Definitions and Functions A1 VO- O Negative differential output. B1 SHUTDOWN I Shutdown Pin, active low. filtering. The bypass capacitor is optional. C2 IN+ I Positive differential input. B3 VO+ O Positive differential output. C3 IN- I Negative differential input.
7 OPERATION CONDITIONS AND ELECTRICAL CHARACTERISTICS
7.1 Absolute Maximum Ratings (note 1)
Note1: stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. for extended periods may affect device reliability. given in Absolute Maximum Ratings, whichever is lower.
7.2 Operation Conditions
Table 3. Operation Conditions
7.3 Electrical Characteristics
Table 4. VDD=5V (The following specifications apply for 8Ωload，AV=1V/V，TA=25℃, unless
Table 5. VDD=3.6V (The following specifications apply for 8Ωload，AV=1V/V，TA=25℃, unless
http://www.belling.com.cn
8 TYPICAL CHARACTERISTICS
2.2 2.0 THD+N=10% THD+N=1% 1.8 1.6 1.4 1.2 1.0 800m 600m 400m 200m Output Power(W) Output Power vs Supply Voltage RL=8Ω Supply Voltage(V) 2.5 3 3.5 4 4.5 5 5.5 VDD=5V f=1KHz THD+N ≤1% RL=8Ω 0.7 0.6 0.5 0.4 0.3 0.2 0.1 Power Disspation(W) Power Dissipation vs Output Power Output Power(W) VDD=3.6V f=1KHz THD+N ≤1% RL=8Ω 0.35 0.3 0.25 0.2 0.15 0.1 0.05 Power Disspation(W) Power Dissipation vs Output Power Output Power(W) 0 0 . 20 . 4 0 . 60 . 8 Ambient Temperature (℃) 0 20 40 60 80 100 120 140 160 Power Derating Curve 0.7 0.6 0.5 0.4 0.3 0.2 0.1 Power Disspation(W) Micro SMD
http://www.belling.com.cn Frequency (Hz) 20 100 1K 10K 20K 0.1 0.001 THD+N (%) 0.01 THD+N vs Frequency VDD=5V, RL=8Ω,PO=600mW Frequency (Hz) 20 100 1K 10K 20K 0.1 0.001 THD+N (%) 0.01 THD+N vs Frequency VDD=3.6V, RL=8Ω,PO=400mW Frequency (Hz) 20 100 1K 10K 20K 0.1 0.001 THD+N (%) 0.01 THD+N vs Frequency VDD=2.5V, RL=8Ω,PO=150mW 20kHz 1kHz 20Hz THD+N vs Output Power VDD=5V, RL=8Ω 0.1 0.001 THD+N (%) 0.01 Output Power (W) 10m 100m 1 2
http://www.belling.com.cn 20kHz 1kHz 20Hz THD+N vs Output Power VDD=3.6V, RL=8Ω 0.1 0.001 THD+N (%) 0.01 Output Power (W) 10m 100m 1 20kHz 1kHz 20Hz THD+N vs Output Power VDD=2.5V, RL=8Ω 0.1 0.001 THD+N (%) 0.01 Output Power (W) 10m 100m 1 Frequency (Hz) 20 100 1K 10K 20K -100 PSRR (dB) PSRR vs Frequency VDD=5.0V, RL=8Ω,input 10Ω Terminated -90 -80 -70 -60 -50 -40 -30 -20 -10 C(BYPASS)=0μF C(BYPASS)=1μF C(BYPASS)=0.47μF Frequency (Hz) 20 100 1K 10K 20K -100 PSRR (dB) PSRR vs Frequency VDD=3.6V, RL=8Ω,input 10Ω Terminated -90 -80 -70 -60 -50 -40 -30 -20 -10 C(BYPASS)=0μF C(BYPASS)=1μF C(BYPASS)=0.47μF
http://www.belling.com.cn DC Common-Mode Voltage (V) PSRR vs Common Mode voltage VDD=5.0V, RL=8Ω, 217Hz, 200mVPP 1234 -100 PSRR (dB) -90 -80 -70 -60 -50 -40 -30 -20 -10 DC Common-Mode Voltage (V) PSRR vs Common Mode voltage VDD=3.6V, RL=8Ω, 217Hz, 200mVPP 12 3 3.6 -100 PSRR (dB) -90 -80 -70 -60 -50 -40 -30 -20 -10 -200 -160 -120 -80 -40 120 160 200 100 1k 10k 100K 1M 10M -200 -160 -120 -80 -40 120 160 200 Open Loop Frequency Response Frequency (Hz) Gain Phase Gain (dB) Phase (O) -60 -50 -40 -30 -20 -10 100 1k 10k 100K 1M 10M -180 -140 -100 -60 -20 100 140 180 220 Closed Loop Frequency Response Frequency (Hz) Gain Phase Gain (dB) Phase (O)
http://www.belling.com.cn
9 APPLICATION INFORMATION
9.1 Fully Differential Amplifier Description
The BL6203 is a fully differential amplifier with diffe rential inputs and outputs. The fully differential amplifier consists of a differential amplifier and a common mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage that is equal to the differential input times the gain. The common mode feedback ensures that the common-mode voltage at the output is biased around VDD/2 regardless of the common-mode voltage at the input. The BL6203 provides a "bridged mode" output configuration (bridge-tied-load, BTL). This means the output signals at Vo+ and Vo- that are 180° out of phase with respect to each other. Bridged mode operation is different from the single-ended output configuration that connect s the load between the amplifier output and ground. A bridged amplifier design has distinct advantages over the single-ended output configuration: it provides differential drive to the load, thus doubling maximum possible output swing for a specific supply voltage. Four times the output power is possible compared with a single-ended output configuration under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped.
9.2 Advantages of Fully Differential Amplifier
Input and output coupling capacitor not required: A fully differential amplifier with good CMRR, the BL6203 allows the input signal to be biased at voltage other than mid-supply of the BL6203, the common-mode feedback circuit adjusts for it, and the outputs are still biased at mid-supply of the BL6203. Mid-supply bypass capacitor, C BYPASS not required: The fully differen tial amplifier does not require a bypass capacitor. It is because any shift in the mid-supply affects both positive and negative channels equally and cancels the differential output. However, removing the bypass capacitor slightly worsens power supply rejection ration, but a slightly decrease of PSRR may be acceptable when an additional component can be eliminated. Better RF-immunity: GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217Hz. The transmitted signal is picked-up on inpu t and output traces. The fully differential amplifier reduces the RF rectification much better than the typical audio amplifier.
http://www.belling.com.cn
9.3 Applications
From Figure 3 to Figure 5 show application schematics for differential and single-ended inputs. IN- IN- IN+ VO+ VO- VDD GND Bias Circuitry BYPASS IN+ 20kΩ 1μF BL6203 CB 1μF R f C S 20kΩ R f 20kΩ R i 20kΩ R i Differential Audio Input RL CB is optional SHUTDOWN VIH VIL VDD/2 Figure 3 Typical Differential Input Application
http://www.belling.com.cn IN- IN+ Differential Audio Input + IN- IN+ VO+ VO- VDD GND 20kΩ 0.39μF 1μF BL6203 R f C S 20kΩ R f 20kΩ R i 20kΩ R i C i RL Bias Circuitry BYPASSCB 1μF CB is optional SHUTDOWN VIH VIL VDD/2 0.39μF C i Figure 4 Differential Input App lication With Input Capacitors
http://www.belling.com.cn IN- IN+ VO+ VO- VDD GND 20kΩ 0.39μF 1μF BL6203 R f C S 20kΩ R f 20kΩ R i 20kΩ R i C i RL C i 0.39μF Bias Circuitry BYPASSCB 1μF CB is optional SHUTDOWN VIH VIL VDD/2 Audio Input Figure 5 Single-Ended Input Application
9.4 Proper Selection of external Components
9.4.1 Input Resistor (R i)
The input (Ri) and feedback resistors (Rf) set the gain of the amplifier according to Equation 1: Gain=Rf / Ri ( 1 ) In order to optimize the THD+N and SNR performance, The BL6203 should be used in low closed-loop gain configuration. R f and Ri should be in range from 1k Ω to 100k Ω. Resistor matching is very important for fully differential amplifiers. The ba lance of the output on the common mode voltage depends on matched ratios of the resistors. CMRR, PSRR, and the second harmonic distortion is increased if resistor is not matched. Therefore, it is recommended to use 1% tolerance or better resistors to keep the performance optimized.
http://www.belling.com.cn
9.4.2 Input Capacitor (C i)
The input coupling capacitor blocks the input DC voltage. The BL6203 does not require input coupling capacitors if using a differential input source that is biased from 0.5V to VDD-0.8V. Use 1% tolerance or better resistors if not using input coupling capacitors. In the single-ended input application an input capacitor, Ci, is required to allow the amplifier to bias the input signal to the proper dc level. The Ci and Ri form a high-pass filter with the corner frequency determined in Equation 2. ii C CRf π2 1= ( 2 ) fC -3dB Special care should be taken to the value of C i because it directly affects the low frequency performance of the system. For example, assuming R i is 20kΩ and the specification calls for a flat response down to 100Hz. From Equation 2, C i is 0.08uF, so C i would likely choose a valu e in the range of 0.068 µF to 0.47µF. A further consideration for Ci is the leakage path from the input source through the input network (Ri, Ci) and the feedback resistor (R f) to the load. This leakage current creates a DC offset voltage that reduces useful headroom, especially in high gain ap plications. For this reason, a ceramic capacitor is the best choice.
9.4.3 Bypass Capacitor (C BYPASS) and Start-Up Time
Connecting a capacitor to BYPASS pin filters any noise into th is pin and increases the PSRR performance. CBYPASS also determines the rise time of VO+ and VO-, the larger the ca pacitor, the slower the rise time, the BL6203 start to work after the C BYPASS voltage reaches the mid-supply voltage. This capacitor can also minimize the pop & click noise duri ng turn-on and turn-off transitions, the larger the capacitor, the smaller the pop & click noise, 1µF capacitor is recommended for CBYPASS.
9.4.4 Decoupling Capacitor (C S)
Power supply decoupling is critical for lo w THD+N and high PSRR performance. A low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF to 1 µF, placed as close as possible to VDD pin make the device works better. For filtering lower frequency noise signals, a 10 µF or greater capacitor placed near the audi o power amplifier also helps, but it is not required in most applications because of the high PSRR of this device.
9.5 USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended. A real capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimi zes the beneficial effects of the capacitor in the circuit. The lower the equivalent valu e of this resistance the more the real capacitor behaves like an ideal capacitor.
http://www.belling.com.cn
9.6 POWER DISSIPATION
Power dissipation is a major concer n when designing a successful amplifier, whether the amplifier is bridged or single-ended. Equation 3 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. () L DD DMAX R VP 2 2π= Single-Ended (3) However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation versus a single-ended amplifier operating at the same conditions. ( ) () L DD DMAX R VP 2 24 π∗= Bridge-Ended (4) Since the BL6203 has bridged outputs, the maximum internal power dissipation is 4 times that of a single-ended amplifier. Even with this substantial increasing in power dissipation, the BL6203 does not require additional heat-sinking under most operating conditions and output loading. From Equation 4, assuming a 5V power supply and an 8 Ω load, the maximum power dissipation point is 625mW. The maximum power dissipation point obtained from Equation 4 must not be greater than the power dissipation results from Equation 5: () JAAJMAXDMAX TTP θ/−= ( 5 ) Depending on the ambient temperature, T A, of the system surroundings, Equation 5 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 4 is greater than that of Equation 5, then either the supply voltage must be decreased, the load impedance increased, the ambient temp erature reduced, or the θJA reduced with heat-sinking. In many cases, larger traces near the output, VDD, and GN D pins can be used to lower the θJA. The larger areas of copper provide a form of heat-sinking allowing higher power dissipation. Recall that internal power dissipation is a function of output power. If the typical operation is not around the maximum power dissipation point, the BL6203 can operate at higher ambient temperatures.
9.7 SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the BL6203 contains shutdown circuitry that is used to turn off the amplifier’s bias circuitry. The shutdown pin should be tied to a definite voltage to avoid unwanted state changes. In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction with an external pull-down resistor. This scheme guarantees that the shutdown pin will not float, thus preventing unwanted state changes.
9.8 PCB LAYOUT
The residual resistance of the PCB trace between th e amplifier output pins and the speaker causes a voltage drop, which results in power dissipated in the PCB trace and not in the speaker as desired. Therefore, to maintain the highest speaker power dissipation and widest output voltage swing, PCB trace that connects the amplifier output pins to the speaker must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply’s output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, power supply trace resistance creates the sa me effects as poor supply regula tion. Therefore, making the power supply trace as wide as possible helps to maintain full output voltage swing. It is very important to keep the BL6203 external components very close to the BL6203 to limit noise pickup.
http://www.belling.com.cn
10 PHYSICAL DIMENSIONS
A B C 321 0.5 0.5 0.35 0.25 8-Bump micro SMD Part Number BL6203ITLX DIMENSIONS ARE IN MILLIMETERS
1.0 MAX
1.55 1.49 SQ 1.0 TYP
1.0 TYP
0.77 0.71 0.25 0.15 0.35 0.25 Seating Plane 0.05 M 0.08 Top View