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Product speciﬁcation File under Discrete Semiconductors, SC07

1995 Apr 25

N-channel dual-gate MOS-FET

1995 Apr 25 2

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR

FEATURES

Specially designed for use at 5 V supply voltage
Short channel transistor with high forward transfer admittance to input capacitance ratio
Low noise gain controlled amplifier up to 1 GHz
Superior cross-modulation performance during AGC.

APPLICATIONS

VHF and UHF applications with 3 to 7 V supply voltage such as television tuners and professional communications equipment.

DESCRIPTION

Enhancement type field-effect transistor in a plastic microminiature SOT343R package. The transistor consists of an amplifier MOS-FET with source and substrate interconnected and an internal bias circuit to ensure good cross-modulation performance during AGC. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. PINNING PIN SYMBOL DESCRIPTION 1 s, b source 2 d drain 2 gate 2 4g 1 gate 1 Fig.1 Simplified outline (SOT343R) and symbol. Marking code: MC. handbook, halfpage MAM192 s,b d Top view QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDS drain-source voltage −− 7V ID drain current −− 30 mA Ptot total power dissipation −− 280 mW Tj operating junction temperature −− 150 °C yfs forward transfer admittance 22 25 30 mS C ig1-s input capacitance at gate 1 − 2.2 2.6 pF C rs reverse transfer capacitance f = 1 MHz − 25 35 fF F noise ﬁgure f = 800 MHz − 2 − dB

1995 Apr 25 3

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Note 1. Device mounted on a printed-circuit board. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage − 7V ID drain current − 30 mA IG1 gate 1 current −± 10 mA IG2 gate 2 current −± 10 mA Ptot total power dissipation up to T amb =5 0°C; see Fig.2; note 1 − 280 mW Tstg storage temperature −65 +150 °C Tj operating junction temperature − +150 °C Fig.2 Power derating curve. handbook, halfpage 0 50 100 200 300 MLD150 150 200 100 Ptot (mW) T ( C)amb o

1995 Apr 25 4

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR THERMAL CHARACTERISTICS Notes 1. Device mounted on a printed-circuit board. 2. T s is the temperature at the soldering point of the source lead. STATIC CHARACTERISTICS Tj=2 5°C; unless otherwise speciﬁed. Note 1. R G connects gate 1 to VGG =5V . DYNAMIC CHARACTERISTICS Common source; Tamb =2 5°C; VDS =5V ;V G2-S = 4 V; ID = 10 mA; unless otherwise specified. SYMBOL PARAMETER CONDITIONS VALUE UNIT R th j-a thermal resistance from junction to ambient note 1 350 K/W R th j-s thermal resistance from junction to soldering point Ts =9 1°C; note 2 210 K/W SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V(BR)G1-SS gate 1-source breakdown voltage VG2-S =V DS = 0; IG1-S =1 0m A 6 1 5 V V(BR)G2-SS gate 2-source breakdown voltage VG1-S =V DS = 0; IG2-S =1 0m A 6 1 5 V V(F)S-G1 forward source-gate 1 voltage VG2-S =V DS = 0; IS-G1 = 10 mA 0.5 1.5 V V(F)S-G2 forward source-gate 2 voltage VG1-S =V DS = 0; IS-G2 = 10 mA 0.5 1.5 V VG1-S(th) gate 1-source threshold voltage VG2-S =4 V ; VDS =5V ; ID =2 0µA 0.3 1 V VG2-S(th) gate 2-source threshold voltage VG1-S =V DS =5V ; ID =2 0µA 0.3 1.2 V IDSX drain-source current V G2-S =4V ; VDS =5V ; RG1 = 120 kΩ ; note 1 81 3 m A IG1-SS gate 1 cut-off current V G2-S =V DS = 0; VG1-S =5V − 50 nA IG2-SS gate 2 cut-off current V G1-S =V DS = 0; VG2-S =5V − 50 nA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT yfs forward transfer admittance pulsed; Tj=2 5°C 2 22 53 0m S C ig1-s input capacitance at gate 1 f = 1 MHz − 2.2 2.6 pF C ig2-s input capacitance at gate 2 f = 1 MHz 1 1.5 2 pF C os drain-source capacitance f = 1 MHz 1 1.3 1.6 pF C rs reverse transfer capacitance f = 1 MHz − 25 35 fF F noise ﬁgure f = 200 MHz; G S = 2 mS; BS =B Sopt − 1 1.5 dB f = 800 MHz; GS =G Sopt; BS =B Sopt − 2 2.8 dB

1995 Apr 25 5

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR Fig.3 Forward transfer admittance as a function of junction temperature; typical values. 50 0 50 150 MLD268 100 T ( C)o j Y fs (mS) Fig.4 Typical gain reduction as a function of AGC voltage. f = 50 MHz. Tj=2 5°C. handbook, halfpage0 01234 V (V)AGC gain reduction (dB) MRA769 Fig.5 Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; see Fig.19. VGG = 5 V; fw = 50 MHz. funw = 60 MHz; Tamb =2 5°C; RG1 = 120 kΩ. handbook, halfpage 100 110 120 0 1 02 03 04 05 0 Vunw (dB V) gain reduction (dB) MRA771 µ Fig.6 Transfer characteristics; typical values. VDS =5V . Tj=2 5°C. 0.4 2.0 MLD270 0.8 1.2 1.6 ID (mA) V (V)G1 S 2 V 1.5 V 1 V V = 4 V3 V 2.5 VG2 S

1995 Apr 25 6

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR Fig.7 Output characteristics; typical values. VG2-S =4V . Tj=2 5°C. handbook, halfpage 21 0 MLD269 468 ID (mA) V (V)DS 1.3 V 1.2 V 1.1 V 1.0 V 0.9 V V = 1.4 VG1 S Fig.8 Gate 1 current as a function of gate 1 voltage; typical values. VDS =5V . Tj=2 5°C. handbook, halfpage 150 100 0.5 2.5 MLD271 1.0 1.5 2.0 IG1 (µA) V (V)G1 S 3.5 V 2.5 V 2 V 3 V V = 4 VG2 S Fig.9 Forward transfer admittance as a function of drain current; typical values. VDS =5V . Tj=2 5°C. handbook, halfpage 4 8 12 16 20 MLD272 yfs (mS) I (mA)D 3 V 2.5 V 2 V V = 4 VG2 S 3.5 V Fig.10 Drain current as a function of gate 1 current; typical values. VDS = 5 V; VG2-S =4V . Tj=2 5°C. handbook, halfpage 10 50 MLD273 20 30 40 ID (mA) I (µA)G1

1995 Apr 25 7

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR Fig.11 Drain current as a function of gate 1 supply voltage (= VGG ); typical values; see Fig.19. VDS = 5 V; VG2-S =4V . R G1 = 120 kΩ (connected to VGG ); Tj=2 5°C. handbook, halfpage MLD275 234 ID (mA) V (V)GG Fig.12 Drain current as a function of gate 1 (= VGG ) and drain supply voltage; typical values; see Fig.19. VG2-S =4V . R G1 connected to VGG ; Tj=2 5°C. handbook, halfpage 24 8 MLD274 V = V (V)GG DS ID (mA) R = 47 kΩG1 68 kΩ 82 kΩ 100 kΩ 120 kΩ 150 kΩ 180 kΩ 220 kΩ VDS = 5 V; Tj=2 5°C. R G = 120 kΩ (connected to VGG ). Fig.13 Drain current as a function of gate 2 voltage; typical values; see Fig.19. handbook, halfpage 0246 MLD276 ID (mA) 4.5 V 4 V 3.5 V 3 V V (V)G2 S V = 5 VGG Fig.14 Gate 1 current as a function of gate 2 voltage; typical values; see Fig.19. VDS = 5 V; Tj=2 5°C. R G = 120 kΩ (connected to VGG ). handbook, halfpage 0246 MLB945 IG1 (µA) V (V)G2 S 4.5 V 4 V 3.5 V 3 V V = 5 VGG

1995 Apr 25 8

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR Fig.15 Input admittance as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID = 10 mA; Tamb =2 5°C. handbook, halfpage 103 MLD277 10210 10 1 10 2 yis (mS) f (MHz) bis gis Fig.16 Reverse transfer admittance and phase as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID =10 mA; Tamb =2 5°C. 103 MLD278 10210 10 3 10 2 yrs 10 3 rs (µS) f (MHz) rs yrs (deg) ϕ ϕ Fig.17 Forward transfer admittance and phase as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID = 10 mA; Tamb =2 5°C. 103 MLD279 10210 10 2 yfs (mS) yfs f (MHz) fs fs (deg) ϕ ϕ Fig.18 Output admittance as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID = 10 mA; Tamb =2 5°C. handbook, halfpage 103 MLD280 10210 10 1 10 2 yos (mS) f (MHz) bos gos

1995 Apr 25 9

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR Fig.19 Cross-modulation test set-up. DUT VAGC 4.7 nF 10 kΩ MLD171 4.7 nF 450 nH C3 12 pF R L 50 Ω≈ VGG V DS R GEN V I 4.7 nF R G1Ω Ω

1995 Apr 25 10

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR Table 1 Scattering parameters: VDS =5 V; VG2-S = 4 V; ID =1 0m A Table 2 Noise data: VDS = 5 V; VG2-S = 4 V; ID =1 0m A f (MHz) s11 s21 s12 s22 MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) f (MHz) Fmin (dB) Γopt rn (ratio) (deg) 800 2.00 .686 49.6 50.40

1995 Apr 25 11

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR PACKAGE OUTLINE Fig.20 SOT343R. Dimensions in mm. 0.3 0.1 0.25 0.10 0.2 0.1 max 1.00 max MSB367 1.4 1.2 2.2 1.8 B A 1.35 1.15 0.4 0.2 BM0.2AM0.2 2.2 2.0 0.7 0.5

1995 Apr 25 12

Philips Semiconductors Product speciﬁcation N-channel dual-gate MOS-FET BF904WR DEFINITIONS LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. Data Sheet Status Objective speciﬁcation This data sheet contains target or goal speciﬁcations for product development. Preliminary speciﬁcation This data sheet contains preliminary data; supplementary data may be published later. Product speciﬁcation This data sheet contains ﬁnal product speciﬁcations. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

Product Information

BF904WR specifications and overview.

Summary

N-channel dual-gate MOS-FET

Description

N-channel dual-gate MOS-FET

Source title BF904WR_15 Datasheet(PDF) - Quanzhou Jinmei Electronic Co.,Ltd.

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