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1.1 General description

The BF1205C is a combination of two dual gate MOS-FET ampliﬁers with shared source and gate 2 leads and an integrated switch. The integrated switch is operated by the gate 1 bias of ampliﬁer b. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and a very good cross-modulation performance during AGC. Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor has a SOT363 micro-miniature plastic package.

1.2 Features

n Two low noise gain controlled ampliﬁers in a single package; one with a fully integrated bias and one with a partly integrated bias n Internal switch to save external components n Superior cross-modulation performance during AGC n High forward transfer admittance n High forward transfer admittance to input capacitance ratio.

1.3 Applications

n Gain controlled low noise ampliﬁers for VHF and UHF applications with 5 V supply voltage u digital and analog television tuners u professional communication equipment. BF1205C Dual N-channel dual gate MOS-FET Rev. 02 — 15 August 2006 Product data sheet CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling.

1.4 Quick reference data

[1] Tsp is the temperature at the soldering point of the source lead. Table 1. Quick reference data Per MOS-FET unless otherwise speciﬁed. Table 2. Discrete pinning

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. [1] * = p or -: made in Hong Kong. [1] Tsp is the temperature at the soldering point of the source lead. Table 3. Ordering information Table 4. Marking Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 6. Thermal characteristics

240 K/W

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. [1] R G1 connects gate 1 (b) to VGG = 0 V (seeFigure3). [2] R G1 connects gate 1 (b) to VGG = 5 V (seeFigure3). Fig 1. Power derating curve. Table 7. Static characteristics

8.1 Dynamic characteristics for ampliﬁer a

VGG = 0 V: ampliﬁer a is on; ampliﬁer b is off. Table 8. Dynamic characteristics for ampliﬁer a[1] Common source; Tamb =2 5°C; VG2-S =4V ; VDS =5V ; ID = 19 mA.

8.1.1 Graphs for ampliﬁer a

Table 8. Dynamic characteristics for ampliﬁer a[1] …continued Common source; Tamb =2 5°C; VG2-S =4V ; VDS =5V ; ID = 19 mA. Fig 4. Transfer characteristics; typical values. Fig 5. Output characteristics; typical values.

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 7 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET (1) VG2-S =4V . (2) VG2-S = 3.5 V. (3) VG2-S =3V . (4) VG2-S = 2.5 V. (5) VG2-S =2V . (6) VG2-S = 1.5 V. VDS(a) =5V ; VG1-S(b)=V DS(b) =0V ; Tj=2 5°C. VDS(a) =5V ; VG2-S =4V ; VDS(b) =5V ; VG1-S(b)=0V ; Tj=2 5°C. Fig 6. Forward transfer admittance as a function of drain current; typical values. Fig 7. Drain current as a function of internal G1 current (current in pin drain (b) if MOS-FET (b) is switched off); typical values. ID (mA) 03 2 2481 6 001aaa556 yfs (mS) (1) (2) (3) (4) (5) (6) 001aaa557 ID (b) (µA) 06 0 4020 ID (a) (mA)

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 8 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET VDS(a) =V DS(b) =V supply, VG2-S =4V , Tj=2 5°C, R G1(b) = 150 kΩ (connected to ground); see Figure3. (1) VDS(b) =5V . (2) VDS(b) = 4.5 V. (3) VDS(b) =4V . (4) VDS(b) = 3.5 V. (5) VDS(b) =3V . (6) VDS(b) = 2.5 V. VDS(a) =5V ; VG1-S(b)= 0 V; gate 1 (a) = open; Tj=2 5°C. Fig 8. Drain current of ampliﬁer a as a function of supply voltage of a and b ampliﬁer; typical values. Fig 9. Drain current as a function of gate 2 and drain supply voltage; typical values. Vsupply (V) 05 4231 001aaa558 ID (mA) 001aaa559 VG2-S (V) 06 42 ID (mA) (1) (2) (3) (4) (5) (6) VDS(a) =V DS(b) =5V ; VG1-S(b)=0V ; fw = 50 MHz; funw = 60 MHz; Tamb =2 5°C; seeFigure33. VDS(a) =V DS(b) =5V ;V G1-S(b)= 0 V; f = 50 MHz; see Figure33. Fig 10. Unwanted voltage for 1 % cross-modulation as a function of gain reduction; typical values. Fig 11. Gain reduction as a function of AGC voltage; typical values. gain reduction (dB) 05 0 4020 3010 001aaa560 100 110 120 Vunw (dBµV) VAGC (V) 04 312 001aaa561 gain reduction (dB)

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 9 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET VDS(a) =V DS(b) =5V ; VG1-S(b)= 0 V; f = 50 MHz; Tamb =2 5°C; seeFigure33. VDS(a) =5V ; VG2-S(a)=4V ; VDS(b) =V G1-S(b)=0V ; ID(a)=1 9m A . Fig 12. Drain current as a function of gain reduction; typical values. Fig 13. Input admittance as a function of frequency; typical values. 001aaa562 gain reduction (dB) 06 0 4020 ID (mA) 001aaa564 f (MHz) 10 10 3102 10−1 102 bis, gis (mS) 10−2 bis gis VDS(a) =5V ; VG2-S(a)=4V ; VDS(b) =V G1-S(b)=0V ; ID(a)=1 9m A . VDS(a) =5V ; VG2-S(a)=4V ; VDS(b) =V G1-S(b)=0V ; ID(a)=1 9m A . Fig 14. Forward transfer admittance and phase as a function of frequency; typical values. Fig 15. Reverse transfer admittance and phase as a function of frequency: typical values. f (MHz) 10 10 3102 001aaa565 102 yfs (mS) −ϕ fs (deg) 102 yfs −ϕ fs 001aaa566 102 103 yrs (mS) 102 −ϕ rs (deg) f (MHz) 10 10 3102 yrs −ϕ rs

8.1.2 Scattering parameters for ampliﬁer a

8.1.3 Noise data for ampliﬁer a

Fig 16. Output admittance as a function of frequency; typical values. Table 9. Scattering parameters for ampliﬁer a Table 10. Noise data for ampliﬁer a

8.2 Dynamic characteristics for ampliﬁer b

[1] For the MOS-FET not in use: VG1-S(a) = 0 V; VDS(a) =0 V . [2] Measured inFigure34 test circuit. Table 11. Dynamic characteristics for ampliﬁer b Common source; Tamb =2 5°C; VG2-S =4V ; VDS =5V ; ID = 13 mA.

8.2.1 Graphs for ampliﬁer b

(1) VG2-S =4V . (2) VG2-S = 3.5 V. (3) VG2-S =3V . (4) VG2-S = 2.5 V. (5) VG2-S =2V . (6) VG2-S = 1.5 V. (7) VG2-S =1V . VDS(b) =5V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C. (1) VG1-S(b)= 1.6 V. (2) VG1-S(b)= 1.5 V. (3) VG1-S(b)= 1.4 V. (4) VG1-S(b)= 1.3 V. (5) VG1-S(b)= 1.2 V. (6) VG1-S(b)= 1.1 V. (7) VG1-S(b)=1V . VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C. Fig 17. Transfer characteristics; typical values. Fig 18. Output characteristics; typical values. VG1-S (V) 02 1.60.8 1.20.4 001aaa568 I D (mA) (4) (5) (6) (7) (2) (3) (1) 001aaa569 VDS (V) 06 42 ID (mA) (1) (2) (5) (6) (7) (4) (3)

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 13 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET (1) VG2-S =4V . (2) VG2-S = 3.5 V. (3) VG2-S =3V . (4) VG2-S = 2.5 V. (5) VG2-S =2V . (6) VG2-S = 1.5 V. (7) VG2-S =1V . VDS(b) =5V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C. (1) VG2-S =4V . (2) VG2-S = 3.5 V. (3) VG2-S =3V . (4) VG2-S = 2.5 V. (5) VG2-S =2V . (6) VG2-S = 1.5 V. (7) VG2-S =1V . VDS(b) =5V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C. Fig 19. Gate 1 current as a function of gate 1 voltage; typical values. Fig 20. Forward transfer admittance as a function of drain current; typical values. VG1-S (V) 02 1.60.8 1.20.4 001aaa570 100 IG1 (µA) (1) (2) (4) (6) (7) (3) (5) ID (mA) 03 2 2481 6 001aaa571 yfs (mS) (1) (2) (3) (4) (5) (6) (7) VDS(b) =5V ; VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C. VDS(b) =5V ; VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C; RG1(b) = 150 kΩ (connected to VGG ); see Figure3. Fig 21. Drain current as a function of gate 1 current; typical values. Fig 22. Drain current as a function of gate 1 supply voltage (VGG ); typical values. IG1 (µA) 05 0 4020 3010 001aaa572 I D (mA) VGG (V) 05 4231 001aaa573 ID (mA)

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 14 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET (1) RG1(b) =6 8kΩ . (2) RG1(b) =8 2kΩ . VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C; R G1(b) is connected to VGG ; seeFigure3. (1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. VDS(b) =5V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C; R G1(b) = 150 kΩ (connected to VGG ); seeFigure3. Fig 23. Drain current as a function of gate 1 (VGG ), drain supply voltage and value of RG1; typical values. Fig 24. Drain current as a function of gate 2 voltage; typical values. 001aaa574 VGG = VDS (V) 06 42 I D (mA) (1) (2) (3) (4) (5) (8) (6) (7) 001aaa575 VG2-S (V) 06 42 ID (mA) (1) (3) (4) (5) (2)

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 15 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET (1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. VDS(b) =5V ; VDS(a) =V G1-S(a)=0V ; Tj=2 5°C; R G1(b) = 150 kΩ (connected to VGG ); seeFigure3. VDS(b) =5V ; VGG =5V ; VDS(a) =V G1-S(a)=0V ; R G1(b) = 150 kΩ (connected to VGG ); fw = 50 MHz; funw = 60 MHz; Tamb =2 5°C; seeFigure34. Fig 25. Gate 1 current as a function of gate 2 voltage; typical values. Fig 26. Unwanted voltage for 1 % cross-modulation as a function of gain reduction; typical values. VG2-S (V) 06 42 001aaa576 I (µA) (1) (2) (4) (5) (3) 001aaa577 gain reduction (dB) 06 0 4020 100 110 120 Vunw (dBµV) VDS(b) =5V ; VGG =5V ; VDS(a) =V G1-S(a)=0V ; R G1(b) = 150 kΩ (connected to VGG ); f = 50 MHz; Tamb =2 5°C; seeFigure34. VDS(b) =5V ; VGG =5V ; VDS(a) =V G1-S(a)=0V ; R G1(b) = 150 kΩ (connected to VGG ); f = 50 MHz; Tamb =2 5°C; seeFigure34. Fig 27. Typical gain reduction as a function of AGC voltage. Fig 28. Drain current as a function of gain reduction; typical values. VAGC (V) 04 312 001aaa578 gain reduction (dB) 001aaa579 gain reduction (dB) 06 0 4020 ID (mA)

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 16 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET VDS(b) =5V ; VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; ID(b) = 13 mA. VDS(b) =5V ; VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; ID(b)=1 3m A . Fig 29. Input admittance as a function of frequency; typical values. Fig 30. Forward transfer admittance and phase as a function of frequency; typical values. 001aaa581 f (MHz) 10 10 3102 10−1 102 bis, gis (mS) 10−2 bis gis f (MHz) 10 10 3102 001aaa582 102 yfs (mS) −ϕ fs (deg) 102 yfs −ϕ fs VDS(b) =5V ; VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; ID(b)=1 3m A . VDS(b) =5V ; VG2-S =4V ; VDS(a) =V G1-S(a)=0V ; ID(b)=1 3m A . Fig 31. Reverse transfer admittance and phase as a function of frequency; typical values. Fig 32. Output admittance as a function of frequency; typical values. 001aaa583 102 103 yrs (µS) 102 −ϕ rs (deg) f (MHz) 10 10 3102 yrs −ϕ rs 001aaa584 bos, gos (mS) 10−2 10−1 f (MHz) 10 10 3102 bos gos

8.2.2 Scattering parameters for ampliﬁer b

8.2.3 Noise data for ampliﬁer b

Table 12. Scattering parameters for ampliﬁer b Table 13. Noise data for ampliﬁer b

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 18 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 9. Test information Fig 33. Cross-modulation test set-up for ampliﬁer a. 50 Ω 10 kΩ R GEN 50 Ω R L 50 Ω50 Ω R G1 4.7 nF 4.7 nF 4.7 nF g2 S g1 (b) d (b) d (a) 4.7 nF 4.7 nF 4.7 nFg1 (a) BF1205C VGG VDS (b) VDS (a) VAGC 2.2 µH 2.2 µH 001aaa563 Vi Fig 34. Cross-modulation test set-up for ampliﬁer b. 50 Ω 10 kΩ R GEN 50 Ω 50 Ω R G1 4.7 nF 4.7 nF 4.7 nF g2 S g1 (b) d (b) d (a) 4.7 nF 4.7 nF 4.7 nF g1 (a) BF1205C VGG VDS (b) VDS (a) VAGC 2.2 µH 2.2 µH R L 50 Ω 001aaa580 Vi

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 19 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 10. Package outline Fig 35. Package outline. REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT363 SC-88 wB Mbp D e pin 1 index A Lp Q detail X H E E v M A AB y 0 1 2 mm scale c X 13 2 456 Plastic surface-mounted package; 6 leads SOT363 UNIT A 1 max bp cD E e1 H E Lp Qy wv mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.10.2 DIMENSIONS (mm are the original dimensions) 0.45 0.15 0.25 0.15 A 1.1 0.8 04-11-08 06-03-16

20040518 Product data sheet - -

BF1205C_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 15 August 2006 21 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 12. Legal information

12.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Deﬁnitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.semiconductors.philips.com.

12.2 Deﬁnitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modiﬁcations or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the full data sheet shall prevail.

12.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation speciﬁcations and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a Philips Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation. Limiting values —Stress above one or more limiting values (as deﬁned in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.semiconductors.philips.com/proﬁle/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conﬂict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

12.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales ofﬁce addresses, send an email to: sales.addresses@www.semiconductors.philips.com Document status[1][2] Product status[3] Deﬁnition Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development. Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation. Product [short] data sheet Production This document contains the product speciﬁcation.

Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET © Koninklijke Philips Electronics N.V. 2006. All rights reserved. For more information, please visit: http://www.semiconductors.philips.com. Date of release: 15 August 2006 Document identifier: BF1205C_2 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 14. Contents

Product Information

BF1205C specifications and overview.

Summary

Dual N-channel dual gate MOS-FET

Description

Dual N-channel dual gate MOS-FET

Source title BF1205C Datasheet(PDF) - Quanzhou Jinmei Electronic Co.,Ltd.

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