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firmware can disable most peripheral clocks to save power. step in all peripheral initialization routines should enable the clock to the module. each of the clock sources mentioned in this document. AHB or a divide by 2 version of it, so it is always synchronized with the AHB clock. clock control block diagram. Table 1. AHB Clock Source Summary

Figure 1. Example Precision32 Clock Control Block Diagram

oscillator is 20 MHz, but a divide by 8 version is also available as an AHB clock source. power than other oscillators, but may not be as accurate over voltage and temperature. There are no configuration bits for this oscillator. Figure 2 shows the block diagram for the low power oscillator. Figure 2. Low Power Oscillator Block Diagram addition to the AHB clock source. The factory-calibrated output frequency of this oscillator is 16.4 kHz. crystal. Figure 3 shows the block diagram for the low frequency and RTC oscillators.

When operating in crystal mode, the external oscillator module supports crystals ranging from 10 kHz to 25 MHz. oscillator hardware configuration. Figure 5. External Crystal Oscillator Configuration series” as seen by the crystal and “in parallel” with the stray capacitance of the XTAL1 and XTAL2 pins. when completing these calculations. If CA and CB are the same (C), the resulting equation is shown in Equation 2. 12.5 pF placed as close to the pins as possible (3 pF per pin) results in crystal load capacitors of 13 pF each. traces that could introduce noise or interference.

external C oscillator hardware configuration. Figure 7. External C Oscillator Configuration device power supply in Volts, and KF is the K Factor.

Rev. 0.1 11 3. Clocks and the Peripherals The APB clock drives most peripherals and their registers. The exceptions to this are lower power peripherals that run from the RTC Oscillator or the Low Frequency Oscillator directly. For peripherals that run from the APB clock, disabling th e clock to the module in the device clock control module (CLKCTRL) will disable the clock to bo th the module and the module’s regist ers. For peripher als that run from another clock source, disabling the clock to the module will disable the clock to the module’s registers only and the module will continue to run. 4. Reset Behavior On SiM3xxxx devices, the low po wer oscillator (LPOSCn) is the default oscillato r after a reset. In addition, the clocks to most peripherals are disabled to save power. The clock to the module must be enabled before firmware can modify the registers. The first initialization step in all peripheral initialization routines should enable the clock to the module.

12 Rev. 0.1 CONTACT INFORMATION Silicon Laboratories Inc.

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