AN5948

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AN5948-2 September 2009 LN26862 Authors: Dinesh Chamund, Colin Rout Page 1 of 11 INTRODUCTION We are often asked “What is the MTBF or FIT rating of this diode or that thyristor?” We cannot answer this without knowing how the customer intends to use these devices in a system and what the conditions of the operation of the devices are. In other words we would need to know the “Mission Profile”. MTBF is the “ Mean Time Between Failure” and is the measure of an average time for a second component to fail after the failure of a first component in a system. MTBF usually applies to a repairable system consisting of many components. Knowing the MTBF allows the system designer to recommend repair or maintenance schedule for the system and thus deduce the running cost of the sys tem. For semiconductor devices MTTF (Mean Time To Fail) is generally appropriate , however MTBF and MTTF have the same value if the time to repair a system is negligible. Thus MTBF is loosely used to mean MTTF for semiconductor devices. FIT (Failure unIT or Failure In Time) is a unit for the measure of failure rate (λ) of the components, and is equal to o ne failure per billion hours (109 hours). Both MTBF and λ are statistical quantities and if the failure pattern assumes normal dis tribution then one is the reciprocal the other (MTBF = 1/λ). The failure rate is useful for predicting the life of a device. The purpose of this Application Note is to discuss the reliability of the high power bipolar devices (diodes, thyristors and GTOs) which is related t o the different failure mechanisms, materials used in packaging the devices and the manufacturing processes used. Also different methods used to predict the reliability and pro s and con s about each method are discussed. DEVICE CONSTRUCTION Fig. 1 Pressure contact thyristor construction Fig. 1 shows a typical construction of a fully floating pressure contact thyristor and the materials used. The silicon wafer is sandwiched between a molybdenum washer and disc , thus providing electrical contact to the active parts of the device. These are further sandwiched between two copper pole pieces one in the ceramic housing and the other in the lid. The housi ng is backfilled with inert gas and the copper lid is cold welded to the ceramic housing. In non -fully floating construction the molybdenum disc is alloyed to the silicon wafer. Electrical and thermal

contact is made by clamping the pole pieces under pressure. THE CONCEPT OF RELIABILTY Reliability is a design engineerin g discipline, which applies scientific knowledge to assure a product will perform its intended function for the required duration within a given environment. This includes designing i n the ability to maintain, test and support the product throughout its total life cycle. There are several definitions of the reliability and IEC 50(919):1990 defines reliability performance as “The ability of an item to perform required function under given conditions for a given interval of time.” The fundamental understand ing of the reliability of any product requires a basic understanding of failure mechanisms and how the failure rate is determined. FAILURE MECHANISMS The pressure contact power semiconductor failures can be classified into two main categories namely  The random failures  The wear-out failures Random failures: These failures are caused by external accidental event such as particle radiation, voltage transients, and damage by service actions leading to momentary over -stress. This type of failure is not relate d to the length of service or the age of the device. Figure 2 shows a typical failure site due to cosmic ray activity. Wear-out failures: These types of failures are attributed to the accumulation of incremental physical damage under the operating load (st ress) conditions altering the device properties beyond the functional limit. These are mechanical wear out due to expansion and contraction caused by cyclic power loading, ionic drift in the junction passivation leading to an increase in leakage current and eventual voltage breakdown. Fig. 2 Failure due to cosmic rays causing damage to the silicon crystal lattice which gives rise to immediate and catastrophic failure of the device. Depending on the application and the duty cycle within that application, any one of these failure mechanisms can dominate. Cosmic Ray induced failure Failure due to cosmic rays was first postulated in the early 1990s to explain an unexpectedly high failure rate of GTOs in railway locomotives running with higher than previous DC-link voltages. Failures were seen to be random, sudden, and without any previous overload condition or signs of wear - out. The cause of this failure mechanism is postulated to be neutrons, produced wh en

cosmic rays collide with the upper atmosphere, which have energies above 10MeV. When one of these neutrons hits the silicon lattice it will generate electron -hole pairs. If the electric field is high enough, the electrons and holes will be accelerated t o sufficient energy to cause avalanche multiplication and consequent device breakdown. Because the failure rate is exponentially related to the bias voltage and proportional to the time spent at that voltage, it is only applications where the device sits a t high DC volts relative to its rating that this failure mechanism needs to be considered. There is no easily applied universal formula for the failure rate because it depends upon the electric field profiles within the silicon of the device which depend upon the design philosophy. Generally, devices intended for such applications will have a figure for the maximum DC voltage for a rating of 100 FITS at 100% duty cycle quoted in their datasheets. Mechanical Wear In a power semiconductor, increases and decreases in the temperature of the device will cause the various internal components to expand and contract. Table 1 gives the linear temperature coefficient of expansion for materials commonly found inside such devices. In large diameter, high reliabilit y devices, where the internal components are pressed together by a clamp, molybdenum buffers are used between the silicon wafer and the copper electrodes, but in some of the smaller diameter products the copper electrode is in direct contact with the silic on wafer. The difference in the coefficient of thermal expansion causes movement of one component relative to its neighbours with a resultant scrubbing action. This scrubbing will eventually lead to degradation of the device characteristics; initially an i ncrease in the forward voltage drop but eventually the silicon becomes chipped and the voltage blocking capability of the device is lost. Table 1: Material properties Material Linear coefficient of expansion @ 20°C x 106 per °C Silicon 4.2 Copper 16.5 Aluminium 23.95 Molybdenum 5.2 Silver 18.9 Fig. 3a Thermo-mechanical wearout Fig3b Expanded view of the wearout Fig. 3a and 3b show a typical example of thermo-mechanical wear out failure. Note

that in Fig. 3a the wearout marks are radial with respect to the centre of the device. In the expanded view of the failure site (Fig. 3b) the scrape marks from the sliding action can be seen at the bottom of several wear areas. Ionic Drift in the passivation The surface of the silicon that supports the blocking voltage of devices is passivated with one of a number of different compounds, depending on the structure, that has a number of functions. Primarily it is a high dielectric material used to confine the electric field but it also locks up mobile ionic charge that may be present on the surface of the silicon. If this ionic charge drifts, under the influence of the applied electric field, into a region of high field strength it can cause excess leakage curr ent to be observed and a resultant degradation in the voltage blocking performance of the device. This phenomenon is largely limited to very high voltage devices. Manufacturers of these products will subject their devices to a short “burn-in” to precipitat e early life failures due to this mechanism. After any early failures the failure rate is extremely small. PREDICTIVE RELIABILITY Many engineering disciplines incorporate reliability engineering that employ tools and methodology of reliability engineering such as predictive reliability , Weibull an alysis, reliability testing and accelerated life testing. The purpose of predictive reliability is to evaluate the failure rate (λ) or the MTBF of the device for a specified lifetime. The failure rate of a large p opulation of similar and non - repairable items show a typical bathtub curve (Fig.4) with the following three phases: 1. Early failure s: where λ(t) generally decreases rapidly with time. The failures in this phase are attributed to randomly distributed weaknesses in materials, components or production processes. To eliminate early failure, burn-in or environmental stress screening is used. This phase is also called infant mortality. 2. Useful life: where failure rate is approximately constant and is useful for calculations. The failures are intrinsic and random (mainly related to failure of silicon material). 3. Wearout failures: where λ(t) increases with time. The failures in this phase are attributed to degradation phenomenon due to aging, fatigue, wearout, etc. Fig. 4 The Bathtub Curve Some of the methods used in semiconductor industry to predict reliability are:  Field failure experience  Qualification procedure  Theoretical calculation  Physics of failure method Field failure experience: This method involves collection and analysis of all field failures and also system integration. The advantage of this method is that it gives the best reliability evaluation. The Early Failures Useful Life Wearout failures fai λ(t) t

main drawback is the difficulty in collecting data, and its integrity (use du ration, failure context, quantity of parts used with reliable accuracy). This method may not be suitable for small or medium volume power semiconductor manufacturers as quantities involved may not be statistically significant. Qualification procedure: The principle behind this method is to qualify a product based on a test plan according to defined conditions such as international standards and or some reference test plan. The obvious advantages of this method are the same evaluation process for all companies in a same industry sector and no additional cost for study (test plan definition). The major disadvantage is that the test plan becomes obsolete when considering new technology. The test plan can be very general and not exactly adapted to the applicatio n (constraint choice). Table 3 shows the standard qualification tests (based mainly on the IEC Standard) adopted by Dynex during the product release stage and the maintenance of the qualified product. Theoretical calculation: The traditional method of calc ulating failure rate uses an accelerated life testing of the device. The method involves testing devices from a random sample obtained from the parent population followed by a stress test, under accelerated conditions, to promote failures. The acceleration factor (AF) thus obtained is then extrapolated to end -use conditions by means of a predetermined statistical model to give an estimate of the failure rate in the field applications. For thermally/electrically activated failures, modified Arrhenius equatio n (1) is used in conjunction with Chi square statistical model equation (2).    211exp V V TTk EAF stressuse a (1) FITAFTD 102   (2) where AF = acceleration factor Ea = activation energy (eV) k = Boltzmann-factor (J/K) Tuse = application temperature (°C) Tstress = stress temperature (°C) V2 = Test voltage V1 = Application voltage β = constant for voltage stress  = failure rate (FIT)  = Chi square confidence value TD = Total device hours From the equation (2) , a higher value of device hours (T D) gives low value of failure rate. Hence in order to accumulate a high number of device hours, large number s of devices in test are required and or much longer time for the test. This form of statistics is acquired over a number of years of regular testing of the product. The unknown parameters in equation (1) are the activation energy Ea and β . Ea is a constant in the Arrhenius equat ion and is related to the kinetics of the underlying physical process under temperature stress while β is a constant related to the voltage stress. These constants are experimentally determined. For cyclic stress the Coffin Manson equation (3) is used. This model predicts the number of

cycles to fail due to thermo -mechanical cyclic stress. B cjT AN  (3) where N = number of cycles to fail. A = fitting parameter. B = fitting parameter. ΔTj-c = temperature difference , junction to case For pressure contact high power devices, the fatigue life depends upon:  The wafer diameter  The temperature change  The device construction  The mounting force Somos et al (1) have derived an empirical formula for thermal fatigue based on Coffin Manson equati on. The number of cycles to failure Nf : Where K= constant, ΔT = temperature difference This is visualised in the graph of Fig. 5. This graph assumes that the devices are clamped evenly to the recommended f orce so that the relative expansion takes place radially outwards from the centre. If the device is clamped unevenly, then one point on the circumference of the silicon will be hard clamped and the diametrically opposite point will move twice as far as for the evenly clamped case. Thus unevenly clamped 50mm device will follow the curve for a 100mm evenly clamped device. This type of failure mechanism should be evaluated for slowly cycling thermal loads such as traction locomotives or pulsed power supplies. To use this graph in practice, temperature variations due to the duty cycle have to be converted into an equivalent number of cycles at a set temperature excursion. There are several hand -books created to help predict the reliability of electronics components and among that Military Hand - Book 217 ( MIL H DBK 217F ) entitled “Reliability Prediction of Electronic Equipment” is the most popular and well received document. The method given in this handbook to calculate the failure rate p is as follows: where p = the specific failure rate b = base failure rate (0.002) t = temperature factor r = current rating factor s = voltage stress factor q = quality factor e = environmental factor For modern day high power semiconductors, this can to be reduced to a function of the temperature and the blocking voltage of the device i.e. failure rate, p is given by equation (6). λp = A.Tb (6)

where A is re lated to the voltage stress level and b is related to the tempera ture stress level. The graph (2) of Fig.6 was developed in the 1960s under US Government sponsorship for the MINUTEMAN intercontinental ballistic missile program. It used a large statistical sample for a high degree of confidence. Although the devices were small compared to today’s high power pro ducts, semiconductor manufacturers have verified that this information is still valid for present day use. One investigation of thyristors used in High Voltage DC Transmission (the single largest population of devices in one equipment) indicated actual, in service, failure rates of 0.0057% to 0.029% per thousand hours of operation, which compares very well with the calculations for the device application. Again, to use the graph the actual duty cycle must be known. In the past MIL H DBK 217F was updated periodically but recently it has not been updated and it is now very much out dated. Physics of failure method: This is relatively a new approach to the design and development of a reliable product to prevent failure based on the knowledge of root cause failur e processes. The concept is based on a good understanding of relationships between the requirements and the physical properties of the product and their variation in the production processes. Also how the product materials react and interact under the appl ied stresses at the application conditions and their effect on the reliability. The product is designed with built - in reliability, which is quantified by the physics of failure models for each failure mechanism. Although this method is at infancy stage, it is gaining some popularity. MISSION PROFILE Mission profile refers to a set of operational and environmental conditions that are experienced during the operating life of a device. Any of these conditions or combination of these conditions has influence on the failure rate and the wear out of the device. An example for a mission profile of a high - speed rail traction application is shown in Table 2. The operating life of a product is determined for the given operational and environmental conditions. Experi ment and simulation methods are used to determine this. This method gives a better estimation of the device under the real application conditions. SUMMARY: To summarise, the reliability of high power pressure contact bipolar devices depends on the construction and the components used, their material properties, and their interactions with external and internal stresses imposed by the operating and environmental conditions. There are several methods available to predict the failure rate of the device, each has its advantages and disadvantages. The physics of failure method is an emerging method and will require some time before it is fully accepted. The most meaningful method of predicting the reliability is the use of “Mission-profile”. CONCLUSION A brief introduction to the concept of reliability related to the high power bipolar devices is given. The methods used to quantify the reliability are explained. Also it has been emphasised that the Mission Profile method gives the best reliability prediction.

Table 2: Typical Mission Profile for rail traction application Stress condition Temperature range Cycles over 30yr life Overnight shed stop -40°C to operating temp. Worst case 10,000 Station stop Heat-sink to operating temp. ~3.5E5 Traction/braking Experimentally measured at 30°C ~3.4E7 Power cycling < 1°C ~7E11 Dynex can provide service to calculate FIT and lifetime for a given customer “mission profile” upon request. References: (1) Power Semiconductors Empirical Diagrams Expressing Life as a Function of Temperature Excursion. Istvan Somos, Dante Piccone, Lawrence Willinger & William Tobin. IEEE Transactions on Magnetics, Vol 29, No 1, January 1993. (2) Power Conversion – Application Handbook. A.C Stevenson private publication 1997. Fig. 5 Thermal fatigue life failure

Fig. 6 Voltage failure rate

Table 3: Qualification Tests for Pressure contact Bipolar Devices Qualification Test Test Method Test Conditions Qual Standard Electrical Assessment High Temperature Blocking Life IEC 60747-2 (Diodes) IEC60747-6(Thyristors) IEC60749-23 T = Max Tj 90% VR (Diodes) 80% VDRM/VRRM (Thyristors) 1000 hours Thermal Cycling/Power Cycling IEC 60747-2 (Diodes) IEC60747-6 (Thyristors) IEC60749-34 Equivalent to Δ60°C Equivalent to 175,000 cycles Environmental Assessment Temperature Cycling IEC60068-2-14 Na IEC60749-25 -55°C to 125°C, 2 hours dwell, 2 min transition 5 cycles Vibration IEC60068-2-6 IEC60749-12 f = 50 to 500Hz, a = 10g 2 hours in each of 3 mutually perpendicular axes Mechanical Shock IEC60068-2-27 IEC60749-10 a = 40g, t = 6ms half-sine 5000 shocks High Temperature Storage IEC60068-2-2 IEC60749-6 T = Tstg max 1000 hours Damp Heat, Steady State IEC60068-2-78 Cab IEC60749-4 T = 85°C, RH = 85% 168 hours

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