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used according to Sections 4 through 8. Table 1. Part Selection Guide
- Frequency Band Definition and Selection
to the frequency range desired. Table 2. Band Sequence Definition
Table 2. Band Sequence Definition (Continued)
4 Rev. 0.2 2.2. Si483x-B/Si4820/24 Band Selection Refer to Figure 1 below for the band selection circuits. Selecting a band determines the resistance value from the band select pin to GND. To select a specific band, you need to ensure two things: 1. Total value of resistance from the BAND to GND is equal to the value specified in Table 2 2. Total resistance from TUNE1 to GND is 500 k in 1% tolerance The following sections describe some commonly used bands and their respective selection circuits. 2.2.1. Typical 12-band application Figure 1 and Table 3 illustrate the band and resistor value details for a typical 12-band application.
Figure 1. Typical 12-Band Selection Circuit
Table 3. Typical 12-Band Selection
Table 4 and Figure 2 show the band and resistor value details for a typical European 2-band application. Figure 2. Typical 2-Band Selection Circuit for Europe Table 4. Typical European 2-Band Selection
Table 5 and Figure 3 show the band and resistor value details for a typical 2-band application for the U.S. Figure 3. Typical 2-Band Selection Circuit for US Table 5. Typical U.S. 2-Band Selection
- Si483x-B/Si4820/24 SSOP Schematic and Layout
This section shows the typical schematic and layout required for optimal Si483x-B/Si4820/24 performance. “Volume” mode, tuner audio output volume can be adju sted with 2 push buttons in 32 steps (2 dB per step). applications circuits for different working modes. Figure 4. Si483x-B Mode Selection
10 Rev. 0.2 3.1. Si483x-B/Si4820/24 Basic Volume Mode Applications Circuits Figure 5 and Figure 6 illustrate the basic applications circuits for typica l 4-band FM/AM radios if using Si4831-B/ Si4820 or 12-band FM/AM/SW radios if using Si4835-B/Si 4824. The chip works in "Volume" mode without internal volume adjustment. Volume control can be performed at audio amplifier circuit stage. For Si483x-B, the pull-up resistor R42 of 10K for pin 2 STATION is a must for this application. C6 and C15 are required bypass capacitors for VDD1/V DD2 power supply pin 20/21. Place C6/C15 as close as possible to the VDD1/VDD2 pin 20/21 and DBYP pin 22. These recomm endations are made to reduce the size of the current loop created by the bypass cap and routing, mi nimize bypass cap impedance and return all currents to the DBYP pin. Pin 22 is the dedicated bypass capacitor pin. Do not connect it to power supply GND on PCB. Pin 13 and pin 14 are the GND of the chip, these pins must be well connected to the power supply GND on PCB. Pin 9 is the RFGND of the chip, it must be well connected to the power supply GND on PCB. When doing PCB layout, try to create a large GND plane underneath and around the chip. Route all GND (including RFGND) pins to the GND plane. C4 and/or C7 (4.7uF) are ac coupling caps for receiver analog audio output from pin 23 and/or pin 24. The input resistance of the amplifier R, such as a headphone amplifier, and the capacitor C will set the high pass pole given by Equation 1. Placement location is not critical. Equation 1. C2 and C3 (22 pF) are crystal loading ca ps required only when us ing the internal oscillato r feature. Refer to the crystal data sheet for the proper load capacitance and be ce rtain to account for parasitic capacitance. Place caps C2 and C3 such that they share a common GND connection and the current loop area of the crystal and loading caps is minimized. Y1 (32.768 kHz) is an optional crystal required only when using the inter nal oscillator feature. Place the crystal Y1 as close to XTALO pin 18 and XTALI pin 19 as possible to minimize current loops. If applying an external clock (32.768 kHz) to XTALI, leave XTALO floating. Do not route digital signals or reference clock traces nea r pin 6 and 7. Do not route Pin 6 and 7. These pins must be left floating to guarantee proper operation. Pin 16, 17 are volume control or bass/treble control pins fo r using tuner internal volume control function or bass/ treble control function. In this basic ap plication circuit, the tuner internal vo lume control function is not used, just connect the two pins to GND. VR1 (100K / 10%), R27, C1, C13 constitute the tuning circuit. 10 k at 10% tolerance is recommended for VR1. 1P12T switch S2 together with resistor ladder constitute band select circui ts. Si4831/Si4820 includes all AM and FM bands as defined in above section 2.1, Si4835/Si4824 includes all AM, FM and SW bands. Q1(2SC9018) together with it’s peripherals B6, C30,31,33,36, R31,32,34,41 is the LNA circuit for all SW bands, the LNA is switched off by LNA_EN signal in AM and FM mode controlled by Si4835/Si4824. For Si4820/24, do not route pin 23. This pin must be left floating to guarantee proper operation. fc
Figure 5. Si483x-B Basic Volume Mode Applications Circuit
Figure 6. Si4820/24 Basic Volume Mode Applications Circuit
14 GND
15 RST
16 VOL+
17 VOL-
18 XTAL0
19 XTALI
20 VDD1
21 VDD2
22 DBYP
24 AOUT
Figure 10. Si4820/24 Applications Circuit with 32-Level Volume Control sets the default volume to Max-18dB.
Figure 11. Si483x-B/Si4820/24 Default Volume Selection in Volume Mode pin (RSTB) voltage goes down to 0.3*VDD before the VDD2 voltage drops to 1.65 V during the power off process. immediately at the power off event. not a large enough position change on PVR during the power off/on cycle.
Figure 12. Si483x-B Applications Circuits with User Setting Memory
Table 6. Si483x-B Basic Volume Mode Applications Circuit BOM
Table 7. Si4820/24 Basic Volume Mode Applications Circuit BOM
Table 8. Si4835-B/Si4824 Additional BOM (for 8 SW Bands) Table 9. Si483x-B Additional BOM for 9-Level Bass/Treble Control Table 10. Si483x-B Additional BOM for 3-Level Bass/Treble Control Table 11. Si483x-B Additional BOM for 32-Level Volume Control
Table 12. Si4820/24 Addtional BOM for 32-Level Volume Control Table 13. Si483x-B Additional BOM for User Setting Memory
Place Vdd1/Vdd2 bypass capacitor C6, C15 as close as possible to the supply (pin 20/pin 21) and DBYP (pin 22). Do not connect the DBYP (pin 22) to the board GND. Place the crystal as close to XTALO (pin 18) and XTALI (pin 19) as possible. underneath and around the chip. Do not route pin 6 and 7. These pins must be left floating to guarantee proper operation. Place C1, C13 as close to pin3 TUNE1 as possible. For Si4820/24, do not route pin 23, leave it floating to guarantee proper operation. Copy the Si483x-B layout example as much as possible when doing PCB layout. Figure 13. Si483x-B PCB Layout Example
- Headphone Antenna for FM Receive
approximately half the FM wavelength (FM wavelength is ~3 m). of a typical application is shown in Figure 14. Figure 14. Typical Headphone Antenna Application
With the specified BOM components, the corner frequency of the headphone amplifier is approximately 20 Hz. manufacturer is not critical for resistors and capacitors. Table 14. Headphone Antenna Bill of Materials
Rev. 0.2 27 4.4. Headphone Antenna Layout To minimize inductive and capaciti ve coupling, inductor LMATCH and headphone jack J24 should be placed together and as far from noise sources such as clocks and digital circuits as possible. LMATCH should be placed near the headphone connector to keep audio currents away from the chip. To minimize CSHUNT and CP, place ferrite beads F1 and F2 as close as possible to the headphone connector. To maximize ESD protection diode effe ctiveness, place diodes D1, D2, and D3 as close as possible to the headphone connector. If capacitance larger than 1 pF is required for D1 and D2, both components should be placed between FB1, FB2, and the headphone amplifier to minimize CSHUNT. Place the chip as close as possible to the headpho ne connector to minimize antenna trace capacitance, CPCBANT. Keep the trace length short and narrow and as far above the reference plane as possible, restrict the trace to a microstrip topology (trace routes on the top or bottom PCB layers only), minimize trace vias, and relieve ground fill on the trace layer. Note that minimizing capacitance has the effect of maximizing characteristic impedance. It is not necessary to design for 50 transmission lines. To reduce the level of digital noise passed to the antenna, RF shunt capacitors C5 and C6 may be placed on the left and right audio traces close to the headphone ampl ifier audio output pins. The recommended value is 100 pF or greater; however, the designer sh ould confirm that the headphone amplifie r is capable of driving the selected shunt capacitance. 4.5. Headphone Antenna Design Checklist Select an antenna length of 1.1 to 1.45 m. Select matching inductor LMATCH to maximize signal strength across the FM band. Select matching inductor LMATCH with a Q of 15 or greater at 100 MHz and minimal dc resistance. Place inductor LMATCH and headphone connector together and as far from potential noise sources as possible to reduce capacitive and inductive coupling. Place the chip close to the headphone connector to minimize antenna trace length. Minimizing trace length reduces CP and the possibility for inductive and capacitive coupling into the antenna by noise sources. This recommendation must be followed for optimal device performance. Select ferrite beads F1-F2 with 2.5 k or greater resistance at 100 MHz to maximize RSHUNT and, therefore, RP. Place ferrite beads F1-F2 close to the headphone connector. Select ESD diodes D1-D3 with minimum capacitance. Place ESD diodes D1-D3 as close as possible to the headphone connector for maximum effectiveness. Place optional RF shunt capacitors near the headphone amplifier’s left and right audio output pins to reduce the level of digital noise passed to the antenna.
input connector for maximum effectiveness. Maximize whip antenna length for optimal performance. Select matching inductor L1 with a Q of 15 or greater at 100 MHz and minimal dc resistance. capacitive and inductive coupling. recommendation must be followed for optimal device performance. Place ESD U3 as close as possible to the whip antenna for maximum effectiveness. Select ESD diode U3 with minimum capacitance. Place the ac coupling capacitor, C5, as close to the FMI pin as possible. Table 15. FM Whip Antenna Bill of Materials
- Ferrite Loop Antenna for AM Receive
prone to device noise activity and may result in better AM reception. a better sensitivity than the miniature one. Figure 18. Standard and Miniature Ferrite Loop Antennas and 450 uH for the Si483x-B/Si4820/24 AM Receiver. Table 16 lists the recommended ferrite loop antenna for the Si483x-B/Si4820/24 AM Receiver. Table 16. Recommended Ferrite Loop Antenna
Figure 19. AM Ferrite Loop Antenna Schematic C1 is the ac coupling cap going to the AMI pin and its value should be 0.47 µF. D1 is an optional ESD diode if there is an exposed pad going to the AMI pin. AM band. Noise sources can come from clock signals, sw itching power supply, and digital activities (e.g., MCU). chip. This will minimize capacitive coupling between the plane(s) and the antenna. To tune correctly, the total capacitance seen at the AMI input needs to be minimized and kept under a certain value. capacitance at the AM input can be calculated using the formula shown in Equation 3. Table 17. Ferrite Loop Antenna Bill of Materials *Note: Optional; only needed if there is any exposed pad going to the AMI pin.
32 Rev. 0.2 Equation 3. Expected Total Capacitance at AMI The total allowable capacitance, when interfacing a ferrite loop stick antenna, is the effective capacitance resulting from the AMI input pin, the capacitance from the PCB, and the capacitance from the ferrite loop stick antenna. The inductance seen at the AMI in this ca se is primarily the inductance of the ferrite loop stick antenna. The total allowable capacitance in the case of an air loop antenna is the effective capacitance resulting from the AMI input pin, the capacitance of the PCB, the capacitance of the transformer, and the capacitance of the air loop antenna. The inductance in this case should also take all the elem ents of the circuit into account. The input capacitance of the AMI input is 8 pF. The formula shown in Equation 3 gives a total capacitance of 29 pF when a 300 uH ferrite loop stick antenna is used for an AM band with 10 kHz spacing, where the highest frequency in the band is 1750 kHz. 6.5. Ferrite Loop Antenna Design Checklist Place the chip as close as possible to the ferrite loop antenna feedline to minimize parasitic capacitance and the possibility of noise coupling. Place the ferrite loop stick antenna away from any sources of interference and even away from the I/O signals of the chip. Make sure that the AM antenna is as far away as possible from circuits that switch at a rate which falls in the AM band (504–1750 kHz). Recommend keeping the AM ferrite loop antenna at least 5 cm away from the tuner chip. Place optional component D1 if the antenna is exposed. Select ESD diode D1 with minimum capacitance. Do Not Place any ground plane under the ferrite loop stick antenna if the ferrite loop stick antenna is mounted on the PCB. The recommended ground separation is 1/4 inch or the width of the ferrite. Route traces from the ferrite loop stick connectors to the AMI input via the ac coupling cap C1 such that the capacitance from the traces and the pads is minimized. CTotal 1 2fmax 2Leffective Where: CTotal Total capacitance at the AMI input Leffective Effective inductance at the AMI input fmax Highest frequency in AM band=
Table 18. Recommended Transformers
Figure 21. AM Air Loop Antenna Schematic C1 is the ac coupling cap going to the AMI pin and its value should be 0.47 uF. D1 is a required ESD diode since the antenna is exposed. trace going to the air loop antenna, which will minimize parasitic capacitance and the possibility of noise coupling. or near the transformer. Use a shielded transformer if possible. falls in the AM band (504–1750 kHz). from the traces and the pads is minimized. Select ESD diode D1 with minimum capacitance. Table 19. Air Loop Antenna Bill of Materials
Maximize whip antenna length for optimal performance. capacitive and inductive coupling. recommendation must be followed for optimal device performance. Place the ac coupling capacitor C33, as close to the AMI pin as possible. Table 20. SW Whip Antenna Bill of Materials
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