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digital video stream greatly facilitates its distribution within a professional broadcast studio. Figure 1. Typical Example of a Professional Broadcast Video broadcast video system and how each of the components play a role in the synchronization chain.
- Digitizing the Video Signal
genlocking in the video world. Figure 2. SD-SDI Professional Video Camera Supporting SMPTE 259M and 344M video format. 3G-SDI has since replaced Dual Link SDI because it can be distribut ed over a a single cable. the video broadcasting industry.
10 SD-SDI
27 MHz (270 Mb/s SD-SDI)
36 MHz (360 Mb/s SD-SDI)
54 MHz (540 Mb/s SD-SDI)
270 Mb/s (4:3 480i/576i
360 Mb/s (16:9 480i/576i)
540 Mb/s (4:3 480p/576p)
13.5 MHz
18 MHz
27 MHz
6.75 MHz
Table 1. Common Video Formats and their Associated Sampling Rates*
2.97 Gb/s 372M Dual Link SDI
- In North America, the dominant broadcast HDTV standards are 720p60 and 1080i/30. In Europe, 720p50 and 1080i/25
- Non-integer frame rates were introduced when color was incorporated into the NTSC monochrome signal in the early
1950s. This new frame rate is obtained by dividing the even frame rate by 1.001.
Figure 3. Multiplexing HD Video (SMPTE 292M HD-SDI, 424M 3G-SDI, 372M Dual Link SDI)
- Genlocking - Synchronization of Video Equipment
that generates a video source. timing from the black burst signal is shown in Figure 4.
1.485 Gb/s
2.97 Gb/s
74.25 MHz
Figure 4. Extracting HSYNC from an Analog Composite Video Signal Table 2. Common Video Formats and their HSYNC and Sampling Rates
- The Need for Synchronization Within Video Network Components
synchronization requirements. There are times when an asynchronous video signal needs to be synchronized to the studio’s genlocked reference. of a frame synchronizer is shown in Figure 5. by the timing generator. The parallel YCbCr component video is then serialized and output through the cable driver. The result is a genlocked SDI video signal that is synchronous with other video equipment in the studio.
to digitize and serialize. A block diagram of a professional video monitor is shown in Figure 7. its digital counterpart before reaching the display. to the video clock that it is processing. Figure 7. Block Diagram of a Professional Monitor diagram of the video switcher is shown in Figure 8.
- Jitter Requirements for Video Clocks
throughout the video path to maintain signal integrity. the data. For this reason, SMPTE has specified limits on the jitter content of SDI signals. spectrum starting at 10 Hz. Alignment jitter focuses on the jitter frequency spectrum that CDR circuits cannot track. limits. Figures 12 and 13 provide a summary of the jitter bandpass and jitter limits for both SD-SDI and HD-SDI. Figure 12. Jitter Measurement Bandpass
270 Mb/s
360 Mb/s
540 Mb/s
Figure 13. Output Jitter Limits for SDI Clocks filter timing jitter. This is a function that is commonly performed in the timing generator.
- Simplifying Timing and Synchronization in Video Networks
multi-format video equipment.
devices in the Si53x family support single and dual frequency options. Figure 14. Simplifying Clock Generation and Selection Using the Si534 accommodate multiple video rates and processor speeds. Figure 15. Simplifying Clock Generation of Multiple Clocks Using the Si5338
1.001 MHz
148.5 MHz
using a single VCXO. A typical application of this is shown in Figure 16. Figure 16. FPGA-Based VCXO PLL Supporting Multiple Video Standards conversion process that inherently contributes to added output jitter. Figure 17. FPGA-Based DCXO PLL Supporting Multiple Video Standards synchronizers, video servers, format converters, etc. A typical application is shown in Figure 18.
Figure 18. Simplifying Genlock Applications Using the Si5324 video signal as it propagates through the video equipment within a studio.
16 Rev. 0.1 8. References 1. “Video Demystified - A Handbook For The Digital En gineer”, 5th edition, Keith Jack, ISBN: 978-0-7506-8395-1 2. “Basic Television And Video Systems”, 5th edition, Bernard Grob, ISBN: 0-07-024933-4 3. “How Video Works - From Analog to High Definition”, 2nd edition, Marcus Weise, DIana Weynand, ISBN: 978- 0-240-80933-5 4. “A Guide to Standard and High-Definition Digital Video Measurements - Primer”, Tektronix 5. “Understanding Jitter Measurements for Serial Digit al Signals - A Tektronix Video Primer”, Tektronix 6. “Timing and Synchronization in a Multi-Standard Multi-Format Facility”, Application Note, Tektronix 7. “Glossary - Video Terms and Acronyms”, Tektronix 8. “Setting Up a Genlocked Studio”, Application Note, Tektronix 9. SMPTE RP 184-2004, “Specification of Jitter in Bit-Serial Digital Systems” 10. SMPTE 259M-2008, “SDTV Digital Signal/Data - Serial Digital Interface” 11. SMPTE 292-2008, “1.5 Gb/s Signal/Data Serial Interface” 12. SMPTE 344M-2000, “540 MB/s Serial Digital Interface” 13. SMPTE 347M-2001, “540 Mb/s Serial Digital Interface - Source Image Format Mapping” 14. SMPTE 372M-2002, “Dual Link 292M Interface for 1920x1080 Picture Raster” 15. SMPTE 424M-2006, “3 Gb/s Signal/Data Serial Interface” 16. SMPTE 425M-2008, “3 Gb/s Signal/Data Serial Interface - Source Image Format Mapping”
Rev. 0.1 17 APPENDIX A—C OMMON SDI S TANDARDS SMPTE Standard Serial Format Title and Description SMPTE 259M SD-SDI Serial Digital Interfac e at 143Mb/s, 177Mb/s, 270Mb/s, 360Mb/s 259M-C specifies 270 Mb/s for 480i and 576i 4:3 standard definition 259M-D specifies 360 Mb/s for 480i and 576i 16:9 standard definition 259M-A and 259M-B (143 Mb/s and 177 Mb/s) interfaces have since become obsolete SMPTE 344M SD-SDI 540 Mb/s Se rial Digital Interface Expands on SMPTE 259M allowing for data rates of 540 Mb/s for extended definition TV (EDTV) resolutions of 480p and 576p Defines the physical interface SMPTE 347M SD-SDI 540 Mb/s Serial Digital Interface-Source Image Format Mapping 347M defines YCbCr mapping SMPTE 292M HD-SDI 1.5 Gb/s Signal/Data Serial Interface 1.485 Gb/s and 1.485/1.001 Gb/s data rates supporting 720p60, 720p59.94, 720p50, 1080i30, 1080i29.97, 1080i25 SMPTE 372M Dual Link SDI Dual Link 292M Interface for 1920 x 1080 Picture Raster Defines a 3 Gb/s link carried over two 1.485 Gb/s or 1.485/1.001 Gb/s links supporting 1080p SMPTE 424M 3G-SDI 3 Gb/s Signal/Data Serial Interface 2.97 Gb/s and 2.97/1.001 Gb/s data rates over a single cable supporting 1080p60, 1080p59.94, 1080p50 3G-SDI has recently replaced the Dual Link SDI interface (372M). Defines the physical interface SMPTE 425M 3G-SDI 3 Gb/s Signal/Data Serial Interface - Source Image Formatting 425M defines the YCbCr mapping SMPTE RP 184 Specification of Jitt er in Bit-Serial Digital System Provides definition of jitter for SDI systems
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