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Rev. 0.1 7/08 Copyright © 2008 by Silicon Laboratories AN349 AN349 Si4708/09 P ROGRAMMING G UIDE 1. Introduction 1.1. Scope This document applies to Si4708/09 and example code ve rsion 0.1 and greater. Refer to www.mysilabs.com for example code. 1.2. Purpose This document is intended to be used with Silicon Laboratories “AN230: Si4700/01/02/03 Programming Guide." The purpose of this programming guide is to describe features that are unique to the Si4708/09:  Device initialization sequence and busmode selection  Powerup and powerdown sequences  Hardware control registers For topics that are not covered in this document, refer to AN230. This document references the Si4708/09 data sheet and AN230. 1.3. Terminology SENB or SEN—serial enable pin, active low, used only for 3-wire operation. SDIO—serial data in/data out pin. SCLK—serial clock pin. RSTB or RST —reset pin, active low. Device—refers to the Si4708/09. 1.4. Differences between Si4708/09 and Si4700/01/02/03 The Si4708/09 uses a 2.5x2.5 mm 16-p in QFN package. The Si4702/03 an d Si4700/01 use 20-pin and 24-pin packages, respectively. For the purpose of programming, the key difference is that the Si4708/09 does not have GPIO1 and GPIO3 pins, and, as a result, the Si4708/09 does not offer an internal oscillator function and only offers bus mode selection with the SENB pin. This necessitates minor differences in the initialization sequence, busmode selection, powerup and powerdown sequences, and hardware control registers for the Si4708/09. Key differences between the Si4708/09 and the Si4700/01/02/03 are presented in bold text.

2 Rev. 0.1

Rev. 0.1 3 TABLE OF C ONTENTS

Figure 3. Powerup, Powerdown, and Reset Flowchart Note: See data sheet for further details.

Table 1. Register Use

bits, indicating the powerdown mode has been entered. during powerup configuration. Table 2. Status Bit Classification

Figure 4. Powerup Timing page 10 for more information. Set Register 4 [5:4] and [1:0] to 10b prior to setting the disable bit. Table 3. Powerup Configuration Sequence Write address 02h (required).  Set the DMUTE bit to disable mute. Optionally mute can be disabled later when audio is needed.  Set the ENABLE bit high to set the powerup state.  Set the DISABLE bit low to set the powerup state. Wait for device powerup (required).  Refer to the Powerup Time specification in Table 7 "FM Characteristics" of the data sheet. Read addresses 00h–01h (optional).  The bits PN[3:0] = 1 indicate the part family: Si4708/09.  The bits MFGID[11:0] = 242h indicate Silicon Laboratories as the manufacturer.  The bits REV[5:0] = 1 indicates silicon revision B. DEV = 0010 after powerup = Si4708. DEV = 1010 after powerup = Si4709.  The FIRMWARE bits indicate the firmware revision after powerup. be stored in a 16 word array, shadow_reg[]. Write remaining hardware configuration registers (required). Write the general configuration registers (required). Write the regional configuration registers (required). These registers can be programmed in any order.

Figure 5. Powerdown Timing the RCLK pin. Refer to the Si4708/09 datasheet for more information. General purpose I/O 1 is not available on the Si4708/09. purpose output or left unused. RDS is only available on the Si4709. Table 4. Powerdown Sequence Write address 07h (optional for LOUT and ROUT Hi-Z).  Set AHIZEN. All other bits in this register should be maintained at the value last read (i.e., 0x3C04 or 0xBC04). Write address 04h (This step is required for the Si4708/09 to reduce powerdown mode current). Write address 02h (required).  Clear the DMUTE bit to enable mute.  Set the ENABLE bit high and DISABLE bit high to set the powerdown state.

General purpose I/O 3 is not available on the Si4708/09. section applies to the Si4709 in addition to the Si4701/03. Table 5. GPO States

00 High impedance (default)

01 STC/RDS interrupt

10 Low output (GND level)

11 High output (VIO level)

12 Rev. 0.1 4. Programming with Commands For information on programming with commands, refer to Section 4 of AN230 "S i4700/01/02/03 Programming Guide." Note this section applies to the Si4708/09 in addition to the Si4702/03 Rev C. 5. Command and Properties For information on command and properties, refer to Se ction 5 of AN230 "Si4700/01/02/03 Programming Guide." Note this section applies to the Si4708/09 in addition to the Si4702/03 Rev C.

Rev. 0.1 13 APPENDIX —S EEK A DJUSTABILITY AND S ETTINGS For information on seek adjustability and settings, refer to the Appendix in “AN230: Si4700/01/02/03 Programming Guide."

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