4356-RX-434 SILABS | Alldatasheet
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Technical content
Features
Applications
Description
Silicon Laboratories' Si 4356 is a pin-strap conf igurable, low current, sub-GHz EZRadio® receiver. With no external MCU control needed, the Si4356 provides a true plug-and-play receive option. Excellent sensitivity up to –113 dBm allows for a longer operating range, while the low current consumption of 12 mA active and 50 nA standby provides for superior battery life. The Si4356 provides receive data as well as a system clock output for use by an external microcontroller or decoder. Pin configurable Frequency range = 315–917 MHz Supply Voltage = 1.8–3.6 V Receive sensitivity = Up to –113 dBm Modulation (G)FSK OOK Low RX Current = 12 mA Low standby current = 50 nA Max data rate = 120 kbps Automatic gain control (AGC) System clock output Low BOM 20-pin 3x3 mm QFN package Remote control Home security and alarm Garage and gate openers Remote keyless entry Home automation Industrial control Sensor networks Health monitors Patents pending Pin Assignments 20-pin QFN (Top View) 6 7 8 9 10 20 19 18 17GND RST RXp RXn NC GND GND SEL1 RX_DATA / OUT1 STBY MSTAT / OUT0 SEL0 VDD VDD GND CLK_OUT SEL3 SEL2 XIN XOUT GND
2 Rev 1.2 Functional Block Diagram Rx Modem Synthesizer LNA PGA ADC Rx Chain Configuration Decoder 30MHz XO RXp RXn VDD SEL0 CLK_OUT RX_DATA / OUT1 XOUTXIN SEL1 SEL3 STBY SEL2 MSTAT / OUT0 RST GND
Rev 1.2 3 TABLE OF C ONTENTS Section Page
- Electrical Specifications
Table 1. Recommended Operating Conditions Table 2. DC Characteristics* listed in the "Production Test Conditions" section of "1.1. Definition of Test Conditions" on page 8. Table 3. Receiver Electrical Characteristics1
- Test conditions and max limits are listed in section “1.1. Definition of Test Conditions”.
- Sensitivity measured at 434 MHz using a PN9 modulated input signal. Received signal is filtered, deglitched, and
retimed using an external RC filter (R = 1 k, C = 47 nF) and MCU.
Table 4. Auxiliary Block Specifications1
- Test conditions and max limits are listed in section in “1.1. Definition of Test Conditions”.
- Guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test Conditions" subsection of
section “1.1. Definition of Test Conditions”.
- Targeted nominal capacitive load for both XIN and XOUT pins.
Table 3. Receiver Electrical Characteristics1 (Continued)
- Test conditions and max limits are listed in section “1.1. Definition of Test Conditions”.
- Sensitivity measured at 434 MHz using a PN9 modulated input signal. Received signal is filtered, deglitched, and
retimed using an external RC filter (R = 1 k, C = 47 nF) and MCU.
Table 5. Digital I/O Specifications (STBY, RX_DATA, MSTAT, CLK_OUT)1
- Currents listed are during normal operation after power up sequence is complete.
Table 6. Thermal Characteristics
Table 7. Absolute Maximum Ratings device reliability. Caution: ESD sensitive device.
8 Rev 1.2 1.1. Definition of Test Conditions Production Test Conditions: TA =+ 2 5° C VDD =+ 3 . 3V D C External reference signal (XIN) = 1.0 VPP at 30 MHz, centered around 0.8 VDC Production test schematic (unless noted otherwise) All RF input levels referred to the pins of the Si4356 (not the RF module) Qualification Test Conditions: TA = –40 to +85 °C (typical = 25 °C) VDD = +1.8 to +3.6 VDC (typical = 3.3 VDC) Using reference design or production test schematic All RF input levels are referred to the antenna port of Si4356 reference design or to the pins of the Si4356 when the production test setup is used.
- Typical Applications Circuit
Figure 1. Si4356 Applications Circuit Table 8. Si4356 Recommended Matching Values Note: Multi-layer inductors and ceramic chip capacitors with tolerance of ±5% are recommended.
30 MHz
RxBW) with all optional connections. See Sections 5 and 7 for Si4356 pin functionality. Figure 2. Si4356 Application Circuit Example
- R1 is required to minimize power up current. R1 is only necessary for pin configurations where SEL2 or SEL3 is
- An optional external low-pass RC filter may be connected to RX_DATA to filter the output and improve sensitivity.
tables below for how these pins should be connected for the desired configuration. SEL2 and/or SEL3 are mapped to GND. Table 9. Frequency Selection Table 10. Basic Configuration
To disable the system clock, connect CLK_OUT to OUT0. Otherwise, CLK_OUT is enabled. See Table 11 settings. Table 11. System Clock
Figure 3. Si4356 Functional Block Diagram demodulated signal is output to the system MCU through data output pin RX_DATA. used. The Si4356 then loads this configuration without the need for any external MCU control. capacitance integrated on-chip to accommodate a 30 MHz off-chip crystal.
selected configuration, as shown in the Figure 4. Figure 4. Power Up Timing then it must stay below 0.15 V for at least 10 ms before being applied again. See Figure 5 and Table 12 for details.
2.9 Vp-p
Figure 5. POR Timing Diagram indicates the current operating mode of the device as defined in Table 13 and illustrated in Figure 6. Table 12. POR Timing Table 13. Operating Mode Status
Figure 6. Standby Control and Timing maintains all register settings for a fast transition back to the receive operating mode, as shown in Table 14. transition from reset to Receive mode. Table 14. Operating State Response Time and Current Consumption
Figure 7. Device Reset Control and Timing clock signal is turned off during Standby and Device Reset modes.
18 Rev 1.2 7. Pin Descriptions Pin Pin Name I/O Description 1G N D G N D Ground 2R S T I Device reset 3R X p I Differential RF receiver input pin 4R X n I Differential RF receiver input pin 5N C No Connect 6G N D G N D Ground 7V D D V DD Supply Voltage 8V D D V DD Supply Voltage 9G N D G N D Ground
10 CLK_OUT O System reference clock output
11 SEL0 I Configuration selector pin
12 MSTAT
O O Mode status (Rx = 0, STBY = 1) Configuration output pin
13 STBY I Standby mode toggle
14 RX_DATA
O O Receiver raw data output Configuration output pin
15 SEL1 I Configuration selector pin
RX_DATA / OUT1 STBY MSTAT / OUT0 SEL0 VDD VDD GND CLK_OUT SEL3 SEL2 XIN XOUT GND
Rev 1.2 19
16 GND GND GND
17 XOUT O Crystal oscillator output
18 XIN I Crystal oscillator input
19 SEL2 I Configuration selector pin
20 SEL3 I Configuration selector pin
Pin Pin Name I/O Description
20 Rev 1.2 8. Ordering Information Part Number* Description Package Type Operating Temperature Si4356-B1A-FM Si4356 EZRadio Standalone Receiver 3x3 QFN-20 Pb-free –40 to 85 °C *Note: Add an “R” at the end of the device part number to denote tape and reel option.
Figure 8. 20-pin QFN Package
Table 15. Package Diagram Dimensions Note: All dimensions shown are in millimeters (mm) unless otherwise noted.
Figure 9. 20-pin QFN PCB Land Pattern (Top View) Table 16. PCB Land Pattern Dimensions Note: : All dimensions shown are in millimeters (mm) unless otherwise noted.
Figure 10. Si4356 Top Marking work week (WW) of the assembly date.
Rev 1.2 25 DOCUMENT CHANGE LIST Revision 1.1 to Revision 1.2 January 18, 2016 Added POR Information to Section 5.
26 Rev 1.2 CONTACT INFORMATION Silicon Laboratories Inc.
400 West Cesar Chavez
Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, ana- log-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed fea- tures or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warran- ty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intend- ed to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.