26LS32

26LS32 SYC | Alldatasheet

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Technical content

AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS115D – OCTOBER 1980 – REVISED MARCH 2002 /C0068 AM26LS32A Devices Meet or Exceed the Requirements of ANSI TIA/EIA-422-B, TIA/EIA-423-B, and ITU Recommendations V.10 and V.11 /C0068 AM26LS32A Devices Have ±7-V Common-Mode Range With ±200-mV Sensitivity /C0068 AM26LS33A Devices Have ±15-V Common-Mode Range With ±500-mV Sensitivity /C0068 Input Hysteresis. . . 50 mV Typical /C0068 Operate From a Single 5-V Supply /C0068 Low-Power Schottky Circuitry /C0068 3-State Outputs /C0068 Complementary Output-Enable Inputs /C0068 Input Impedance. . . 12 kΩ Min /C0068 Designed to Be Interchangeable With Advanced Micro Devices AM26LS32 and AM26LS33 

description

The AM26LS32A and AM26LS33A devices are quadruple differential line receivers for balanced and unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design ensures that, if the inputs are open, the outputs always are high. Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional stage has increased propagation delay; however, this does not affect interchangeability in most applications. The AM26LS32AC and AM26LS33AC are characterized for operation from 0°C to 70°C. The AM26LS32AI is characterized for operation from –40°C to 85°C. The AM26LS32AM and AM26LS33AM are characterized for operation over the full military temperature range of –55°C to 125°C. G GND V CC G AM26LS32AC . . . D, N, OR NS PACKAGE AM26LS32AI, AM26LS33AC ...D O R N PACKAGE AM26LS32AM, AM26LS33AM ...J PACKAGE (TOP VIEW) 32 1 2 0 1 9 91 0 1 1 1 2 1 3 NC G G NC AM26LS32AM, AM26LS33AM . . . FK PACKAGE (TOP VIEW)1A NC 3A 4B GND NC VCC NC – No internal connection

AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS115D – OCTOBER 1980 – REVISED MARCH 2002 FUNCTION TABLE (each receiver) DIFFERENTIAL ENABLES OUTPUT A – B G G Y VID ≥ VIT H X H VID ≥ VIT+ X LH VIT ≤ VID ≤ VIT H X ? VIT– ≤ VID ≤ VIT+ X L? VID ≤ VIT H X L VID ≤ VIT– X LL X L H Z O pen H X H Open X L H H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) logic diagram (positive logic) G G

AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS115D – OCTOBER 1980 – REVISED MARCH 2002 schematics of inputs and outputs EQUIVALENT OF EACH DIFFERENTIAL INPUT VCC Input EQUIVALENT OF EACH ENABLE INPUT Output 85 Ω NOM TYPICAL OF ALL OUTPUTS 8.3 kΩ NOM Enable20 kΩ NOM 960 Ω NOM 960 Ω NOM 100 kΩ A Input Only VCC 100 kΩ B Input Only VCC absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the network ground terminal. 2. Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals. 3. The package thermal impedance is calculated in accordance with JESD 51-7. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 125°C POWER RATING FK 1375 mW 11.0 mW/°C 880 mW 275 mW J 1375 mW 11.0 mW/°C 880 mW 275 mW

AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS115D – OCTOBER 1980 – REVISED MARCH 2002 recommended operating conditions MIN NOM MAX UNIT VCC Supply voltage AM26LS32AC, AM26LS32AI, AM26LS33AC 4.75 5 5.25 VVCC Supply voltage AM26LS32AM, AM26LS33AM 4.5 5 5.5 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VIC Common mode input voltage AM26LS32A ±7 VVIC Common -mode input voltage AM26LS33A ±15 V IOH High-level output current –440 µA IOL Low-level output current 8 mA AM26LS32AC, AM26LS33AC 0 70 TA Operating free-air temperature AM26LS32AI –40 85 °C AM26LS32AM, AM26LS33AM –55 125 electrical characteristics over recommended ranges of VCC , VIC, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT VIT Positive-going VO =V OH min IOH = 440 µA AM26LS32A 0.2 VVIT+ gg input threshhold voltageVO = VOH min, IOH = –440 µA AM26LS33A 0.5 V VIT Ne gative-going VO =04 5V IOL =8m A AM26LS32A –0.2‡ VVIT– gg g input threshhold voltageVO = 0.45 V, IOL = 8 mA AM26LS33A –0.5‡ V Vhys Hysteresis voltage (VIT+ – VIT–) 50 mV VIK Enable-input clamp voltageVCC = MIN, II = –18 mA –1.5 V VOH High level output voltage VCC =MIN, VID = 1 V, AM26LS32AC AM26LS33AC 2.7 VVOH High-level output voltage CC , ID , VI(G) = 0.8 V, IOH = –440 µA AM26LS32AM, AM26LS32AI, AM26LS33AM 2.5 V VOL Low level output voltage VCC = MIN, VID = –1 V, IOL = 4 mA 0.4 VVOL Low -level output voltage CC , ID , VI(G) = 0.8 V IOL = 8 mA 0.45 V IOZ Off-state (high impedance state) VCC = MAX VO = 2.4 V 20 µAIOZ (high-impe dance state) output current VCC = MAX VO = 0.4 V –20 µA II Line input current VI = 15 V, Other input at –10 V to 15 V 1.2 mAII Line input current VI = –15 V, Other input at –15 V to 10 V –1.7 mA II(EN) Enable input current VI = 5.5 V 100 µA IIH High-level enable currentVI = 2.7 V 20 µA IIL Low-level enable currentVI = 0.4 V –0.36 mA rI Input resistance VIC = –15 V to 15 V, One input to ac ground 12 15 kΩ IOS Short-circuit output current§ VCC = MAX –15 –85 mA ICC Supply current VCC = MAX, All outputs disabled 52 70 mA † All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0. ‡ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold levels only. § Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.

AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS115D – OCTOBER 1980 – REVISED MARCH 2002 switching characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high-level output C L =1 5pF See Figure 1 20 35 ns tPHL Propagation delay time, high-to-low-level output C L = 15 pF, See Figure 1 22 35 ns tPZH Output enable time to high level C L =1 5pF See Figure 1 17 22 ns tPZL Output enable time to low level C L = 15 pF, See Figure 1 20 25 ns tPHZ Output disable time from high level C L =5 pF See Figure 1 21 30 ns tPLZ Output disable time from low level C L = 5 pF, See Figure 1 30 40 ns PARAMETER MEASUREMENT INFORMATION S1 Open S2 Closed 5 kΩ R L = 2 kΩ VCC From Output Under Test C L (see Note A) See Note B tPHL VOH VOL 2.5 V –2.5 V tPLH S1 and S2 Closed VOLTAGE WAVEFORMS FOR t PLH , tPHLTEST CIRCUIT 10% 90% 10% 90% 3 V 10%10% 90% 90% 1.3 V 1.3 V 1.3 V 1.3 V 3 V ≤5 ns 10% 90% 10% 90% 3 V 10%10% 90% 90% 1.3 V 1.3 V 1.3 V 1.3 V 3 V Enable G Enable G tPZH

1.3 VOutput

0.5 V ≈1.4 V tPHZ S1 Closed S2 Closed tPZL 1.3 V S1 Closed S2 Open S1 Closed S2 Closed VOL 0.5 V tPLZ VOLTAGE WAVEFORMS FOR t PHZ , tPZH VOLTAGE WAVEFORMS FOR t PLZ , tPZL Test Point Output See Note CSee Note C Input Output Enable G Enable G ≤5 ns ≤5 ns ≤5 ns ≈1.4 V NOTES: A. C L includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Enable G is tested with G high; G is tested with G low. 1.3 V 1.3 V Figure 1

AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS115D – OCTOBER 1980 – REVISED MARCH 2002

APPLICATION INFORMATION

1/4 AM26LS32AC1/4 AM26LS31AC Data In Data Out Data Out Data Out 1/4 AM26LS32AC 1/4 AM26LS33AC R T† † R T equals the characteristic impedance of the line. Figure 13. Circuit With Multiple Receivers