UPC8112TB CEL | Alldatasheet
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Technical content
SYMBOLS PARAMETERS AND CONDITIONS UNITS MIN TYP MAX ICC Circuit Current (no input signal) VCC = 3.0 V mA 4.9 8.5 11.7 VPS = 0.5 V µA 0.1 fRFin RF Frequency Response GHz 0.8 1.9 2.0 fIFout IF Frequency Response1 MHz 100 250 300 CG Conversion Gain f RFin = 900 MHz, fLOin = 1000 MHz dB 11.5 15 17.5 fRFin = 1.5 GHz, fLOin = 1.6 GHz dB 13 fRFin = 1.9 GHz, fLOin = 1.66 GHz dB 9.5 13 15.5 NF Single Side Band Noise Figure (SSB) fRFin = 900 MHz, fLOin = 1000 MHz dB 9.0 11 fRFin = 1.5 GHz, fLOin = 1.6 GHz dB 11 fRFin = 1.9 GHz, fLOin = 1.66 GHz dB 11.2 13.2 P1dB Output Power at 1 dB gain compression, fRFin = 1.9 GHz fLOin = 1.66 GHz dBm -5 PSAT Saturated Output Power f RFin = 900 MHz, fLOin = 1000 MHz dBm -6.5 -2.5 fRFin = 1.9 GHz, fLOin = 1.66 GHz dBm -7 -3 (PRFin = -10 dBm) IIP3 Input 3rd Order Intercept Point, fRFIN = 900 MHz, fLOIN = 1000 MHz dBm -10 fRFin = 1.5 GHz, fLOin = 1.6 GHz dBm -9 fRFin = 1.9 GHz, fLOin = 1.66 GHz dBm -7 LORF LO Leakage at RF pin, fRFin = 900 MHz, fLOin = 1000 MHz dBm -45 fRFin = 1.5 GHz, fLOin = 1.6 GHz dBm -46 fRFin = 1.9 GHz, fLOin = 1.66 GHz dBm -45 LOIF LO Leakage at IF pin, fRFin = 900 MHz, fLOin = 1000 MHz dBm -32 fRFin = 1.5 GHz, fLOin = 1.6 GHz dBm -33 fRFin = 1.9 GHz, fLOin = 1.66 GHz dBm -30 RFLO RF Leakage at LO Pin fRFin = 900 MHz, fLOin = 1000 MHz2 dBm -80 fRFin = 1.5 GHz, fLOin = 1.6 GHz2 dBm -57 fRFin = 1.9 GHz, fLOin = 1.66 GHz2 dBm -55 RTH(JA) Thermal Resistance (Junction to Ambient) Mounted on a 50 x 50 x 1.6 mm epoxy glass PWB °C/W 325
FEATURES
3 V SILICON MMIC L-BAND
- HIGH DENSITY SURFACE MOUNTING:
6 Pin Super Minimold or SOT-363 Package
- BROADBAND OPERATION: RF = 0.8 to 2.0 GHz IF = 100 to 300 MHz
- INPUT IP 3: -7 dBm
- POWER SAVE FUNCTION
- SUPPLY VOLTAGE: VCC = 2.7 to 3.3 V INTERNAL BLOCK DIAGRAM UPC8112TB NEC's UPC8112TB is a silicon RFIC manufactured using the NESAT III process. This device consists of a mixer, an IF amplifier and a LO buffer amplifier. This device is suitable as a 1st IF downconverter for the receiver stage of cellular and other wireless systems. The UPC8112TB is pin compatible and has comparable performance as the larger UPC8112T, so
DESCRIPTION
ELECTRICAL CHARACTERISTICS (TA = 25 °C, VCC = VPS = 3.0 V, PLO = -10 dBm) Notes: 1. External matching required. 2. P RFin = -30 dBm RF Input IF Output LO Input VCC GND POWER SAVE it is suitable for use as a replacement to help reduce system size. The IC is housed in a 6 pin super minimold or SOT-363 package. NEC's stringent quality assurance and test procedures ensure the highest reliability and performance. California Eastern Laboratories
Pin No. Symbol Pin Voltage Description Internal Equivalent Circuit 5V CC Same as VCC voltage 6I F OUT through external inductor 1R F IN 1.2
2 GND 0
3L O IN 1.4 4V PS VCC or GND UPC8112TB ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C) SYMBOLS PARAMETERS UNITS RATINGS VCC Supply Voltage V 3.6 ICC Circuit Current mA 77.7 PD Power Dissipation2 mW 200 TOP Operating Temperature °C -40 to +85 TSTG Storage Temperature °C -55 to +150 SYMBOLS PARAMETERS UNITS MIN TYP MA X VCC Supply Voltage V 2.7 3.0 3.3 TOP Operating Temperature °C -40 +25 +85 PLOin LO Input Level dBm -15 -10 0 fRFin RF Input Frequency GHz 0.8 1.9 2.0 fIFout IF Output Frequency MHz 100 250 300 RECOMMENDED OPERATING CONDITIONS Notes: 1. Operation in excess of any one of these parameters may result in permanent damage. 2. Mounted on a 50 x 50 x 1.6 mm epoxy glass PWB (T A = +85°C). PIN FUNCTIONS 2.7 ~ 3.3 RF input pin to mixer. Mixer is a double balanced Gilbert cell type. Input RF signal to the pin with a 50 Ω source impedance through a coupling capacitor. Supply Voltage pin. Connect a bypass capacitor (e.g., 1000 pF) to minimize ground impedance. Ground pin. Must be connected to the system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible to minimize ground impedance. } to mixer LO input pin to a differential buffer amplifier. Input LO signal through a coupling capacitor. Recom- mended input level: -15 to 0 dBm. Power-save control pin. Voltage on this pin controls ON/OFF operation as follows: Operation V PS ON ≥2.5 V OFF 0-0.5 V IF output pin is an open collector with high impedance. External LC matching circuit is required. from LO AMP
TYPICAL APPLICATION EXAMPLE TEST CIRCUIT PCS or DIGITAL CELLULAR Note: 1. C1, C2, C3 are 1,000 pF capacitors. 2. L1 and C4 are matching elements. L1 = 100nH and C4 = 2.7 pF for f IF = 240 MHz RX SW VCO µ PC8112T N PLL.. PA PLL TX I Q Q IDEMOD 90˚ 50 Ω 50 Ω 50 Ω 3 4 LOin PS VccGND RFin IFout (TOP VIEW) 3 V POWER SAVE C3L1
OUTLINE DIMENSIONS (Units in mm) PACKAGE OUTLINE S06 1. RFIN 2. GND 3. LOIN 4. PS 5. V CC 6. IFOUT (Bottom View)(Top View) LEAD CONNECTIONS PART NUMBER QTY UPC8112TB-E3-A 3K/Reel
ORDERING INFORMATION
+0.1 DOT ON BOTTOM SIDE +0.1 -0.50 ~0.1 0.2 0.15 1 6 40.65 1.3 2.0±0.2 0.65 2.1±0.1 1.25±0.1 0.9 ± 0.1 0.7 EXCLUSIVE NORTH AMERICAN AGENT FOR RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS CALIFORNIA EASTERN LABORATORIES • Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279 24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM PRINTED IN USA ON RECYCLED PAPER -1/99DATA SUBJECT TO CHANGE WITHOUT NOTICE Note: Embossed tape, 8 mm wide. Pins 1, 2, 3 are in tape pull-out direction. RECOMMENDED P.C.B. LAYOUT (Units in mm) Note: All dimensions are typical unless otherwise specified. 3.10 1.0 MIN 1.0 MIN 0.95
0.5 MIN
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4590 Patrick Henry Drive
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