TA0103A

TA0103A TRIPATH | Alldatasheet

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Technical content

Features

¾ Class-T architecture ¾ Proprietary Digital Power Processing technology Supports wide range of output power levels ¾ “Audiophile” Sound Quality ¾ 0.04% THD+N @ 55W, 8Ω ¾ 0.03% IHF-IM @ 36W, 8Ω ¾ 140W @ 8Ω, 0.1% THD+N, VS = +54V ¾ 250W @ 4Ω, 0.1% THD+N, VS = +54V ¾ High Power ¾ 150W @ 8Ω, 1% THD+N, VS = +54V ¾ 300W @ 4Ω, 1% THD+N, VS = +54V ¾ High Efficiency ¾ 92% @ 155W @ 8Ω, VS = +45V ¾ 90% @ 275W @ 4Ω, VS = +45V ¾ Dynamic Range = 106 dB ¾ Requires only N-Channel MOSFET output transistors ¾ High power supply rejection ratio ¾ Mute input ¾ Outputs short-circuit protected ¾ Over- and under-voltage protection ¾ Bridgeable, single-ended outputs ¾ 38-pin quad package Supports 100kHz BW of Super Audio CD and DVD-Audio (refer to Application Note for specifics) TYPICAL PERFORMANCE THD+N (%) Output Power (W) THD+N versus Output Power 20Hz - 22kHz BW f = 1kHz BBM = 65nS Vs = +/-54V Av = 20.75 ST STW38NB20 MOSFET 0.02 0.01 0.05 0.1 0.2 0.5 2 5 10 20 50 100 2001 RL= 4Ω RL= 8Ω

Tripath Technology, Inc. - Technical Information 2 TA0103 – Rev 3.3/06.00 Absolute Maximum Ratings SYMBOL PARAMETER Value UNITS Vs Supply Voltage (Vspos & Vsneg) +/-85 V V5 Positive 5 V Bias Supply 6 V VN12 Reference Voltage: Nominal +12V referenced to Vsneg 18 V TSTORE Storage Temperature Range -40 to 150 ºC TA Operating Free-air Temperature Range -20 to +80 ºC Notes: Absolute Maximum Rati ngs indicate limits beyond which damage to the device may occur. Damage will occur to the device if VN12 is not supplied or falls below the recommended operating voltage when VS is within its recommended operating range. Operating Conditions SYMBOL PARAMETER MIN. TYP. MAX. UNITS Vs Supply Voltage (Vspos & Vsneg) +/- 35 +/- 60 V V5 Positive 5 V Bias Supply 4.5 5 5.5 V VN12 Reference Voltage: Nominal +12V referenced to Vsneg 10.8 12 13.2 V Note: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits.

Electrical Characteristics

TA = 25°C. See Notes 1 & 2 for Operating Conditions and Test/Application Circuit Setup. Minimum and maximum limits are guaranteed but may not be 100% tested. SYMBOL PARAMETER MIN. TYP. MAX. UNITS Iq Quiescent Current +45V (no load, BBM0=BBM1=0) -45V +5V VN12 210 250 mA mA mA mA IS Source Current @ P OUT = 275W, R L = 4Ω VSPOS = +45V @ 10% THD+N V SNEG = -45V 7.8 7.8 A A I5 Source Current for 5V Bias Supply @ P OUT = 275W, R L = 4Ω 50 60 mA IVN12 Source Current for VN12 Supply @ P OUT = 275W, R L = 4Ω 80 100 mA Vu Under Voltage (Vspos & Vsneg) +/-35 V Vo Over Voltage (Vspos & Vsneg) +/-60 V VIH High-level Input Voltage (MUTE) 3.5 V VIL Low-level Input Voltage (MUTE) 1 V IDDMUTE Mute Supply Current +45V (no load, BBM0=BBM1=0) -45V +5V VN12 0.375 3.7 0.5 mA mA mA mA VOH High-level Output Voltage (HMUTE & OVERLOADB) 3.5 V VOL Low-level Output Voltage (HMUTE & OVERLOADB) 1 V VTOC Over Current Sense Voltage Threshold 0.67 0.75 0.82 V AV Gain Ratio V OUT/VIN, RIN = 0Ω 108 V/V Voffset Offset Voltage, no load, MUTE = Logic low (before nulling) 300 500 mV

Tripath Technology, Inc. - Technical Information 3 TA0103 – Rev 3.3/06.00 Performance Characteristics – Single Ended, Vs = +54V Unless otherwise specified, f = 1kHz, Measurement Bandwidth = 22kHz. TA = 25°C. See Notes 1 & 2 for Operating Conditions and Test/Application Circuit Setup. Performance Characteristics – Single Ended, Vs = +45V Unless otherwise specified, f = 1kHz, Measurement Bandwidth = 22kHz. TA = 25°C. See Notes 1 & 2 for Operating Conditions and Test/Application Circuit Setup. Minimum and maximum limits are guaranteed but may not be 100% tested. Notes: 1) V5 = +5V, VN12 = +12V referenced to V SNEG 2) Test/Application Circuit Values: D = MUR120T3 diodes, R IN = 22.1KΩ R D = 33Ω, RS = 0.025Ω,RG = 10Ω R OCR1 = ROCR2 = 0Ω, LF = 18uH (Amidon core T200-2) C F = 0.22uF, CD = 0.1uF, CIN = 1uF, CBY = 0.1uF Power Output MOSFETs, M = ST STW38NB20 BBMO=0, BBM1=1 SYMB OL PAR AME TE R CON D ITION S MIN . TYP. MAX. U N ITS POUT Output Pow er (Continuous Average/Channel) THD+N = 0.1%, RL = 8Ω R L = 4Ω THD+N = 1%, R L = 8Ω R L = 4Ω 140 250 150 300 W W W W THD + N Total Harmonic Distortion Plus Nois e POUT = 55W/Channel, RL = 8Ω 0.04 % IHF-IM IHF Intermodulation Distortion 19kHz, 20kHz, 1:1 (IHF), R L = 4Ω POUT = 36W/Channel 0.02 % SNR Signal-to-Noise Ratio A Weighted, R L = 8Ω, POUT=140W/Ch 101 dB CS Channel Separation 0dBr = 60W, R L = 4Ω, f = 1kHz 82 dB PSRR Pow er Supply Rejection Ratio Input Referenced, 30kHz Bandw idth 67 dB η P ow er E fficiency P OUT = 200W/Channel, RL = 8Ω 92 % eNOUT Output Noise Voltage A Weighted, no signal, input shorted, DC offset nulled to zero, BBM = 145nS 295 µV SYMB OL PAR AME TE R CON D ITION S MIN . TYP. MAX. U N ITS POUT Output Pow er (Continuous Average/Channel) THD+N = 0.1%, RL = 8Ω R L = 4Ω THD+N = 1%, R L = 8Ω R L = 4Ω 150 100 200 W W W W THD + N Total Harmonic Distortion Plus Nois e POUT = 55W/Channel, RL = 8Ω 0.04 % IHF-IM IHF Intermodulation Distortion 19kHz, 20kHz, 1:1 (IHF), R L = 4Ω POUT = 36W/Channel 0.03 % SNR Signal-to-Noise Ratio A Weighted, R L = 8Ω, POUT = 85W/Ch 100 dB CS Channel Separation 0dBr = 60W, R L = 4Ω, f = 1kHz 82 dB PSRR Pow er Supply Rejection Ratio Input Referenced, 30kHz Bandw idth 67 dB η P ow er E fficiency P OUT = 155W/Channel, RL = 8Ω 92 % eNOUT Output Noise Voltage A Weighted, no signal, input shorted, DC offset nulled to zero, BBM = 145nS 250 µV

Tripath Technology, Inc. - Technical Information 4 TA0103 – Rev 3.3/06.00 Pin Description Pin Function Description

1 AGND Analog Ground

2 OVERLOADB Logic output. When low, indicate s that the level of the input signal has overloaded the amplifier.

3 V5 Positive 5 Volts

4 MUTE Logic input. When high, both amp lifiers are muted. When low (grounded), both amplifiers are fully operational. 5, 6 IN2, IN1 Single-ended input (Channel 1 & 2) 7, 8 BBM0, BBM1 Break-bef ore-make timing control 9, 12 GNDKELVIN1, GNDKELVIN2 Kelvin connection to speaker ground (Channel 1 & 2) 10, 11 OCR2, OCR1 Over-current th reshold adjustment (Channel 1 & 2) 13, 14 OCS1L+, OCS1L- Over Current Sense resistor, Channel 1 low-side 15, 16 OCS1H-, OCS1H+ Over Current Sense resistor, Channel 1 high-side 17, 30 LO1COM, LO2COM Kelvin connection to source of low-side transistor (Channel 1 & 2) 18, 29 FDBKN1;FDBKN2 Feedback (Channel 1 & 2) 19 VN12 Voltage: +12 V from V SNEG. Refer to Application Information section. 20, 27 LO1, LO2 Low side gate drive output (Channel 1 & 2) 21, 26 HO1COM, HO2COM Kelvin connection to s ource of high-side transistor (Channel 1 & 2) 22, 25 HO1, HO2 High side gate drive output (Channel 1 & 2)

23 V SPOS Positive supply voltage

24 V SNEG Negative supply voltage

28 PGND Power Ground

31, 32 OCS2L-, OCS2L+ Over Current Sense resistor, Channel 2 low-side 33, 34 OCS2H-, OCS2H+ Over Current Sense resistor, Channel 2 high-side 35 HMUTE Logic output. When high, indica tes that the output stages of both amplifiers are shut off and muted. 36, 37, 38 NC Not Connected - Must Be Left Floating

38 Pin Quad Package Pin-out

(Top View) Figure 1 9 1 0 1 1 1 2 1 31 41 5 1 6 1 71 8 1 9 AGND OVERLOADB IN2 IN1 BBM0 BBM1 MUTE 38 37 36 35 34 33 32 31 30 29 28 LO2 HO2COM HO2 V SNEG VSPOS HO1 H01COM LO1 GND KELVIN1 OCR2 OCR1 GND KELVIN2 OCS1L+ OCS1L- OCS1H- OCS1H+ LO1COM FDBKN1 VN12 NC NC NC HMUTE OCS2H+ OCS2H- OCS2L+ OCS2L- LO2COM FDBKN2 PGND

Tripath Technology, Inc. - Technical Information 5 TA0103 – Rev 3.3/06.00 Test/Application Circuit Figure 2 Processing Modulation TA0103A MUTE OVERLOADB IN1 IN2 PGndAGnd RIN RIN OCS1H- HO1 HO1COM OCS1L+ OCR1 OCR2 FDBKN1 VN12 RS VSPOS M ROCR1 ROCR2 BBM0 BBM1 RL NC 36 12 8 OCS1H+ OCS1L-14 LO1COM17

9 GNDKELVIN1

NC - Not Connected (Must Be Left Floating) CIN CIN Note - Heavy Lines Indicate High-Current Paths RG D CBY LF CF 100uF M RG D CBY RS 100uF VSNEG RD CD Processing Modulation OCS2H- HO2 HO2COM OCS2L+ RS VSPOS M RL OCS2H+ OCS2L-31 LO2COM30

12 GNDKELVIN2

M RG D CBY RS 100uF VSNEG RD CD LO1

29 FDBKN2

.1uF .1uF .1uF 0.1 uF 1MΩ 0.1 uF 1MΩ 10KΩ 0.1 uF 1MΩ 1MΩ 10KΩ

Tripath Technology, Inc. - Technical Information 6 TA0103 – Rev 3.3/06.00 Typical Performance at Vs = +54V HIGH BW (4X) A/D Intermodulation Performance RL = 4Ω Frequency (Hz) 10Hz - 80kHz BW 19kHz, 20kHz, 1:1 BBM = 65nS Pout = 36W/Channel V S = +/-54V 0dBr = 12Vrms Av = 20.75 ST STW38NB20 MOSFET FFT (dBr) -100 +10 -90 -80 -70 -60 -50 -40 -30 -20 -10 60 30k100 200 500 1k 2k 5k 10k 20k A-Weighted Noise FFT Frequency (Hz) 20Hz - 22kHz BW BBM = 65nS Pout = 0W V S = +/-54V RL = 4Ω Av = 20.75 ST STW38NB20 MOSFET Noise FFT (dBV) 20 20k50 100 200 500 1k 2k 5k 10k -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 THD+N (%) Output Power (W) THD+N versus Output Power 20Hz - 22kHz BW f = 1kHz BBM = 65nS Vs = +/-54V Av = 20.75 ST STW38NB20 MOSFET1 0.02 0.01 0.05 0.1 0.2 0.5 2 5 10 20 50 100 2001 RL= 4Ω RL= 8Ω grounded) Channel Separation versus Frequency RL = 4Ω Frequency (Hz) Channel Separation (dBr) 20Hz - 22kHz BW BBM = 65nS Pout = 60W/Channel VS = +/-54V Av = 20.75 ST STW38NB20 MOSFET -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k50 100 200 500 1k 2k 5k 10k THD+N versus Frequency RL = 4Ω THD+N (%) Frequency (Hz) 10 20k20 50 100 200 500 1k 2k 5k 10k 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 20Hz - 22kHz BW BBM = 65nS Pout = 10W/Channel Vs = +/-54V Av = 20.75 ST STW38NB20 MOSFET Efficiency versus Output Power RL = 4Ω & 8Ω 100 0 50 100 150 200 250 300 350 400 450 Output Power (W) Efficiency (%) 22Hz - 22kHz BW f = 1kHz BBM = 145nS V S = +/-54V Av = 20.75 ST STW38NB20 MOSFET RL = 4Ω RL = 8Ω

Tripath Technology, Inc. - Technical Information 7 TA0103 – Rev 3.3/06.00 Typical Performance at Vs = +45V 0.01 0.02 0.05 0.1 0.2 0.5 10 20k20 50 100 200 500 1k 2k 5k 10k THD+N versus Frequency versus Break Before Make, RL = 4Ω THD+N (%) Frequency (Hz) 145nS 65nS 20Hz - 22kHz BW Pout = 60W/Channel V S = +/-45V Av = 20.75 ST STW38NB20 MOSFET 105nS 0.01 0.02 0.05 0.1 0.2 0.5 10 20k20 50 100 200 500 1k 2k 5k 10k THD+N (%) Frequency (Hz) 20Hz - 22kHz BW Pout = 35W/Channel VS = +/-45V Av = 20.75 ST STW38NB20 MOSFET 145nS 65nS THD+N versus Frequency versus Break Before Make, RL = 8Ω 105nS 0.01 0.02 0.05 0.1 0.2 0.5 10 20k20 50 100 200 500 1k 2k 5k 10k THD+N (%) Frequency (Hz) BBM = 65nS Pout = 60W/Channel VS = +/-45V Av = 20.75 ST STW38NB20 MOSFET 22kHz BW 30kHz BW THD+N versus Frequency versus Bandwidth, RL = 4Ω 0.01 0.02 0.05 0.1 0.2 0.5 10 20k20 50 100 200 500 1k 2k 5k 10k THD+N (%) Frequency (Hz) BBM = 65nS Pout = 35W/Channel V S = +/-45V Av = 20.75 ST STW38NB20 MOSFET 22kHz BW 30kHz BW THD+N versus Frequency versus Bandwidth, RL = 8Ω Efficiency versus Output Power 100 0 25 50 75 100 125 150 175 200 225 250 275 300 Output Power (W) Efficiency (%) 22Hz - 22kHz BW f = 1kHz BBM = 145nS V S = +/-45V Av = 20.75 ST STW38NB20 MOSFET RL = 4Ω RL = 8Ω THD+N vs Output Power THD+N (%) Output Power (W) 20Hz - 22kHz BW f = 1kHz BBM = 65nS V S = +/-45V Av = 20.75 ST STW38NB20 MOSFET 4Ω8Ω 1 3002 5 10 20 50 100 200 0.01 0.02 0.05 0.1 0.2 0.5

Tripath Technology, Inc. - Technical Information 8 TA0103 – Rev 3.3/06.00 Typical Performance -100 +10 -90 -80 -70 -60 -50 -40 -30 -20 -10 60 30k100 200 500 1k 2k 5k 10k 20k 10Hz - 80kHz BW 19kHz, 20kHz, 1:1 BBM = 65nS Pout = 25W/Channel V S = +/-45V 0dBr = 14Vrms Av = 20.75 ST STW38NB20 MOSFET Intermodulation Performance RL = 8Ω Frequency (Hz) FFT (dBr) THD+N versus Output Power versus Supply Voltage 0.01 0.1 1 10 100 1000 Output Power (W) THD+N (%) 45V36V 58V 20Hz - 22kHz BW f = 1kHz BBM = 65nS Av = 20.75 ST STW38NB20 MOSFET RL = 8Ω 36V 58V45V THD+N versus Output Power versus Supply Voltage 0.01 0.1 1 10 100 1000 Output Power (W) THD+N (%) 20Hz - 22kHz BW f = 1kHz BBM = 65nS Av = 20.75 ST STW38NB20 MOSFET RL = 4Ω Channel Separation versus Frequency Frequency (Hz) Channel Separation (dBr) 20Hz - 22kHz BW BBM = 65nS Pout = 60W/Channel @ 4Ω Pout = 35W/Channel @ 8Ω VS = +/-45V Av = 20.75 ST STW38NB20 MOSFET -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k50 100 200 500 1k 2k 5k 10k A-Weighted Noise FFT Frequency (Hz) 20Hz - 22kHz BW BBM = 65nS Pout = 0W V S = +/-45V RL = 4Ω Av = 20.75 ST STW38NB20 MOSFET Noise FFT (dBV) -140 -120 -100 -80 -60 -40 -20 20 20k50 100 200 500 1k 2k 5k 10k Intermodulation Performance RL = 4Ω Frequency (Hz) 10Hz - 80kHz BW 19kHz, 20kHz, 1:1 BBM = 65nS Pout = 36W/Channel VS = +/-45V 0dBr = 12Vrms Av = 20.75 ST STW38NB20 MOSFET FFT (dBr) -100 +10 -90 -80 -70 -60 -50 -40 -30 -20 -10 60 30k100 200 500 1k 2k 5k 10k 20k

Tripath Technology, Inc. - Technical Information 9 TA0103 – Rev 3.3/06.00 Functional Description TA0103A Amplifier Operation Figure 3 is a simplified diagram of one channel (c hannel 1) of a TA0103A amplifier to assist in understanding its operation. Figure 3: Simplified TA0103A Amplifier The audio input signal (IN1) is fed to the proce ssor internal to the TA0103A, where a modulation pattern is generated. This pattern is spread spectrum and varies between approximately 200kHz and 1.5MHz. Complementary copies of the switching pattern are level-shifted by the MOSFET drivers and output from the TA0103A where they drive the gates (HO1 and LO1) of external power MOSFETs that are connected as a half bridge. T he output of the half bridge is a power-amplified version of the switching patte rn that switches between V SPOS and VSNEG. This signal is then low-pass filtered to obtain amplified audio. The processor portion of the TA0103A is operated fr om a 5-volt supply (between V5 and AGND). In the generation of the complementary modulation pa ttern for the output MOSFETs, the processor inserts a “break-before-make” dead time between when it turns one transistor off and it turns the other one on in order to minimize shoot-through curr ents in the MOSFETs. The dead time can be programmed by setting the break-before-make c ontrol bits, BBM0 and BBM1. Feedback information from the output of the half-bridge is supplied to the processor via FDBKN1. Additional feedback information to account for ground bounce is supplied via GNDKELVIN1. Processing Modulation TA0103A MUTE OVERLOADB IN1 P GndA Gnd OCS1H- HO1 HO1COM OCS1L+OCR1 FDBKN1 VN12 RS VSPOS M ROCR1 BBM0 BBM1 RL 12 8 OCS1H+ OCS1L-14 M RG RS VSNEG LO1 Low-pass Filter Over-current Detection Over-current Detection LO1COM Over/Under Voltage VBOOT V5 3 RIN CIN

Tripath Technology, Inc. - Technical Information 10 TA0103 – Rev 3.3/06.00 The MOSFET drivers in the TA0103A are operated from voltages obtained from VN12 and LO1COM for the low-side driver, and VBOOT (generated internal to the TA0103A) and HO1COM for the high- side. Only N-Channel MOSFETs are required for both the top and bottom of the half bridge. VN12 must be a stable 12V above VSNEG. The gate resistors, RG, are used to control MOSFET slew rate and thereby minimize voltage overshoots. Over- and Under-Voltage Protection The TA0103A senses the power rails through V SPOS and V SNEG for over- and under-voltage conditions. The over- and under-voltage limits are Vo and Vu respectively as specified in the shuts off the output stages of the amplifiers and asserts a logic level high on HMUTE. The removal of the over-voltage or under-vol tage condition returns the TA0103A to normal operation and returns HMUTE to a logic level low. Please note that the limits specified in the Electrical Characteristics table are at 25°C and these limits may change over temperature. Over-current Protection The TA0103A has over-current protection circuitry to protect itself and the output transistors from short-circuit conditions. The TA0103A uses the voltage across a resistor, R S (measured via OCS1H+, OCS1H-, OCS1L+ and OCS1L-), that is in series with each output MOSFET to detect an over-current condition. RS and ROCR are used to set the over-current threshold. The OCS pins must be Kelvin connected for proper operation. See “Circu it Board Layout” in Application Information for details. An over-current condition will cause t he TA0103A to shut off t he output stages of the amplifiers and supply a logic level high on HMUTE. The occurrence of an over-current condition is latched in the TA0103A and can be cleared by toggling the MUTE input or cycling power. Overload When logic low, the OVERLOADB pin indicates that the level of the input signal has overloaded the amplifier and that the audio output signal is starting to distort. The OVERLOADB signal is active only while an overload is present. The OVERLOAD B signal can be used to control a distortion indicator light or LED through a simple buffer circuit. Mute When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low-side transistors are turned off) and a logic leve l high is output on the HMUTE pin. When a logic level low is supplied to MUTE, both amplifiers ar e fully operational and a logic level low is supplied on HMUTE. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE and the un-muting of the TA0103A.

Tripath Technology, Inc. - Technical Information 11 TA0103 – Rev 3.3/06.00

Application Information

Amplifier Gain and Input Resistor Selection The value of the input resistor, R IN, is based on the required voltage gain, A V, of the amplifier according to: A V = 538 x103/(RIN + 5000) where RIN = Input resistor value in ohms. Input Capacitor Selection CIN can be calculated once a value for R IN has been determined. C IN and R IN determine the input low-frequency pole. Typically this pole is set at 10 Hz. CIN is calculated according to: C IN = 1/((2π x FP)(RIN + 5000)) where: R IN = Input resistor value in ohms. F P = Input low frequency pole (typically 10Hz). DC Offset Adjust While the DC offset voltages that appear at the speaker terminals of a TA0103A amplifier are typically small, Tripath recommends that any offsets during operation be nulled out of the amplifier with a circuit like the one shown connected to IN1 and IN2 in the Test/Application Circuit. It should be noted that the DC voltage on the output of a TA0103A amplifier with no load in mute mode is approximately 2.5V. This offset does not need to be nulled. The output impedance of the amplifier in mute mode is approximately 10 KOhms. This means that the 2.5V drops to essentially zero when a typical load is connected. Supply Voltage and Output Power The relationship between the bipolar power supply voltage needed, V S, for a given RMS output power, POUT, into a given load, RL, at a given level of THD (total harmonic distortion) is approximated by: V S = (2 x RL x POUT) 0.5/(K x RL/(RL + RON + RS + RCOIL)) where: R ON = The at-temperature RDSON of the output transistors, M. RCOIL = Resistance of the output filter inductor. RS = Sense Resistor K = THD Factor, a number fixed by the algorit hms in the TA0103A’s signal processor that provides the relationship between THD at full output power of the amplifier and V S. K corresponds to THD at full output power as follows: T H D K 0.1% 0.83 1% 0.95 10% 1.09 Typical measurement graphs of P OUT versus supply voltage for various levels of THD are also included in this data sheet to help determine the supply voltage.

Tripath Technology, Inc. - Technical Information 12 TA0103 – Rev 3.3/06.00 Bridged Operation Note that the two channels of a TA0103A amplifier can be used to provide a single, bridged amplifier of almost four times the output power of one of the single-ended amp lifier channels. To configure a bridged amplifier, the input to one TA0103A channel mu st be the inverted signal of the input to the other channel. Low-frequency Power Supply Pumping A potentially troublesome phenomenon in single-ended switching amplifiers is power supply pumping. This is caused by current from the out put filter inductor flowing into the power supply output filter capacitors in the oppos ite direction as a DC load would dr ain current from them. Under certain conditions (usually low-frequency input signal s), this current can cause the supply voltage to “pump” (increase in magnitude) and eventually cause over-voltage/under-v oltage shut down. Moreover, since over/under-voltage are not “latched” shutdowns, the effect would be an amplifier that oscillates between on and off states. If a DC offset on the order of 0.3V is allowed to develop on the output of the amplifier (see “DC Offset Adjust ”), the supplies can be boosted to the point where the amplifier’s over-voltage protection triggers. One solution to the pumping issue is to use la rge power supply capacitors to absorb the pumped supply current without significant voltage boost. The low frequency pole used at the input to the driver determines the value of the supply capacitor required. This works for AC signals only. Another solution to the supply pumping problem uses the fact that music has low frequency information that is correlated in both channels (it is in phase). This information can be used to eliminate boost by putting the two channels of a TA 0103A amplifier out of phase with each other. This works because each channel is pumping out of phase with the other, and the net effect is a cancellation of pumping currents. The phase of the audio signals needs to be corrected by connecting one of the speakers in the opposite polarity as the other channel. VN12 Supply VN12 is an additional supply voltage required by the TA0103A. VN12 must be 12 volts more positive than the nominal VSNEG. VN12 must track VSNEG, so if an unregulated supply is used for VSNEG, the design of the supply for VN12 must behave accordingly. Generating the VN12 supply requires some care. The proper way to generate the voltage for VN12 is to use a 12V-supply voltage referenced to the V SNEG supply rather than to ground (PGND). Figure 4 shows the correct way to power the TA0103A: Figure 4 One method to generate the VN12 supply voltage is to use a positive 12V IC regulator to drop PGND down to 12V (relative to VSNEG). Care must be exercised with this method because some IC regulators such as the LM340 series will not function properly with a large voltage drop across the regulator, resulting in damage to the TA0103A. VSPOS VN12 VSNEG PGND VS VS 12V AGND

Tripath Technology, Inc. - Technical Information 13 TA0103 – Rev 3.3/06.00 Generating the VN12 voltage per Figure 5 is NOT recommended. Most power supplies only sink current from the negative terminal and will not be capable of sourcing the current required by VN12. Furthermore, problems can arise since VN12 will not track movements in VSNEG. Figure 5 Setting Over-current Threshold RS and ROCR determine the value of the over-current threshold, ISC: I SC x RS = (VTOC x 9100)/(9100 + ROCR) where: R S and ROCR are in Ω I SC = 3 x IRMS = 3 x (POUT/RL) 0.5 (Over-current is typically set for 3 x RMS current) VTOC = Over-current sense threshold voltage (See Electrical Characteristics Table) = 0.75V typically when ROCR = 0Ω, RS = (0.75)/ISC Note that R S will dissipate approximately (I RMS)2 x R S of power. To set an I SC of 30A, for example, with ROCR = 0Ω, means that R S = 25mΩ and RS must dissipate 2.5W on average. If R OCR = 9.1KΩ, then to set ISC = 30A, RS will be 12.5mΩ and will only have to dissipate 1.13W on average. As high-wattage resistors are usually only ava ilable in a few low-resistance values (10m Ω, 25mΩ and 50mΩ), ROCR can be used to adjust for a particular over-current threshold using one of these values for RS. Output Transistor Selection The key parameters to consider when selecting a MOSFET to use with the TA0103A are drain- source breakdown voltage (BVdss), gate charge (Qg), and on-resistance (RDS(ON)). The BVdss rating of the MOSFET needs to be se lected to accommodate the voltage swing between VSPOS and VSNEG as well as any voltage peaks caused by vo ltage ringing due to switching transients. With a ‘good’ circuit board layout, a BVdss that is 50% higher than the V SPOS and V SNEG voltage swing is a reasonable starting point. The BVdss ra ting should be verified by measuring the actual voltages experienced by the MOSFET in the final circuit. Ideally a low Qg (total gate charge) and low R DS(ON) are desired for the best amplifier performance. Unfortunately, these are conf licting requirements since R DS(ON) is inversely proportional to Qg for a typical MOSFET. The design trade-off is one of cost versus performance. A lower R DS(ON) means lower I2RDS(ON) losses but the associated higher Qg transla tes into higher switching losses (losses = Qg x 12 x 1.2MHz). A lower R DS(ON) also means a larger silicon die and higher cost. A higher R DS(ON) means lower cost and lower switching losses but higher I2RDSON losses. VSPOS VN12 VSNEG P GND VS VS -33V A GND

Tripath Technology, Inc. - Technical Information 14 TA0103 – Rev 3.3/06.00 The following table lists BVdss, Qg and RDS(ON) for MOSFETs that Tripath has used with the TA0103A: Mfg. Part Number BVdss Qg (Max) (nanoCoulombs) RDS(ON) (Max) (Ohms) ST STW34NB20 200 80 0.075 ST STW38NB20 200 95 0.065 ST STP19NB20 200 40 0.18 IR IRF640 200 70 0.18 Gate Resistor Selection The gate resistors, RG, are used to control MOSFET switching rise/fall times and thereby minimize voltage overshoots. They also dissipate a portion of the power resulting from moving the gate charge each time the MOSFET is switched. If RG is too small, excessive heat can be generated in the driver. Large gate resistors lead to slower MOSFET switching, which requires a larger break- before-make (BBM) delay. Tripath recommends using an RG of 10Ω when the Qg of the MOSFET is less than 70nC and 5.6Ω when the Qg is greater than 70nC. Break-Before-Make (BBM) Timing Control The half-bridge power MOSFETs require a deadtim e between when one transistor is turned off and the other is turned on (break-before-make) in or der to minimize shoot through currents. BBM0 and BBM1 are logic inputs (connected to logic high or pu lled down to logic low) that control the break- before-make timing of the output transistors accordi ng to the following table. Note that if either BBM0 or BBM1 are left floating, they are pulled to a logic low level internal to the TA0103A. BBM1 BBM0 Delay 0 0 145nS 0 1 105nS 1 0 65nS 1 1 25nS The tradeoff involved in making this setting is that as the delay is reduced, distortion levels improve but shoot-through and power dissipation increase. Since the actual amount of BBM required is dependent upon other component values and circuit board layout, the value selected should be verified in the actual application circuit/board. It should also be verified under maximum temperature and power conditions since shoot-through in t he output MOSFETs can increase under these conditions, possibly requiring a higher BBM setting than at room temperature. Clamping Diodes The purpose of the diode, D, ac ross each of the output MOSFETs is to clamp the voltages the MOSFET experiences to levels within its rating to prevent damage. Tripat h recommends that fast- recovery or schottky diodes be used for this purpose (depending on the supply voltage used). The breakdown voltage rating of this diode should be simila r to that of the MOSFET. Also, the forward voltage drop of this diode should be less than that of the internal body diode of the MOSFET. MOSFET Bypass Capacitor Bypass capacitors, C BY, are necessary for each output MOSFET at the nodes shown in the Test/Application Circuit to damp voltage ringing at these nodes due to the high currents flowing through the parasitic (circuit board trace) inductance. CBY should be 0.1uF and have the appropriate voltage rating. They should be physically located as close to the MOSFET leads as possible.

Tripath Technology, Inc. - Technical Information 15 TA0103 – Rev 3.3/06.00 Turn-on & Turn-off Noise If turn-on or turn-off noise is present in a TA0103A amplifier, the cause is frequently due to other circuitry external to the TA0103A. While the TA 0103A has circuitry to suppress turn-on and turn-off transients, the combination of the power suppl y and other audio circuitry with the TA0103A in a particular application may exhibit audible transients. One solution that will completely eliminate turn- on and turn-off pops and clicks is to use a relay to connect/disconnect the amplifier from the speakers with the appropriate timing at power on/o ff. The relay can also be used to protect the speakers from a component failure (e.g. shorted out put MOSFET), which is a protection mechanism that some amplifiers have. Circuitry exter nal to the TA0103A would need to be implemented to detect these failures. Output Filter Design One advantage of Tripath amplifiers over PWM solu tions is the ability to use higher-cutoff-frequency filters. This means any load-dependent peaking/ droop in the 20kHz audio band potentially caused by the filter can be made negligible. This is especially important for applications where the user may select a 4-Ohm or 8-Ohm speaker. Furthermore , speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. Tripath recommends designing the filter as a 2nd order, 80kHz LC filter. Tripath has obtained good results with LF = 18uH and CF = 0.22uF for a nominal impedance of 8. The core material of the output filter inductor has an effect on the distortion levels produced by a TA0103A amplifier. Tripath recommends low-mu type-2 iron powder cores because of their low loss and high linearity. Tripath also recommends that an RC damper be used after the LC low-pass filter. No-load operation of a TA0103A amplifier can create significant peak ing in the LC filter, which produces strong resonant currents that can ov erheat the output MOSFETs and/or other components. The RC dampens the peaking and prevents problems. Tripath has obtained good results with RD = 33Ω and CD = 0.1uF. It is highly recommended that the design process fo r a TA0103A amplifier include an analysis of the interaction of intended speaker(s) with the LC filter and RC damper to ensure the desired frequency response is attained. Component values for t he LC filter and RC damper may need to be altered from the Tripath suggestions to achieve the required response. Grounding Tripath recommends not connecting analog ground (AG ND) to power ground (PGND) externally, as this connection is already made internal to the TA0103A. Circuit Board Layout Considerable care needs to be taken in the layout of the circuit board for a TA0103A amplifier. The high currents flowing through PCB traces and the i nductive effects due to the switching frequencies involved can cause large overshoot and undershoot voltages if care is not taken. A general rule to follow is to keep the PCB trace of each signal path to/from each lead of each output MOSFET as short as physically possible. Certain circuit functions in a TA0103A amplifier c annot share PCB return paths with other functions because of the resistive and inductive effects of the switching currents and frequencies used. These so-called ‘Kelvin’ paths must each have a dedi cated PCB trace from the TA0103A to their destination. The following signals should be treat ed as Kelvin paths: OC S1H+, OCS1H-, OCS1L+, OCS1L-, OCS2H+, OCS2H-, OCS2L+, OCS2L-, FDBKN1, FDBKN2, GNDKELVIN1 and GNDKELVIN2.

Tripath Technology, Inc. - Technical Information 16 TA0103 – Rev 3.3/06.00 Performance Measurements of a TA0103A Amplifier Tripath amplifiers operate by m odulating the input signal with a high-frequency switching pattern. This signal is sent through a low-pass filter (external to the Tripath amplifier) that demodulates it to recover an amplified version of the audio input. The frequency of the switching pattern is spread spectrum and typically varies between 200kHz and 1.5MHz, which is well above the 20Hz – 22kHz audio band. The pattern itself does not alter or distort the audio input signal but it does introduce some inaudible noise components. The measurements of certain performance parameter s, particularly those that have anything to do with noise, like THD+N, are significantly affected by the design of the lo w-pass filter used on the output of the TA0103A and also the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just past the audio band or the bandwidth of the measurement instrument ends there, some of the inaudible noi se components introduced by the Tripath amplifier switching pattern will get integrated into the measurement, degrading it. One advantage of Tripath amplifiers is that they do not require lar ge multi-pole filters to achieve excellent performance in listening tests, usua lly a more critical factor than performance measurements. Though using a multi-pole filt er may remove high-frequency noise and improve THD+N type measurements (when they are made with wide-bandwidth measuring equipment), these same filters can increase distortion due to inductor non- linearity. Multi-pole filters require relatively large inductors, and inductor non-linearity increases with inductor value. Efficiency Of A TA0103A Amplifier The efficiency, η, of an amplifier is: η = POUT/PIN The power dissipation of a TA0103A amplifier is primarily determined by the on resistance, R ON, of the output transistors used, and the swit ching losses of these transistors, P SW. For a TA0103A amplifier, PIN (per channel) is approximated by: PIN = PDRIVER + PSW + POUT ((RS + RON + RCOIL + RL)/RL)2 where: PDRIVER = Power dissipated in the TA0103A = 1.6W/channel PSW = 2 x (0.015) x Qg (Qg is the gate charge of M, in nano-coulombs) RCOIL = Resistance of the output filter inductor (typically around 50mΩ) For an 155W RMS per channel, 8 Ω load amplifier using STW38NB20 MOSFETs, and an R S of 50mΩ, P IN = PDRIVER + PSW + POUT ((RS + RON + RCOIL + RL)/RL)2 = 1.6 + 2.85 + 162 = 166.7W In the above calculation the RDS (ON) of 0.065Ω was multiplied by a factor of 1.7 to obtain RON in order to account for some temperature rise of the MOSFETs. (R DS (ON) typically increases by a factor of 1.7 as for a typical MOSFET as temperature increases from 25ºC to 170ºC.) So, η = POUT/PIN = 155/166.7 = 93% This compares to the 90% measured efficiency (see Typical Performance graphs).

Tripath Technology, Inc. - Technical Information 17 TA0103 – Rev 3.3/06.00 Technical Documentation Please refer to the Tripath “Application Notes” section on our web page (http://www.tripath.com/html/tech.htm#appnotes) for more information regarding evaluation, test and design of Class-T amplifiers.

Package Information

38 Pin Quad Module

Phyco Socket: 4150-1 x 8SF1 8 position header female 4150-1 x 1SF1 11 position header female Figure 6 565mil. (14.34mm) MAX 610mil (15.5mm) 336mil. (8.54mm) 236mil. (6mm) 30mil. (0.85mm) 100mil. (2.54mm) 2858mil. (72.6mm) MAX 2913mil. (74mm) 2500mil. (63.5mm)750mil. (19mm) 180mil. (4.6mm) 180mil. (4.6mm) 485mil. (12.3mm) 1670mil. (42.4mm) 2030mil. (51.6mm) MAX 2087mil. (53mm) 38 37 36 35 34 33 32 31 30 29 28 91 01 1 1 21 3 1 4 1 5 1 6 1 7 1 81 9 100mil. (2.54mm)

Tripath Technology, Inc. - Technical Information 18 TA0103 – Rev 3.3/06.00 This data sheet contains the desi gn specifications for a product in development. Specifications may change in any manner without notice. Tripath and Digital Power Processing are trademarks of Tripath Technology Inc. Other trademarks referenced in this document are owned by their respective companies. Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripat h does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. TRIPATH’S PRODUCTS ARE NOT AUTHORIZED FO R USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in th is labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. CONTACT INFORMATION World Wide Sales Offices United States & Europe SE Asia & China Japan & Korea Jim Hauer Eugene Hsu Osamu Ito jhauer@tripath.com ehsu@tripath.com ito@tripath.com 408.567.3089 886.2.2653.7428 81.42.334.2433 TRIPATH TECHNOLOGY, INC

3900 Freedom Circle

408.567.3000 www.tripath.com

Summary

Stereo 250W (4?? Class-T Digital Audio Amplifier Driver using Digital Power Processing (DPPTM) Technology

Description