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Technical content
Datasheet sections
- 1.1 Recommended Combinations
- 3.1 Special Handling Instructions for BGA Package
- 3.2 LSH064—64 ball Fortified Ball Grid Array,
2 Gbit (256 MBytes), 3.0 V Flash Memory Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-98296 Rev. *J Revised August 09, 2017 General Description The Cypress S70GL02GS 2-Gigabit MirrorBit® Flash memory device is fabricated on 65 nm MirrorBit Eclipse process technology. This device offers a fast page access time of 25 ns with a corresponding random access time of 110 ns. It features a Write Buffer that allows a maximum of 256 words/512 bytes to be programmed in one operation, resulting in faster effective programming time than standard single byte/word programming algorithms. This makes the device an ideal product for today’s embedded applications that require higher density, better performance and lower power consumption. This document contains information for the S70GL02GS device, which is a dual die stack of two S29GL01GS die. For detailed specifications, please refer to the discrete die datasheet. Distinctive Characteristics CMOS 3.0 Volt Core with Versatile I/O™ Two 1024 Megabit (S29GL01GS) in a single 64-ball Fortified-BGA package (see S29GL01GS datasheet for full specifications) 65 nm MirrorBit Eclipse™ process technology Single supply (VCC) for read / program / erase (2.7V to 3.6V) Versatile I/O Feature – Wide I/O voltage (VIO): 1.65V to VCC x16 data bus 16-word/32-byte page read buffer 512-byte Programming Buffer – Programming in Page multiples, up to a maximum of 512 bytes Sector Erase – Uniform 128-Kbytes sectors – S70GL02GS: two thousand forty-eight sectors Suspend and Resume commands for Program and Erase operations Status Register, Data Polling, and Ready/Busy pin methods to determine device status Advanced Sector Protection (ASP) – Volatile and non-volatile protection methods for each sector Separate 1024-bye One Time Program (OTP) array with two lockable regions – Available in each device Support for CFI (Common Flash Interface) WP# input – Protects first or last sector, or first and last sectors of each device, regardless of sector protection settings Industrial temperature range ( –40°C to +85°C) Automotive AEC-Q100 Grade 3 (–40°C to +85°C) Automotive AEC-Q100 Grade 2 (–40°C to +105°C) 100,000 erase cycles per sector typical 20-year data retention typical Packaging Options – 64-ball LSH Fortified BGA, 13 mm 11 mm Document Cypress Document Number S29GL01GS Datasheet 001-98285
Document Number: 001-98296 Rev. *J Page 2 of 19 S70GL02GS Performance Characteristics Notes 1. Access times are dependent on V IO operating ranges. See Ordering Information on page 4 for further details. 2. Contact a sales representative for availability. Max. Read Access Times (ns) (Note 1) Parameter 2 Gb Random Access Time (tACC) 110 120 Page Access Time (tPACC)2 0 3 0 CE# Access Time (tCE) 110 120 OE# Access Time (tOE)2 5 3 5 Typical Program and Erase Rates Buffer Programming (512 bytes) 1.5 MB/s Sector Erase (128 kbytes) 477 kB/s Maximum Current Consumption Active Read at 5 MHz, 30 pF 60 mA Program 100 mA Erase 100 mA Standby 200 µA
Document Number: 001-98296 Rev. *J Page 4 of 19 S70GL02GS 1. Ordering Information
1.1 Recommended Combinations
Recommended Combinations table below list various configurations planned to be available in volume. The table below will be updated as new combinations are released. Check with your local sales representative to confirm availability of specific configuration not listed or to check on newly released combinations. Notes 1. BGA package marking omits leading “S70” and packing type designator from ordering part number. 2. Packing Type “0” is standard option. The table below lists configurations that are Automotive Grade / AEC-Q100 qualified and are planned to be available in volume. The table will be updated as new combinations are released. Consult your local sales representative to confirm availability of specific combinations and to check on newly released combinations. Production Part Approval Process (PPAP) support is only provided for AEC-Q100 grade products. Products to be used in end-use applications that require ISO/TS-16949 compliance must be AEC-Q100 grade products in combination with PPAP. Non–AEC-Q100 grade products are not manufactured or documented in full compliance with ISO/TS-16949 requirements. AEC-Q100 grade products are also offered without PPAP support for end-use applications that do not require ISO/TS-16949 compliance. S29GL-S Valid Combinations Base OPN Speed (ns) Package and Temperature Model Number Packing Type Ordering Part Number (yy = Model Number, x = Packing Type) S70GL02GS 110 FHI, FHV (Note 1) 01, 02 0, 3 (Note 2) S70GL02GS11FHI01x S70GL02GS11FHI02x S70GL02GS11FHV01x S70GL02GS11FHV02x
120 V1, V2
Valid Combinations — Automotive Grade / AEC-Q100 Base OPN Speed (ns) Package and Temperature Model Number Packing Type Ordering Part Number (yy = Model Number, x = Packing Type) S70GL02GS 110 FHA, FHB (Note 1) 01, 02 0, 3 (Note 2) S70GL02GS11FHA01x S70GL02GS11FHA02x S70GL02GS11FHB01x S70GL02GS11FHB02x
Document Number: 001-98296 Rev. *J Page 5 of 19 S70GL02GS The ordering part number is formed by a valid combination of the following: S70GL02GS 12 F H I 01 0 PACKING TYPE 0 = Tray (standard) 3 = 13” Tape and Reel MODEL NUMBER (VIO range, protection when WP# =VIL) 01 = VIO = VCC = 2.7V to 3.6V, highest address sector protected 02 = VIO = VCC = 2.7V to 3.6V, lowest address sector protected V1 = VIO = 1.65V to VCC, VCC = 2.7V to 3.6V, highest address sector protected V2 = VIO = 1.65V to VCC, VCC = 2.7V to 3.6V, lowest address sector protected TEMPERATURE RANGE I = Industrial (–40°C to +85°C) A = Automotive, AEC-Q100 Grade 3 (–40°C to +85°C) B = Automotive, AEC-Q100 Grade 2 (–40°C to +105°C) V = Automotive - In Cabin (–40°C to +105°C) PACKAGE MATERIALS SET H = Low Halogen, Pb-free PACKAGE TYPE F = Fortified Ball Grid Array, 1.0 mm pitch package (LSH064), 11 mm x 13 mm SPEED OPTION 11 = 110 ns 12 = 120 ns DEVICE NUMBER/DESCRIPTION S70GL02GS
3.0 Volt-Only, 2048 Megabit (128M x 16-Bit) Page-Mode Flash Memory
Manufactured on 65 nm MirrorBit Eclipse process technology
- Input/Output Descrip tions and Logic Symbol
Table 1 identifies the input and output package connections provided on the device. Table 1. Input/Output Descriptions A26–A0 Input Address lines for GL02GS. DQ15–DQ0 I/O Data input/output. VCC Supply Device Power Supply. VIO Supply Versatile IO Input. device is actively erasing or programming. At High Z, the device is in ready. RESET# Input Hardware Reset. Low = device resets and returns to reading array data. sectors. At VHH, accelerates programming; automatically places device in unlock bypass mode. Should be at VIH for all other conditions. space for a signal on a Printed Circuit Board (PCB). connect any host system signal to these connections. enhanced features in compatible footprint devices.
Figure 1. Block Diagram for 2 x GL01GS (Highest and Lowest Address Sectors Protected) Figure 2. Block Diagram for 2 x GL01GS (Lowest Address Sector Protected)
1 Gb Flash
Figure 3. Block Diagram for 2 x GL01GS (Highest Address Sector Protected)
3.1 Special Handling Inst ructions for BGA Package
Special handling is required for Flash Memory products in BGA packages. integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. Figure 4. 64-ball Fortified Ball Grid Array
- Ball E1, Do Not Use (DNU), a device internal signal is connec ted to the package connector. The connector may be used by Cypress for test or other purposes and is
connected to VCC or VSS through a series resistor.
- Balls F7 and G1, Reserved for Future Use (RFU).
- Balls A1, A8, C1, D1, H1, and H8, No Connect (NC).
3.2 LSH064—64 ball Fortified Ba ll Grid Array, 13 x 11 mm
Figure 5. LSH064—64-ball Fortified Ball Grid Array (FBGA), 13 x 11 mm
- DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994.
- ALL DIMENSIONS ARE IN MILLIMETERS.
- BALL POSITION DESIGNATION PER JEP 95, SECTION 4.3, SPP-010.
- e REPRESENTS THE SOLDER BALL GRID PITCH.
- SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE
6 DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL
DIAMETER IN A PLANE PARALLEL TO DATUM C.
7 SD AND SE ARE MEASURED WITH RESPECT TO DATUMS
SOLDER BALL IN THE OUTER ROW. THE OUTER ROW SD OR SE = 0.000.
- “+” INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS.
9 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK
MARK, METALLIZED MARK INDENTATION OR OTHER MEANS.
The S70GL02GS consist of uniform 64 kword (128-kbyte) sectors organized as shown in Table 2. die - only that there is a continuous address space that spans both flash chips. S29GL-S data sheet (publication number S29GL_128S_01GS_00). Table 2. S70GL02GS Sector and Memory Address Map Table 3. Second Die Access Example Table 4. Autoselect Addresses in System
- I CC active while Embedded Algorithm is in progress.
- Automatic sleep mode enables the lower power mode when addresses remain stable for a designated time.
IO = 1.65V to VCC or 2.7V to VCC depending on the model.
- During power-up there are spikes of current demand, the syste m needs to be able to supply this current to insure the part initializes correctly.
- If an embedded operation is in progress at the start of reset, the current consumption will remain at the embedded operation specification until the embedded operation
the remainder of tRPH. After the end of tRPH the device will go to standby mode until the next read or write.
- The recommended pull-up resistor for RY/BY# output is 5k to 10k Ohms.
- For all other DC current values, refer to the S29GL-128S_01GS_00 datasheet.
Table 5. DC Characteristics Table 4. Autoselect Addresses in System (Continued)
- Sampled, not 100% tested.
- Test conditions TA = 25°C, f = 1.0 MHz.
- Device ID and Common Flash Interface (ID-CFI) ASO Map
feature set information for the device. supported. Page mode read between ID locations other than 02h is supported. Table 6. ID (Autoselect) Address Map then enter ID-CFI ASO again with the new SA.
Table 7. CFI Query Identification String Table 6. ID (Autoselect) Address Map (Continued)
Table 8. CFI System Interface String Table 9. CFI Device Geometry Definition
Table 10. CFI Primary Vendor-Specific Extended Query Table 9. CFI Device Geometry Definition (Continued)
Table 10. CFI Primary Vendor-Specific Extended Query (Continued)
Document Number: 001-98296 Rev. *J Page 18 of 19 S70GL02GS 10. Document History Document Title: S70GL02GS, 2 Gbit (256 MBytes), 3.0 V Flash Memory Document Number: 001-98296 Rev. ECN No. Orig. of Change Submission Date Description of Change ** BWHA 05/19/2011 Spansion Publication Number: S70GL-S_00 Initial release *A BWHA 07/08/2011 Performance Characteristics: Updated Typical Program and Erase Rates Ordering Information: Updated model number description of V1 and V2 DC Characteristics: Modified Note 3 *B BWHA 09/23/2011 Distinctive Characteristics: Cosmetic changes Ordering Information: Updated CFI Device Geometry Definition: Data at (SA) + 002Eh modified *C BWHA 12/15/2011 Global: Data sheet designation changed from Preliminary to Full Production Performance Characteristics: Updated Sector Erase time Figure: 64-ball Fortified Ball Grid Array: Added notes BWHA 06/27/2014 Global: Added –40°C to +105°C temperature range *E 4871480 BWHA 08/13/2015 Updated to Cypress template *F 5157725 TOCU 03/04/2016 General Description: Updated Cypress Document Number as “001-98285” in the table. Distinctive Characteristics: Updated link to S29GL01GS datasheet. Updated to new template. *G 5343030 TOCU 07/08/2016 Updated Document Title to read as “S70GL02GS 2 Gbit (256 MBytes), 3.0 V Flash Memory”. Updated to new template. *H 5755394 NIBK 05/31/2017 Updated Cypress Logo and Copyright. *I 5774339 NFB 06/15/2017 Updated Ordering Information. *J 5848474 PRIT 08/09/2017 Added Section Second Die Access Updated Device Number/Description
Document Number: 001-98296 Rev. *J Revised August 09, 2017 Page 19 of 19 © Cypress Semiconductor Corporation, 2011-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document, including any software or firmware included or referenced in this document ("Software"), is ow ned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited. TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MER- CHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent permitted by applicable law, Cypress reserves the right to mak e changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for re ference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to per form can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. S70GL02GS Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products ARM® Cortex® Microcontrollers cypress.com/arm Automotive cypress.com/automotive Clocks & Buffers cypress.com/clocks Interface cypress.com/interface Internet of Things cypress.com/iot Memory cypress.com/memory Microcontrollers cypress.com/mcu PSoC cypress.com/psoc Power Management ICs cypress.com/pmic Touch Sensing cypress.com/touch USB Controllers cypress.com/usb Wireless Connectivity cypress.com/wireless PSoC® Solutions PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6 Cypress Developer Community Forums | WICED IOT Forums | Projects | Video | Blogs | Training | Components Technical Support cypress.com/support