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Fact Sheet (Full Production) Publication Number S6E1A_NP710-00001 Revision 1.0 Issue Date July 16, 2014 Copyright © 2013 Spansion. All rights reserved. Spansion®, the Spansion logo, MirrorBit®, MirrorBit® EclipseTM, ORNANDTM and combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used are for infor mational purposes only and may be trademarks of their respective owners. S6E1A1 Series are highly integrated 32-bit microcontrollers designed for embedded controllers aiming at low power consumption and low cost. S6E1A1 Series are based on the ARM Cortex-M0+ Processor with Flash memory and SRAM, and has peripheral functions such as Motor Control Timer, ADC and Communication Interfaces. 1. FEATURES  ARM Cortex-M0+ CPU Core − Processor version：r0p1  Clock − Maximum clock frequency：40MHz  Bit Band operation − Compatible with Cortex-M3 bit band operation  Base Timer：Max. 4 channels  Watch counter  Multi-function Timer：1 unit − 16-bit free-run timer ×3 channels − Input capture ×4 channels − Output compare ×6 channels − A/D activation compare ×6channels − Waveform generator ×3 channels − 16-bit PPG timer ×3 channels  QPRC：1 channel  Dual Timer：1 unit  Watch dog Timer：1 channel (SW) + 1 channel (HW)  Multi-function Serial Interface：Max. 3 channels − Selectable from UART/CSIO/LIN/I2C − FIFO in all channels  Real Time Clock：1 unit  DMA Controller：2 channels  External Interrupt Controller Unit − External interrupt input pin：Max. 8 pins − Include one non-maskable interrupt (NMI)  12-bit A/D Converter：Max. 8 channels (1 unit)  Low Power Consumption Mode − Sleep mode/Timer mode/RTC mode/Stop mode  Peripheral Clock Gating  General Purpose I/O port − S6E1A11B0A/S6E1A12B0A：Max. 23 pins − S6E1A11C0A/S6E1A12C0A：Max. 37 pins − All ports are Fast GPIO can be accessed by 1cycle  Built-in CR  Unique ID  Debug − Serial Wire Debug Port (SW-DP) − Micro Trace Buffer(MTB)  Low Voltage Detector  Clock Supervisor  Power Supply：2.7 to 5.5V 2. PRODUCT LINEUP Part number Parameter S6E1A11B0A S6E1A11C0A S6E1A12B0A S6E1A12C0A Flash Memory (Byte) 56K 88K RAM (Byte) 6K 6K 3. ORDERING INFORMATION Part number Package S6E1A11B0AGP2 Plastic・LQFP(0.8mm pitch), 32-pins (FPT-32P-M30) S6E1A12B0AGP2 S6E1A11B0AGN2 Plastic・QFN(0.5mm pitch), 32-pins (LCC-32P-M73) S6E1A12B0AGN2 S6E1A11C0AGV2 Plastic・LQFP(0.5mm pitch), 48-pins (FPT-48P-M49) S6E1A12C0AGV2 S6E1A11C0AGN2 Plastic・QFN(0.5mm pitch), 48-pins (LCC-48P-M74) S6E1A12C0AGN2 S6E1A11C0AGF2 Plastic・LQFP(0.65mm pitch), 52-pins (FPT-52P-M02) S6E1A12C0AGF2 4. PACKAGE EXAMPLE OF REFERENCE Plastic ・ LQFP、48-pins (FPT-48P-M49)

2 S6E1A1_NP710-00001-1v0-E, July 16, 2014

  1. BLOCK DIAGRAM Cortex-M0+ Core @40MHz(Max) Flash I/F Clock Reset Generator Dual-Timer WatchDog Timer (Hardware) DMAC 2ch. CSV External Interrupt Controller 8pin + NMI Power-On Reset On-Chip SRAM

6 Kbyte

AHB-APB Bridge : APB1 (Max 40MHz) AHB-APB Bridge: APB0(Max 40MHz) CLK NVIC WatchDog Timer (Software) Security 12-bit A/D Converter SWCLK, SWDIO AVCC, AVSS ANxx TIOAx TIOBx C X0A X1A SCKx SINx SOTx INTx NMIX P0x, P1x, Pxx INITX MODE-Ctrl IRQ-Monitor MD0 Regulator AHB-AHB Bridge On-Chip Flash

56 Kbyte/

88 Kbyte

3ch. (with FIFO) GPIO PIN-Function-Ctrl LVD Multi-layer AHB (Max 40MHz) SW-DP Main Osc PLL Sub Osc CR 4MHz CR 100kHz LVD Ctrl Base Timer 16-bit 4ch./ 32-bit 2ch. Real-Time Clock RTCCO, SUBOUT Unit 0 QPRC 1ch. AINx BINx ZINx Multi-function Timer 16-bit Free-run Timer 3ch. 16-bit Output Compare 6ch. 16-bit Input Capture 4ch. Waveform Generator 3ch. A/D Activation Compare 6ch. 16-bit PPG 3ch. IC0x DTTI0X RTO0x FRCKx CROUT Source Clock IGTRGx ADTG SCSx Watch Counter MODE-Ctrl Peripheral Clock Gating Low-speed CR Prescaler MTB System ROM table Bit Band Wrapper Fast GPIO To PIN-Function-Ctrl To Fast GPIO S6E1A11/S6E1A12 AVRH (only 48/52pin PKG) ARM and Cortex are the registered trademarks of ARM Limited in the EU and other countries.