RTL8127

RT8127 RICHTEK | Alldatasheet

Document overview

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Technical content

Features

z Green Voltage Mode (GVMTM) Control z High Light Load Efficiency z Audio-Skip Mode (ASM) at Light Load z Pin Configurable CCM/DEM Operation z 180°°°°° Interleaving PWM in CCM Operation z Support 4.5V to 26V Input Voltage Range z Integrated 5V MOSFET Driver and Bootstrap Circuit z Integrated 5V and 12V LDO z Enable Control for Each Channel z External/Internal Soft-Start z Programmable LGATE PWM Frequency Setting (LGFS) z Automatic Switchable 5V Regulator z Power Good Indication z VIN Feed-Forward in Control Loop z Lossless DCR Current Sensing z OVP, UVP, OCP, Thermal Shutdown and UVLO z Small 28-Lead WQFN Package z RoHS Compliant and Halogen Free

Applications

z Motherboard, Server, Graphic Card z System Power Supplies z Power Module Simplified Application Circuit RT8127VIN UGATE1 PHASE1 LGATE1 CSP1 CSN1 UGATE2 PHASE2 LGATE2 CSP2 CSN2 GND EN1/SS1 EN2/SS2 12VLDO VIN 1.4µH 1.4µH VIN VOUT1 942µF942µF VOUT2 12V/3.3V Marking Information 0H= : Product Code YMDNN : Date Code0H=YM DNN

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Pin Description Pin No. Pin Name Pin Function 1 UGATE2 Channel 2 High Side MOSFET Floating Gate Driver Output. Connect this pin to the channel 2 high side MOSFET gate. 2 BOOT2 Channel 2 Bootstrap Flying Capacitor Connection Pin. This pin powers channel 2 high side MOSFET driver. Connect this pin to PHASE2 with a ceramic capacitor. 3 PHASE2 Channel 2 Switching Node Connection Pin. Connect this pin to the joint of high side MOSFET source and low side MOSFET drain, and the inductor of channel 2. 4 LGATE2 Channel 2 Low Side MOSFET Gate Driver Output. Connect this pin to the gate of channel 2 low side MOSFET. 5 PGND2 Power Ground of Channel 2. This pin is the return ground of channel 2 low side MOSFET gate driver. Connect this pin to the PCB ground plane layer with vias. 6 CSP2 Positive Current Sense Input for Channel 2. 7 CSN2 Negative Current Sense Input for Channel 2. 8 FB2 Channel 2 Regulator Output Voltage Feedback Pin. This pin is the inverting input node of the error amplifier. 9 COMP2 Channel 2 Regulator Compensation Pin. This pin is the output of the error amplifier.

10 EN2/SS2

Channel 2 Enable Pin. Pull this pin to ground to disable channel 2. This pin is internally pulled high. Leave this pin unconnected to enable channel 2 with default soft-start time. This pin can also be used for external soft-start interval setting. Connect a ceramic capacitor to this pin to extend soft-start time. The input voltage at EN2/SS2 pin must be higher than 2.97V to make sure soft-start can be finished and PGOOD assertion. 11 PGOOD Power Good Indicator Output. This pin has an open drain structure. Pull this pin high to a voltage source with a resistor.

12 EN1/SS1

Channel 1 Enable Pin. Pull this pin to ground to disable channel 1. This pin is internally pulled high. Leave this pin unconnected to enable channel 1 with default soft-start time. This pin can also be used for external soft-start interval setting. Connect a ceramic capacitor to this pin to extend soft-start time. The input voltage at EN1/SS1 pin must be higher than 2.97V to make sure soft-start can be finished and PGOOD assertion.

Ordering Information

Note : Richtek products are : \ RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. \ Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations (TOP VIEW) WQFN-28L 4x4 CSP1 PGND1 LGATE1/RT UGATE1 PHASE1 BOOT1 CSP2 PGND2 LGATE2 UGATE2 PHASE2 BOOT2 SKIP VIN 12VLDO LDOBYP LDOEN VCC EN1/SS1 FB1 COMP1 FB2 EN2/SS2 COMP2 CSN2 CSN1 PGOOD 12VLDOEN 89 1 0 2328 27 26 25 24 GND 11 12 13 14 RT8127 Package Type QW : WQFN-28L 4x4 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free)

DS8127-05 June 2014 www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Pin No. Pin Name Pin Function 13 COMP1 Channel 1 Regulator Compensation Pin. This pin is the output of the error amplifier. 14 FB1 Channel 1 Regulator Output Voltage Feedback Pin. This pin is the inverting input node of the error amplifier. 15 CSN1 Negative Current Sense Input for Channel 1. 16 CSP1 Positive Current Sense Input for Channel 1.

17 PGND1

Power Ground of Channel 1. This pin is the return ground of channel 1 low side MOSFET gate driver. Connect this pin to the PCB ground plane layer with vias.

18 LGATE1/RT

Channel 1 Low Side MOSFET Gate Driver Output. Connect this pin to the gate of channel 1 low side MOSFET. This pin is also used to set the PWM switching frequency in CCM. Connect a resistor from this pin to GND to set the PWM switching frequency.

19 PHASE1

Channel 1 Switching Node Connection Pin. Connect this pin to the joint of high side MOSFET source and low side MOSFET drain, and the inductor of channel 1.

20 BOOT1

Channel 1 Bootstrap Flying Capacitor Connection Pin. This pin powers channel 1 high side MOSFET driver. Connect this pin to PHASE1 with a ceramic capacitor. 21 UGATE1 Channel 1 High Side MOSFET Floating Gate Driver Output. Connect this pin to the gate of channel 1 high side MOSFET.

22 VIN

IC Power Supply Input. Connect this pin to a voltage source with a bypass ceramic capacitor connected to GND for noise decoupling. This pin is the power source of the two integrated LDOs. 23 12VLDO 12V LDO Output. It is recommended to connect a minimum 1 μF ceramic capacitor from this pin to GND. 24 12VLDOEN 12V LDO Enable Pin. Logic-high at this pin enables the integrated 12V LDO.

25 SKIP

CCM/DEM Programming Pin. Voltage at this pin determines the operation mode in each channel. Connect this pin to GND : both of the channels are set to automatic CCM/DEM transition operation with audio-skip operation in DEM. Connect this pin to VCC : both of the channels are set to CCM operation. Leave this pin floating : channel 1 is set to automatic CCM/DEM transition operation with audio-skip operation in DEM and channel 2 is set to CCM operation. 26 LDOEN 5V LDO Enable Pin. Logic-high at this pin enables the integrated 5V LDO.

27 VCC

Integrated 5V LDO Output. It is recommended to connect a minimum 4.7 μF ceramic capacitor between this pin and ground. VCC is the power supply for the control circuit and MOSFET drivers.

28 LDOBYP

5V LDO Bypass Input. Connect this pin to channel 1 regulator output (usually 5V). The LDOBYP pin voltage, V LDOBYP, is monitored for controller supply power swap. When V LDOBYP is higher than the threshold, the controller will automatically switch the chip power supply from 5V LDO to channel 1 output and disable the 5V LDO for power saving. 29 (Exposed Pad) GND Return Ground of Controller. The exposed pad must be soldered to a large PCB and connected to ground plane for maximum power dissipation.

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Function Block Diagram Operation The RT8127 is a dual output voltage mode synchronous Buck controller with integrated MOSFET drivers and two LDOs. The 12VLDO output also can be stepped down to 3.3V by the controlling of 12VLDOEN pin. The controller has a fixed frequency control with 180 ° phase shift in CCM. The fixed frequency can be adjusted from typical 300kHz to 600kHz. The controller supports dynamic mode transition function with three operating states : forced CCM, Diode Emulation Mode (DEM) and audio skipping modes at light load. Enable The recommended ON / OFF control can tie the ENx to GND with a switch. Under Voltage Lockout (UVLO) During normal operation, if the voltage at the VCC pin drops below UVLO falling edge threshold. The VCC UVLO circuitry inhibits switching by keeping UGATEx and LGATEx low. Over Current Protection (OCP) The over current protection is triggered if the voltage difference between CSPx and CSNx over 40mV for 16 switching cycles. Both UGATEx and LGATEx will go low until VCC is resupplied and exceeds the POR rising threshold voltage. Over Voltage Protection (OVP) If the FBx voltage is higher than the OVP threshold (typically 120% x V REF) during normal operation, OVP will be triggered. When OVP is triggered, UGATEx goes low and LGATEx is forced to high. Under Voltage Protection (UVP) If the FBx voltage is lower than the UVP threshold (typically 50% x V REF) during normal operation, UVP will be triggered. When UVP is triggered, both UGATEx and LGATEx go low until VCC is resupplied and exceeds the POR rising threshold voltage. PWM Controller PWM Controller OSC 12VLDO GVM CTL BOOT2 UGATE2 PHASE2 LGATE2 PGND2 12VLDO 12VLDOEN VIN BOOT1 UGATE1 PHASE1 LGATE1/RT PGND1 CSP2 CSN2 COMP2 FB2 FB1 COMP1 CSN1 CSP1 180 ° VTH_LDOBYP LDOBYP VCC LDOEN PGOOD EN2/SS2 EN1/SS1 SKIP GND 0 ° 5VLDO

DS8127-05 June 2014 www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. PGOOD PGOOD is actively held low in soft-start, standby, and shutdown conditions. It is released when both output voltages of VFB1 and VFB2 are within ±20% of the nominal regulation point. LDOBYP When V LDOBYP is higher than the threshold, the controller will automatically switch the chip power supply from 5V LDO to channel 1 output and disable the 5V LDO for power saving. Soft-Start An internal current source charges the internal soft-start capacitor such that the internal soft-start voltage ramps up uniformly. The FB voltage will track the internal soft- start voltage during the soft-start interval. The RT8127 also provides an external soft-start function. An additional capacitor connected at SSx pin will be charged by a 10 μA current source and determines the soft-start time.

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.

Electrical Characteristics

(VIN = 12V, VCC = 5V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit General VIN Supply Voltage V IN 4.5 12 26 V VIN Supply Current I VIN -- 2 -- mA VCC Power On Reset V POR -- 4.2 -- V VCC POR Hysteresis ΔVPOR -- 0.3 -- V Absolute Maximum Ratings (Note 1) z PHASE to GND z UGATE to GND z LGATE to GND z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 2) z ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4)

DS8127-05 June 2014 www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit Shutdown Current I VIN_SHDN EN1, EN2, LDOEN, 12VLDOEN = 0V -- -- 5 μA EN1, EN2, LDOEN = 0V, 12VLDOEN = 5V / 2.5V -- 100 150 Standby Current I VIN_SBY EN1, EN2 = 0V, LDOEN = 5V, 12VLDOEN = 5V / 2.5V -- 350 400 μA EN1, EN2 = 0V, LDOEN = 5V, 12VLDOEN = 0V -- 300 350 5V LDO Output Voltage Regulation VCC V IN = 12V, Load Current = 100mA 4.9 5 5.15 V Current Capability I VCC_SRC 60 -- -- mA LDOBYP LDOBYP Threshold V TH_LDOBYP 4.8 4.9 5 V LDOBYP Hysteresis ΔVTH_LDOBY P -- 0.1 0.25 V LDOBYP Internal Switch On-Resistance RLDOBYP -- -- 1 Ω 12V LDO Source Current Capability I 12VLDO 10 -- -- mA Voltage Regulation for 12V Output V12VLDO V IN = 15V, Load Current = 10mA 11.4 12 12.6 V Voltage Regulation for Enable Control EN1/EN2 Threshold V EN 0.58 0.68 0.78 V EN1/EN2 Hysteresis ΔVEN -- 78 -- mV LDOEN Threshold V TH_LDOEN 1.4 1.6 1.8 V LDOEN Hysteresis ΔVTH_LDOEN -- 0.2 -- V 12VLDOEN Input for 3.3V Output VTH_12VLDOEN_3.3V 12VLDO Output = 3.3V 2 2.5 3 V 12VLDOEN Input for 12V Output VTH_12VLDOEN_12V 12VLDO Output = 12V 4.5 5 5.5 V 12VLDOEN Disable V TH_12VLDOEN -- -- 0.4 V PGOOD PGOOD Threshold V PGOOD With Respect to V REF 80 -- 120 % Error Amplifier Open Loop Gain A OL (Note 5) -- 80 -- dB Gain Bandwidth GBW (Note 5) -- 15 -- MHz Slew Rate SR COMP Pin to GND with 10pF -- 2 -- V/ μs Reference Voltage Reference Voltage V REF 792 800 808 mV

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit PWM Controller Switching Frequency f SW RLGFS = 1.8k 255 300 345 kHz RLGFS = 4.7k 297 350 402 RLGFS = 9.1k 340 400 460 RLGFS = 16k 510 600 690 Maximum Duty Cycle D MA X 80 -- -- % Ramp Amplitude ΔVOSC V IN = 12V -- 2.4 -- V Ramp Valley V RAMPOFS -- 0.8 -- V PWM Clock Interleaving CCM Operation (Note 5) -- 180 -- Deg MOSFET Driver UGATE Driver Source R UGATEsr V BOOT − VPHASE = 5V -- 2.5 -- Ω UGATE Driver Sink R UGATEsk -- 1.5 -- Ω LGATE Driver Source R LGATEsr -- 2 -- Ω LGATE Driver Sink R LGATEsk -- 1 -- Ω Deadtime between UGATE Off and LGATE On CCM Operation -- 40 -- ns Deadtime between LGATE Off and UGATE On CCM Operation -- 20 -- ns Embedded Bootstrap Diode Voltage Drop VDROP Current = 10mA -- 0.8 -- V Soft-Start Internal Soft-Start Time t SS 6 9 -- ms Soft-Stop Resistance R PL Enabled when EN = L, measure CSN1/CSN2 resistance -- -- 80 Ω SKIP Pin SKIP Input Threshold Voltage Logic-High V IH CH1 and CH2 : CCM 3.6 -- -- V Logic-Low V IL CH1 and CH2 : Automatic CCM/DEM -- -- 1.4 Audio Skip Mode PWM Frequency fSW _ASM -- 30 -- kHz Protection Over Voltage Protection V OVP After VCC POR, with Respect to V REF 110 120 130 % Under Voltage Protection V UVP After Soft-Start, with Respect to V REF -- 50 -- % UVP Delay t D_UVP 1.4 2 -- ms OCP Threshold Voltage V OCP Measure V ISP − VISN 35 40 45 mV Short Circuit OCP Threshold Voltage VSCP Measure V ISP − VISN -- 60 -- mV Thermal Shutdown Temperature T SD -- 150 -- °C Thermal Shutdown Hysteresis ΔTSD -- 40 -- °C

DS8127-05 June 2014 www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured at T A = 25 °C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design.

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Application Circuit RT8127 VIN22

24 RNTC1optional

GND 29 (Exposed Pad) PGND2 5 PGND1 17EN1/SS112 EN2/SS210 12VLDO 12V/3.3V23 CH1 Enable CH2 Enable R29 C14 R17 R18 RNTC2 optional 3.3V R15 R16 R19 R20 C15Q3 C16C17 R21 C18 R24C19 R23R22 R25 C23C25 C22 R26 C24 R28 R27 C26 C27 C13 R10 R11 R12 R13 C12 R14 C9 C11R7 R9C10R8 RLGFS Q2 R3 C2 C1 C4 C3 C20 C21 VOUT2 VOUT1 1µF 30k10k 11k6.8k 0.1µF10µF270µF NTMFS4 921NT1G NTMFS4 936NT1G 1.4µH 10k NC 10k 0.1µF 0.8k940µF 22µF 6.8nF 820 6.2k 120pF 1nF 27k 0.1µF 1.96k NC NC NC 30k4.7µF 0.1µF 1.2k 6.2k 6.8nF820120pF 1nF27k 0.1µF 1.8k 0.1µF 10k 10k NC 68k 22µF940µF 1.4µH 2.2 2.2nF NTMFS4 921NT1G NTMFS4 936NT1G 0.5 0.5 0.1µF 270µF0.1µF 2.2 2.2nF

DS8127-05 June 2014 www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Operating Characteristics Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 100 Load Current (A) Efficiency (%) AUTO SKIP FCCM VIN = 12V, VCC = 5V, VOUT = 5V, EN1 = EN2 = 12VLDOEN = LDOEN = ON Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 100 Load Current (A) Efficiency (%) AUTO SKIP FCCM VIN = 19V, VCC = 5V, VOUT = 5V, EN1 = EN2 = 12VLDOEN = LDOEN = ON Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 100 Load Current (A) Efficiency (%) AUTO SKIP FCCM VIN = 24V, VCC = 5V, VOUT = 5V, EN1 = EN2 = 12VLDOEN = LDOEN = ON Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 100 Load Current (A) Efficiency (%) AUTO SKIP FCCM VIN = 12V, VCC = 5V, VOUT = 3.3V, EN1 = EN2 = 12VLDOEN = LDOEN = ON Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 100 Load Current (A) Efficiency (%) AUTO SKIP FCCM VIN = 19V, VCC = 5V, VOUT = 3.3V, EN1 = EN2 = 12VLDOEN = LDOEN = ON Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 100 Load Current (A) Efficiency (%) AUTO SKIP FCCM VIN = 24V, VCC = 5V, VOUT = 3.3V, EN1 = EN2 = 12VLDOEN = LDOEN = ON

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. VOUT1 (5V/Div) VIN = 12V, VCC = 5V Time (10ms/Div) Power Up PGOOD (5V/Div) EN1 (5V/Div) UGATE1 (10V/Div) VOUT1 (5V/Div) Time (1ms/Div) Shutdown Response PGOOD (5V/Div) EN1 (5V/Div) UGATE1 (10V/Div) VIN = 12V, VCC = 5V Time (100 μs/Div) VOUT2 Load Transient Response VIN = 12V, VCC = 5V, VOUT = 3.3V, Load = 0 to 5A Inductor Current (10A/Div) UGATE2 (20V/Div) VOUT2 (50mV/Div) LGATE2 (10V/Div) Time (100 μs/Div) VOUT1 Load Transient Response VIN = 12V, VCC = 5V, VOUT = 5V, Load = 0 to 5A Inductor Current (10A/Div) UGATE1 (20V/Div) VOUT1 (50mV/Div) LGATE1 (10V/Div) Time (10 μs/Div) OCP VIN = 12V, VCC = 5V Inductor Current (20A/Div) UGATE1 (20V/Div) VOUT1 (5V/Div) LGATE1 (5V/Div) Time (200 μs/Div) Shorted Start Up Inductor Current (20A/Div) LGATE2 (5V/Div) UGATE2 (10V/Div) VOUT2 (1V/Div) VIN = 12V, VCC = 5V

DS8127-05 June 2014 www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (10 μs/Div) OVP PGOOD (5V/Div) LGATE2 (5V/Div) UGATE2 (10V/Div) FB2 (500mV/Div) VIN = 12V, VCC = 5V VIN = 12V, VCC = 5V Time (50 μs/Div) UVP Inductor Current (5A/Div) UGATE1 (10V/Div) VOUT1 (2V/Div) LGATE1 (5V/Div)

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.

Application Information

The RT8127 is a dual output voltage mode synchronous Buck controller with integrated MOSFET drivers and two LDOs. It is suited to 5V/3.3V low voltage power supplies with demanding high efficiency and fast transient response, such as graphic card and motherboard. The internal linear regulators named 5VLDO and 12VLDO respectively provides 5V and 12V outputs. The internal circuitry and gate drivers can be supplied by the 5VLDO or the output of 5V channel. When the output voltage of 5V channel is above 4.85V, the 5VLDO will be turned off and the device is supplied by the output of 5V channel. The RT8127 supports dynamic mode transition function with three operating states: forced CCM, Diode Emulation Mode (DEM) and audio skipping modes at light load. These different operating states improve the system efficiency as high as possible. The RT8127 has a fixed frequency control with 180° phase shift in CCM. The fixed frequency can be adjusted from typical 300kHz to 600kHz by the external resistor R LGFS . Operation Mode Selection The SKIP pin is used to select the operation mode. When the SKIP pin is tied to VCC, both of the channels operate in forced-CCM mode. When the SKIP pin is connected to GND, both of the channels operate in automatic CCM/ DEM and transition operation with audio-skip mode in DEM. When the SKIP pin is floating, channel 1 operates in automatic CCM/DEM and transition operation with audio- skip mode in DEM, and channel 2 operates in forced-CCM mode. Diode-Emulation Mode In Diode Emulation Mode, the RT8127 automatically reduces switching frequency at light load conditions to maintain high efficiency. This reduction of frequency is achieved smoothly. As the output current decreases from heavy-load condition, the inductor current is also reduced, and eventually comes to the point that its current valley touches zero, which is the boundary between continuous conduction and discontinuous conduction modes. By emulating the behavior of diodes, the low side MOSFET allows only partial negative current to flow when the inductor free wheeling current becomes negative. As the load current is further decreased, it takes longer and longer time to discharge the output capacitor to the level that requires the next “ON” cycle. In reverse, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous conduction. The transition load point to the light load operation is shown in Figure 1 and can be calculated as follows : Figure 1. Boundary of Inductor current between DEM low side MOSFET to induce a negative inductor current.

©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. reference and linear regulators. driver, 5V bias voltage is delivered from 5VLDO supply. LGATEx low is robust, with a 0.6Ω typical on resistance. enables control through the ENx pin. sure soft-start can be finished and PGOOD assertion. only consider if 12VLDOEN is ON state. Figure 2. External Soft-Start Sequence

0.8 EN shutdown

©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Figure 3. External Soft-Start The RT8127 includes 5V and 12V low dropout regulators. The 5V regulator can supply up to 60mA for external loads. Bypass LDOx with a minimum 1 μF ceramic capacitor. simultaneously disconnects the internal linear regulator. connecting 12VLDOEN pin to 2V to 3V. drops below UVLO falling edge threshold. switching by keeping UGATEx and LGATEx low.

DS8127-05 June 2014www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Output Inductor Selection Inductor plays an important role in the Buck converter because the energy from the input power rail is stored in it and then released to the load. From the viewpoint of efficiency, the DC Resistance (DCR) of inductor should be as small as possible because inductor carries current all the time. Using inductor that has lower DCR can obtain higher efficiency. In addition, because inductor takes most of the board space, its size is also important. Low profile inductors can save board space especially when the height has limitation. Additionally, larger inductance results in lower ripple current, and therefore the lower power loss. However, the inductor current rising time increases with inductance value. This means the inductor will have a longer charging time before its current reaches the required output current. Since the response time is increased, the transient response performance will be decreased. Therefore, the inductor design is a trade-off between performance, size and cost. In general, inductance is designed such that the ripple current ranges between 20% to 30% of full load current. The inductance can be calculated by using the following equation : − ××× IN OUT OUT(MIN) SW OUT_FullLoad IN VV VL= Fk I V where k is 0.2 to 0.3. Output Capacitor Selection The output capacitor and the inductor form a low-pass filter in the Buck topology. In steady state condition, the ripple current flowing into/out of the capacitor results in voltage ripple. The output voltage ripples contains two parts, ΔV OUT_ESR and ΔVOUT_C. ΔΔ × ΔΔ × ×× OUT_ESR L OUT_C L OUT SW V = I ESR 1V = I 8C f When load transient occurs, the output capacitor supplies the load current before controller can respond. Therefore, the ESR will dominate the output voltage sag during load transient. The output voltage sag can be calculated by using the following equation : V OUT_SAG = ESR x ΔIOUT For a given output voltage sag specification, the ESR value can be determined. Another parameter that has influence on the output voltage sag is the equivalent series inductance (ESL). The rapid change in load current results in di/dt during transient. Therefore ESL contributes to part of the voltage sag. Using a capacitor with low ESL will obtain better transient performance. Generally, using several capacitors connected in parallel will also have better transient performance than just one single capacitor with the same total ESR. Unlike electrolytic capacitors, the ceramic capacitor has relatively low ESR and can reduce the voltage deviation during load transient. However, the ceramic capacitor can only provide low capacitance value. Therefore, it is suggested to use a mixed combination of electrolytic capacitor and ceramic capacitor for achieving better transient performance. MOSFET Selection The majority of power loss in the step-down power conversion is due to the loss in the power MOSFET(s). For low voltage high current applications, the duty cycle of the high side MOSFET is small. Therefore, the switching loss of the high side MOSFET is of concern. Power MOSFET(s) with lower total gate charge are preferred in such kind of application. However, the small duty cycle means the low side MOSFET is on for most of the switching cycle. Therefore, the conduction loss tends to dominate the total power loss of the converter. To improve the overall efficiency, MOSFET(s) with low R DS(ON) are preferred in the circuit design. In some cases, more than one MOSFET are connected in parallel to further decrease the on-state resistance. However, this depends on the low side MOSFET driver capability and the budget. Compensation Network Design The RT8127 is a voltage mode synchronous Buck controller. To compensate a typical voltage mode Buck converter, there are two ordinary compensation schemes, well known as type-II compensator and type-III compensator. The choice of using type-II or type-III compensator will be up to platform designers, and the main concern will be the position of the capacitor ESR zero and mid-frequency to high frequency gain boost. Typically, the ESR zero of output capacitor will tend to

©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. switching frequency to cancel high frequency noise. Figure 10. Derating Curve of Maximum Power on the maximum power dissipation.

DS8127-05 June 2014 www.richtek.com ©Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Layout Consideration Layout planning plays a critical role in modern high frequency switching converter design. Circuit boards with good layout can help the IC functions properly and achieve low losses, low switching noise, and stable operation with good performance. For the best performance of the RT8127, the following PCB Layout guidelines must be strictly followed. \ Place the filter capacitor close to the device pin, within 12mm (0.5 inch) if possible. \ Place the frequency setting resistor close to the IC frequency setting pin. \ Place feedback and compensation circuits as close to the device pin as possible. \ Keep current limit setting network as close as possible to the IC. Routing of the network should avoid coupling to high voltage switching node. \ Connections from the drivers to the respective gate of the high side or the low side MOSFET should be as short as possible to reduce stray inductance. Use 0.65mm (25 mils) or wider trace. \ All sensitive analog traces and components such as VOUTx, FBx, GND, PGOOD and VCC should be placed away from high voltage switching nodes such as PHASEx, LGATEx, UGATEx, or BOOTx nodes to avoid coupling. Use internal layer(s) as ground plane(s) and shield the feedback trace from power traces and components. \ Gather ground terminal of VIN capacitor(s), VOUTx capacitor(s), and source of low side MOSFETs as close as possible. PCB trace defined as PHASEx node, which connects to source of high side MOSFET, drain of low side MOSFET and high voltage side of the inductor, should be as short and wide as possible. \ Keep Channel 1 and Channel 2 network isolated to avoid mutually noise coupling.

DS8127-05 June 2014www.richtek.com Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 3.900 4.100 0.154 0.161 D2 2.350 2.450 0.093 0.096 E 3.900 4.100 0.154 0.161 E2 2.350 2.450 0.093 0.096 e 0.400 0.016 L 0.350 0.450 0.014 0.018 W-Type 28L QFN 4x4 Package Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2 E D L be A SEE DETAIL A Outline Dimension