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Technical content
Features
Tight LED Current Regulation No Opto-Coupler and TL431 Required Power Factor Correction (PFC) Compatible with PWM Dimming Built-in HV Start-up Device Maximum/Minimum Switching Frequency Clamping Input Voltage Feed-Forward Compensation Maximum/Minimum On-Time Limitation Wide VDD Voltage Range (up to 25V) Multiple Protection Features LED Open-Circuit Protection LED Short-Circuit Protection Output Diode Short-Circuit Protection VDD Under-Voltage Lockout VDD Over-Voltage Protection Over-Temperature Protection Cycle-by-Cycle Current Limit RoHS Compliant and Halogen Free
Applications
AC/DC LED Lighting driver Flyback Converter Buck-Boost Converter Simplified Application Circuit VOUT+ MULT COMP GND GD CS VDD RT7302 VOUT- HV DOUTTX1 RPC RCS DAUX CVDD RZCD1 RZCD2 ZCD RHVRM1 RM2 CCOMP CSIN Line Neutral BD COUT VOUT- MULT COMP GND GD CS VDD RT7302 VOUT+ HV DOUT TX1 RPC RCS DAUX CVDD RZCD1 RZCD2 ZCD RHVRM1 RM2 CCOMP CSIN Line Neutral BD COUT
DS7302-03 May 2015www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Pin Description Pin No. Pin Name Pin Function 1 HV High Voltage Input for Startup. 2 GND Ground of the Controller. 3 COMP Compensation Node. Output of the internal trans-conductance amplifier. 4 MULT Input for Line Voltage Signal. This pin is used to sense the line voltage by resistor divider to achieve dimming function. 5 ZCD Zero Current Detection Input. This pin is used to sense the voltage at auxiliary winding of the transformer. 6 CS Current Sense Input. Connect this pin to the current sense resistor. 7 GD Gate Driver Output for External Power MOSFET. 8 VDD Supply Voltage (V DD) Input. The controller will be enabled when V DD exceeds V TH_ON and disabled when VDD is lower than VTH_OFF. Marking InformationOrdering Information Note : Richtek products are : RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations (TOP VIEW) SOP-8 RT7302 Package Type S : SOP-8 Lead Plating System G : Green (Halogen Free and Pb Free) HV GND COMP MULT VDD GD ZCD CS 4 5 RT7302 GSYMDNN RT7302GS : Product Number YMDNN : Date Code
DS7302-03 May 2015 www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Function Block Diagram Starter Circuit Output Diode Short Circuit Protection COMP Under Voltage Lockout (16V/9V) VDD Over Voltage Protection ZCD CS GD VDD GND HV Start-Up Control HV PWM Control Logic VCLAMP 13V RGDGate Driver VDD OVP PWM Constant On-Time Comparator Current Limit Comparator VCS_CL Over Temperature Protection OTP Ramp Generator Constant Current Control L : Open H : Closed Dimming Comparator VMULT_EN / VMULT_DS 150mV / 100mV Valley Detector Clamping Circuit MULT Output Over Voltage Protection Leading Edge Blanking Output OVP ICS VMULT Feed-Forward CompensationVMULT
DS7302-03 May 2015www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. which is the non-inverting input of the constant on-time comparator. This function reduces the operating COMP voltage range over full line input voltage range and extends the range of the allowed magnetize inductance. PWM Dimming Function PWM dimmable function is embedded in the RT7302. When the MULT voltage (V MULT) < VMULT_DIS, the COMP pin will become high impedance and the regulation loop operates according to the voltage (V COMP). The loop will keep operation with the previous condition. When VMULT > VMULT_EN, the internal amplifier resumes controlling the VCOMP for the regulation loop to provide the constant output current. Thus, the average output current is linearly proportional to the duty ratio of the PWM dimming signal Protections LED Open-Circuit Protection In an event of output open circuit, the converter will be shut down to prevent being damaged, and it will be auto- restarted when the output is recovered. Once the LED is open, the output voltage and V ZCD will rise. When the sample-and-hold ZCD voltage (VZCD_SH) exceeds its OV threshold (V ZCD_OVP, 3.1V typ.), output OVP will be activated and the PWM output (GD pin) will be forced low to turn off the main switch. If the output is still open-circuit when the converter restarts, the converter will be shut down again. LED Short-Circuit Protection LED short-circuit protection can be achieved by VDD UVLO and cycle-by-cycle current limitation. Once LED short- circuit failure occurs, V DD drops related to the output voltage. When the VDD is lower than falling UVLO threshold (VTH_OFF, 9V typ.), the converter will be shut down and it will be auto-restarted when the output is recovered. Output Diode Short-Circuit Protection When the output diode is damaged as short-circuit, the transformer will be led to magnetic saturation and the main switch will suffer from a high current stress. To avoid the above situation, an output diode short-circuit protection is built-in. When CS voltage V CS exceeds the threshold (VCS_SD 1.5 typ.) of the output diode short-circuit protection, the RT7302 will shut down the PWM output (GD pin) in few cycles to prevent the converter from damage. It will be auto-restarted when the failure condition is recovered. VDD Under-Voltage Lockout (UVLO) and Over-Voltage Protection(VDD OVP) The RT7302 will be enabled when VDD voltage (V DD) exceeds rising UVLO threshold (V TH_ON, 16V typ.) and disabled when VDD is lower than falling UVLO threshold (VTH_OFF, 9V typ.). When VDD exceeds its over-voltage threshold (VOVP, 27V typ.), the PWM output of the RT7302 is shut down. It will be auto-restarted when the V DD is recovered to a normal level. Over-Temperature Protection (OTP) The RT7302 provides an internal OTP function to protect the controller itself from suffering thermal stress and permanent damage. It's not suggested to use the function as precise control of over temperature. Once the junction temperature is higher than the OTP threshold (T SD, 150°C typ.), the controller will shut down until the temperature cools down by 30°C (typ.). Meanwhile, if V DD reaches falling UVLO threshold voltage (V TH_OFF), the controller will hiccup till the over-temperature condition is removed.
DS7302-03 May 2015 www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Electrical Characteristics
(VDD = 15V, TA = 25°C, unless otherwise specification) Absolute Maximum Ratings (Note 1) Power Dissipation, PD @ TA = 25°C Package Thermal Resistance (Note 2) ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4) Parameter Symbol Test Conditions Min Typ Max Unit HV Start-up Section HV Start-up Average Current I HV_ST V DD < VTH_ON, VHV = 100V 0.8 -- -- mA Off State Leakage Current V DD = VTH_ON + 1V, VHV = 500V -- -- 2 A VDD Supply Current and Protections Section VDD OVP Threshold Voltage V OVP 25.5 27 28.5 V VDD OVP De-bounce Time (Note 6) -- 10 -- s Rising UVLO Threshold Voltage V TH_ON 15 16 17 V Falling UVLO Threshold Voltage V TH_OFF 8 9 10 V Operating Supply Current I DD_OP I ZCD = 0, GD Open -- -- 3.5 mA Start-up Current V DD = VTH_ON 1V -- -- 30 A ZCD Section Lower Clamp Voltage I ZCD = 0 to 2.5mA -- 0 0.3 V ZCD OVP Threshold Voltage V ZCD_OVP At the Knee Point (Note 6) 2.8 3.1 3.4 V Dimming Control Section Enable Threshold Voltage V MULT_EN V MULT Rising -- 150 -- mV Disable Threshold Voltage V MULT_DIS V MULT Falling -- 100 -- mV De-bounce Time (Note 6) -- 7 -- s
DS7302-03 May 2015www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured at T A = 25°C on a low effective thermal conductivity two-layer test board per JEDEC 51-3. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Please refer to “Feed-Forward Compensation Design ” in “Application Information ”. Note 6. Guaranteed by Design. Parameter Symbol Test Conditions Min Typ Max Unit Constant Current Control Section Regulated factor for Constant-Current Control KCC 246.25 250 253.75 mV Maximum COMP Voltage I COMP < 30A 4.5 -- -- V Maximum COMP Sourcing Current ICOMP(MAX) V COMP < 3.5V -- 62.5 -- A Timing Control Section Minimum On-Time t ON(MIN) I ZCD = 150A 2.2 2.7 3.2 s Maximum On-Time t ON(MAX) 29 47 65 s Minimum Switching Period t S(MIN) 7 8.5 10 s Duration of Starter t START At No Valley Detected 75 130 300 s Current Sense Section Blanking Time t LEB LEB + Propagation Delay (Note 6) 240 400 570 ns Output Diode Short-Circuit Protection Voltage Threshold at CS VCS_SD Shutdown when VCS > VCS_SD in 7 cycles. -- 1.5 -- V CS Voltage Threshold for Peak Current Limitation VCS_CL 0.93 1.03 1.13 V Propagation Delay Compensation Factor KPC Sourcing ICS = IZCD x KPC , IZCD = 150A -- 0.02 -- A/A Gate Driver Section GD Voltage Rising Time t R C L = 1nF -- 60 80 ns GD Voltage Falling Time t F C L = 1nF -- 40 70 ns GD Output Clamping Voltage V CLAMP C L = 1nF -- 13 -- V Internal GD Pull Low Resistor R GD -- 40 -- k Over-Temperature Protection Section Over-Temperature Threshold T SD (Note 6) -- 150 -- C Over-Temperature Threshold Hysteresis TSD_HYS (Note 6) -- 30 -- C
©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Table 1. Suggested Component Values
DS7302-03 May 2015www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Operating Characteristics IHV_ST vs. Temperature 0.80 1.00 1.20 1.40 1.60 1.80 2.00 -50 -25 0 25 50 75 100 125 Temperature (°C) IHV_ST (mA) VOVP vs. Temperature 26.0 26.4 26.8 27.2 27.6 28.0 -50 -25 0 25 50 75 100 125 Temperature (°C) VOVP (V) VTH_OFF vs. Temperature 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 -50 -25 0 25 50 75 100 125 Temperature (°C) VTH_OFF (V) IDD_OP vs. Temperature 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 -50 -25 0 25 50 75 100 125 Temperature (°C) IDD_OP (mA) KCC vs. Temperature 0.230 0.235 0.240 0.245 0.250 0.255 0.260 0.265 0.270 -50 -25 0 25 50 75 100 125 Temperature (°C) KCC (V) VTH_ON vs. Temperature 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 -50 -25 0 25 50 75 100 125 Temperature (°C) VTH_ON (V)
DS7302-03 May 2015 www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. ICOMP(MAX) vs. Temperature 100 -50 -25 0 25 50 75 100 125 Temperature (°C) ICOMP(MAX) (μA) tON(MIN) vs. Temperature 2.0 2.2 2.4 2.6 2.8 3.0 -50 -25 0 25 50 75 100 125 Temperature (°C) tON(MIN) (μs) tSTART vs. Temperature 100 110 120 130 140 150 -50 -25 0 25 50 75 100 125 Temperature (°C) tSTART (μs) VCS_SD vs. Temperature 1.2 1.3 1.4 1.5 1.6 1.7 1.8 -50 -25 0 25 50 75 100 125 Temperature (°C) VCS_SD (V) VCS_CL vs. Temperature 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 -50 -25 0 25 50 75 100 125 Temperature (°C) VCS_CL (V) KPC vs. Temperature 0.016 0.017 0.018 0.019 0.020 0.021 0.022 -50 -25 0 25 50 75 100 125 Temperature (°C) KPC (A/A)
DS7302-03 May 2015www.richtek.com ©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Application Information
Considering the conversion efficiency, the programmed DC level of the average output current (I OUT (t)) can be derived as : CCPOUT_CC TX1 SC S SEC_PK STX1 PRI_PK P KN1I = C T R 2N R I NCTR = IN in which CTR TX1 is the current transfer ratio of the transformer TX1, ISEC_PK is the peak current of secondary side, and IPRI_PK is the peak current of the primary side. CTRTX1 can be estimated to be 0.9. According to the above parameters, current sense resistor RCS can be determined as the following equation : CCP CS TX1 SO U T _ C C KN1R= C T R2N I Propagation Delay Compensation Design The VCS deviation (ΔVCS) caused by propagation delay effect can be derived as : IN D CSCS m Vt RV = L ACS PC IN P ZCD1 N 1I = K V NR in which t D is the delay period which includes the propagation delay of the RT7302 and the turn-off transition of the main MOSFET. The sourcing current from CS pin of the RT7302 (ICS) can be expressed as : where NA is the turns number of auxiliary winding. RPC can be designed by : CS D CS ZCD1 PPC CS m PC A Vt R R NR = = IL K N Minimum On-Time Setting The RT7302 limits a minimum on-time (tON(MIN)) for each switching cycle. The tON(MIN) is a function of the sample- and-hold ZCD current (IZCD_SH) as following : ON(MIN) ZCD_SHt I 375p sec A (typ.) IN AZCD_SH ZCD1 P VNI = RN IZCD_SH can be expressed as : Thus, RZCD1 can be determined by : ON(MIN) IN AZCD1 P tV NR = (typ.) 375p N AC(MAX) AZCD1 P 2V NR > 2.5m N In addition, the current flowing out of ZCD pin must be lower than 2.5mA (typ.). Thus, the R ZCD1 is also determined by : where the VAC(MAX) is maximum input AC voltage. Output Over-Voltage Protection Setting Output OVP is achieved by sensing the knee voltage on the auxiliary winging. It is recommended that output OV level (V OUT_OVP) is set at 120% of nominal output voltage (VOUT). Thus, RZCD1 and RZCD2 can be determined by the equation as : ZCD2AOUT S ZCD1 ZCD2 RNV 120% = 3.1V (typ.)NR R Feed-Forward Compensation Design The COMP voltage, VCOMP, can be derived from the following equations. VMULT_pk is the peak voltage on the MULT pin. Gmramp is the trans-conductance of the ramp generator, and its typical value is 2.5 μA/V. C ramp is the capacitance of the ramp generator, and its typical value is 6.5pF. It is recommended to design VCOMP(MIN) = 1.2V. If the COMP voltage is over its recommended operating range (0.7V to 4.3V), output current regulation may be affected. Thus, the voltage divider resistors R M1 and RM2 can be determined according to the above parameters.
2 ON OFFMULT_pk ramp ON
s ramp COMP tt1 VG m t 2t = C V
©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Table 2. Suggested Component Values Range W on a standard JEDEC 51-3 two-layer thermal test board. on the maximum power dissipation. Figure 6. Derating Curve of Maximum Power Dissipation to be as short as possible, too. high switching loop. Keep it as small as possible. MOSFET(b), auxiliary winding(c) and IC control circuit(d).
©Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Figure 7. PCB Layout Guide winding, the output diode, and the output filter capacitor.
DS7302-03 May 2015 www.richtek.com Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. A BJ F H M C D I 8-Lead SOP Plastic Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.050 0.254 0.002 0.010 J 5.791 6.200 0.228 0.244 M 0.400 1.270 0.016 0.050 Outline Dimension