RT9715AGB RICHTEK | Alldatasheet
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Technical content
Features
zzzzz 90mΩ Ω Ω Ω Ω (typ.) N-MOSFET Switch zzzzz Operating Range : 2.7V to 5.5V zzzzz Reverse Blocking Current zzzzz Under Voltage Lockout zzzzz Deglitched Fault Report (FLG) zzzzz Thermal Protection with Foldback zzzzz Over Current Protection zzzzz Short Circuit Protection zzzzz UL Approved−−−−−E219878 zzzzz Nemko Approved−−−−−NO49621 zzzzz RoHS Compliant and Halogen Free Pin Configurations (TOP VIEW) WDFN-8L 3x3 GND VIN VOUT VOUT VOUTVIN EN/EN FLG9 GND SOP-8/MSOP-8 GND VIN VIN VOUT VOUT VOUT 4 5 EN/EN FLG SOT-23-5 (R-Type) GND VOUT EN/ENFLG VIN SOT-23-5 (G-Type) VOUT GND VIN EN/EN NC SOT-23-5 VOUT GND VIN FLG EN/EN Package Type B : SOT-23-5 BG : SOT-23-5 (G-Type) BR : SOT-23-5 (R-Type) S : SOP-8 F : MSOP-8 QW : WDFN-8L 3x3 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) RT9715 Output Current/EN Function A : 2A/Active High B : 2A/Active Low C : 1.5A/Active High D : 1.5A/Active Low E : 1.1A/Active High F : 1.1A/Active Low G : 0.7A/Active High H : 0.7A/Active Low
DS9715-03 April 2011www.richtek.com Function Block Diagram Pin No. SOT-23-5 SOT-23-5 (G-Type) SOT-23-5 (R-Type) SOP-8 / MSOP-8 WDFN-8L 3X3 Pin Name Pin Function 1 1 5 6 , 7 , 8 6 , 7 , 8 VOUT Output Voltage. 2 2 2 1 1 GND Ground. 3 -- 1 5 5 FLG Fault FLAG Output. 4 4 3 4 4 EN/EN Chip Enable (Active High/Low). 5 5 4 2 , 3 2 , 3 VIN Power Input Voltage. -- 3 -- -- -- NC No Internal Connection. -- -- -- -- 9 (Exposed Pad) The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Functional Pin Description Typical Application Circuit Note : A low-ESR 150uF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to meet the 330mV maximum droop requirement in the hub VBUS. (see Application Information Section for further details) Supply Voltage 2.7V to 5.5V VIN VOUT GND RT9715 Over -Current VBUS GND USB Controller 1uF 150uF10uF Pull-Up Resistor (10K to 100K) Ferrite Beads Data FLG EN/EN CIN COUT RT9715B/D/F/H Chip Enable RT9715A/C/E/G Chip Enable Gate Control Output Voltage Detection Delay Oscillator UVLO Charge Pump Bias Thermal Protection Current Limiting VOUT VIN GND EN/EN FLG Auto Discharge
DS9715-03 April 2011 www.richtek.com
Electrical Characteristics
Recommended Operating Conditions (Note 4) Absolute Maximum Ratings (Note 1) z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 2) z ESD Susceptibility (Note 3) (VIN = 5V, C IN = 1uF, COUT = 10uF, T A = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Quiescent Current I Q Switch On, V OU T = Open -- 50 70 Input Shutdown Current ISHDN Switch Off, V OUT = Open -- 0.1 1 uA RT9715A/B V IN = 5V, IOU T = 1.5A -- 90 110 RT9715C/D V IN = 5V, IOU T =1.3A -- 90 110 RT9715E/F V IN = 5V, IOU T = 1A -- 90 110 Switch On Resistance RT9715G/H RDS(ON) VIN = 5V, IOU T = 0.6A -- 90 110 mΩ RT9715A/B 2 2.5 3.2 RT9715C/D 1.5 2 2.8 RT9715E/F 1.1 1.5 2.1 Current Limit RT9715G/H ILIM VOUT = 4V 0.7 1 1.4 A RT9715E/F -- 1 -- Short Current RT9715G/H ISC_FB VOUT = 0V, Measured Prior to Thermal Shutdown -- 0.7 -- A
DS9715-03 April 2011www.richtek.com Note 1. Stresses beyond those listed under “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. θJA is measured in the natural convection at T A = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Parameter Symbol Test Conditions Min Typ Max Unit Logic_High Voltage V IH V IN = 2.7V to 5.5V 2 -- -- V EN/EN Threshold Logic_Low Voltage V IL V IN = 2.7V to 5.5V -- -- 0.8 V EN/EN Input Current I EN/EN V EN = 5V -- 0.01 0.1 uA Output Leakage Current I LEAKAGE VEN = 0V, RLOAD = 0Ω -- 0.5 1 uA Output Turn-On Rise Time T ON_RISE 10% to 90% of V OUT Rising -- 200 -- us FLG Output Resistance RFLG ISINK = 1mA -- 20 -- Ω FLG Off Current I FLG_OFF VFLG = 5V -- 0.01 1 uA FLG Delay Time T D From fault condition to FLG assertion 5 12 20 ms Shutdown Auto-Discharge Resistance RDischarge VEN = 0V, VEN = 5V -- 100 150 Ω Under-Voltage Lockout V UVLO V IN Rising 1.3 1.7 -- V Under-Voltage Hysteresis ΔVUVLO V IN Decreasing -- 0.1 -- V VOUT > 1V -- 120 -- °C Thermal Shutdown Protection T SD VOUT = 0V -- 100 -- °C Thermal Shutdown Hysteresis V OUT = 0V -- 20 -- °C
DS9715-03 April 2011 www.richtek.com Typical Operating Characteristics On Resistance vs. Input Voltage 100 102 104 106 108 Input Voltage (V) On Resistance (m Ω) IOUT = 2A SOP-8 SOT-23-5 On Resistance vs. Temperature 100 105 110 115 120 125 -40 -25 -10 5 20 35 50 65 80 Temperature On Resistance (m Ω) VIN = 5V, IOUT = 2A SOP-8 SOT-23-5 (°C) Quiescent Current vs. Input Voltage Input Voltage (V) Quiescent Current (uA) No Load Quiescent Current vs. Temperature -40 -25 -10 5 20 35 50 65 80 95 110 Temperature Quiescent Current (uA) (°C) VIN = 5V,No Load Shutdown Current vs. Input Voltage 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Input Voltage (V) Shutdown Current (uA) No Load Shutdown Current vs. Temperature 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -40 -25 -10 5 20 35 50 65 80 95 110 Temperature Shutdown Current (uA) (°C) VIN = 5V
DS9715-03 April 2011www.richtek.com Current Limit vs. Input Voltage 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 Input Voltage (V) Current Limit (A) Short Current vs. Input Voltage 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 Input Voltage (V) Short Current (A) Output Voltage vs. Output Current 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Output Current (A) Output Voltage (V) VIN = 5V VIN = 3.3V Short Current vs. Temperature 1.00 1.10 1.20 1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00 -40 -25 -10 5 20 35 50 65 80 95 110 Temperature Short Current (A) (°C) VIN = 5V UVLO Threshold vs. Temperature 1.0 1.2 1.4 1.6 1.8 2.0 2.2 -40 -25 -10 5 20 35 50 65 80 95 110 Temperature UVLO Threshold (V) Rising Falling (°C) Current Limit vs. Temperature 2.00 2.05 2.10 2.15 2.20 2.25 2.30 2.35 2.40 -40 -25 -10 5 20 35 50 65 80 95 110 Temperature Current Limit (A) (°C) VIN = 5V
DS9715-03 April 2011 www.richtek.com FLG Response Time (2.5ms/Div) VOUT (2V/Div) EN (5V/Div) IIN (1A/Div) VIN = 5V, RLOAD = 0.5Ω FLG (5V/Div) Power On from EN Time (100us/Div) EN (5V/Div) VOUT (2V/Div) IIN (1A/Div) VIN = 5V, RLOAD = 2.7Ω Power Off from V IN Time (25ms/Div) VOUT (2V/Div) VIN (2V/Div) EN = 0V, No Load FLG Delay Time vs. Temperature 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 -40 -25 -10 5 20 35 50 65 80 95 110 Temperature FLG Delay Time (ms) VIN = 5V (°C) FLG Delay Time vs. Input Voltage Input Voltage (V) FLG Delay Time (ms) Power On from V IN Time (25ms/Div) VOUT (2V/Div) VIN (2V/Div) EN = 0V, No Load
DS9715-03 April 2011www.richtek.com Fault Flag The RT9715 series provides a FLG signal pin which is an N-Channel open drain MOSFET output. This open drain output goes low when current limit or the die temperature exceeds 120°C approximately. The FLG output is capable of sinking a 10mA load to typically 200mV above ground. The FLG pin requires a pull-up resistor, this resistor should be large in value to reduce energy drain. A 100kΩ pull-up resistor works well for most applications. In the case of an over-current condition, FLG will be asserted only after the flag response delay time, t D, has elapsed. This ensures that FLG is asserted only upon valid over-current conditions and that erroneous error reporting is eliminated. For example, false over-current conditions may occur during hot-plug events when extremely large capacitive loads are connected and causes a high transient inrush current that exceeds the current limit threshold. The FLG response delay time t D is typically 12ms. Under-Voltage Lockout Under-voltage lockout (UVLO) prevents the MOSFET switch from turning on until input the voltage exceeds approximately 1.7V. If input voltage drops below approximately 1.3V, UVLO turns off the MOSFET switch. Under-voltage detection functions only when the switch is enabled. Current Limiting and Short-Circuit Protection The current limit circuitry prevents damage to the MOSFET switch and the hub downstream port but can deliver load current up to the current limit threshold of typically 2A through the switch of the RT9715A/B, 1.5A for RT9715C/D, 1.1A for RT9715E/F and 0.7A for RT9715G/H respectively. When a heavy load or short circuit is applied to an enabled switch, a large transient current may flow until the current limit circuitry responds. Once this current limit threshold is exceeded, the device enters constant current mode until the thermal shutdown occurs or the fault is removed. Thermal Shutdown Thermal protection limits the power dissipation in RT9715. When the operation junction temperature exceeds 120°C, the OTP circuit starts the thermal shutdown function and Applications Information The RT9715 is a single N-MOSFET high-side power switches with enable input, optimized for self-powered and bus-powered Universal Serial Bus (USB) applications. The RT9715 is equipped with a charge pump circuitry to drive the internal N-MOSFET switch; the switch's low R DS(ON), 90mΩ, meets USB voltage drop requirements; and a flag output is available to indicate fault conditions to the local USB controller. Input and Output V IN (input) is the power source connection to the internal circuitry and the drain of the MOSFET. VOUT (output) is the source of the MOSFET. In a typical application, current flows through the switch from V IN to VOUT toward the load. If VOUT is greater than VIN, current will flow from VOUT to VIN since the MOSFET is bidirectional when on. Unlike a normal MOSFET, there is no parasitic body diode between drain and source of the MOSFET, the RT9715 prevents reverse current flow if V OUT is externally forced to a higher voltage than VIN when the chip is disabled (VEN < 0.8V or VEN > 2V). D G S D G S Normal MOSFET RT9715 Chip Enable Input The switch will be disabled when the EN/EN pin is in a logic low/high condition. During this condition, the internal circuitry and MOSFET will be turned off, reducing the supply current to 0.1uA typical. Floating the EN/EN may cause unpredictable operation. EN should not be allowed to go negative with respect to GND. The EN/EN pin may be directly tied to V IN (GND) to keep the part on. Soft Start for Hot Plug-In Applications In order to eliminate the upstream voltage droop caused by the large inrush current during hot-plug events, the “soft- start” feature effectively isolates the power source from extremely large capacitive loads, satisfying the USB voltage droop requirements.
DS(ON) of the switch as below. the die (100°C) and TA is the maximum ambient temperature. short circuit occurs (VOUT < 1V) as shown in Figure 1. Bus-Power Hubs or Self-Powered Hubs. compliant USB hub and host systems. circuitry for USB-required fault reporting. Figure 1. Short Circuit Thermal Folded Back Protection
120 C° 100 C°
80 C°IC Temperature
DS9715-03 April 2011www.richtek.com The faster trip time of the RT9715 power distribution allows designers to design hubs that can operate through faults. The RT9715 provides low on-resistance and internal fault- reporting circuitry to meet voltage regulation and fault notification requirements. Because the devices are also power switches, the designer of self-powered hubs has the flexibility to turn off power to output ports. Unlike a normal MOSFET, the devices have controlled rise and fall times to provide the needed inrush current limiting required for the bus-powered hub power switch. Supply Filter/Bypass Capacitor A 1uF low-ESR ceramic capacitor from V IN to GND, located at the device is strongly recommended to prevent the input voltage drooping during hot-plug events. However, higher capacitor values will further reduce the voltage droop on the input. Furthermore, without the bypass capacitor, an output short may cause sufficient ringing on the input (from source lead inductance) to destroy the internal control circuitry. The input transient must not exceed 6V of the absolute maximum supply voltage even for a short duration. Output Filter Capacitor A low-ESR 150uF aluminum electrolytic or tantalum between V OUT and GND is strongly recommended to meet the 330mV maximum droop requirement in the hub VBUS (Per USB 2.0, output ports must have a minimum 120uF of low-ESR bulk capacitance per hub). Standard bypass methods should be used to minimize inductance and resistance between the bypass capacitor and the downstream connector to reduce EMI and decouple voltage droop caused when downstream cables are hot-insertion transients. Ferrite beads in series with V BUS, the ground line and the 0.1uF bypass capacitors at the power connector pins are recommended for EMI and ESD protection. The bypass capacitor itself should have a low dissipation factor to allow decoupling at higher frequencies. Voltage Drop The USB specification states a minimum port-output voltage in two locations on the bus, 4.75V out of a Self-Powered Hub port and 4.40V out of a Bus-Powered Hub port. As with the Self-Powered Hub, all resistive voltage drops for the Bus-Powered Hub must be accounted for to guarantee voltage regulation (see Figure 7-47 of Universal Serial Specification Revision 2.0 ). The following calculation determines V OUT (MIN) for multi- ple ports (NPORTS) ganged together through one switch (if using one switch per port, NPORTS is equal to 1) : VOUT (MIN) = 4.75V − [ II x ( 4 x RCONN + 2 x RCABLE ) ] − (0.1A x N PORTS x RSWITCH ) − VPCB Where RCONN = Resistance of connector contacts (two contacts per connector) RCABLE = Resistance of upstream cable wires (one 5V and one GND) RSWITCH = Resistance of power switch (90mΩ typical for RT9715) VPCB = PCB voltage drop The USB specification defines the maximum resistance per contact (RCONN) of the USB connector to be 30mΩ and the drop across the PCB and switch to be 100mV. This basically leaves two variables in the equation: the resistance of the switch and the resistance of the cable. If the hub consumes the maximum current (I I) of 500mA, the maximum resistance of the cable is 90mΩ. The resistance of the switch is defined as follows : R SWITCH = { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x 90mΩ) ] − VPCB } ÷( 0.1A x NPORTS ) = (200mV − VPCB ) ÷( 0.1A x NPORTS ) If the voltage drop across the PCB is limited to 100mV, the maximum resistance for the switch is 250mΩ for four ports ganged together. The RT9715, with its maximum 100mΩ on-resistance over temperature, can fit the demand of this requirement. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The
DS9715-03 April 2011www.richtek.com Outline Dimension A e b B D C H L SOT-23-5 Surface Mount Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.889 1.295 0.035 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.356 0.559 0.014 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024
DS9715-03 April 2011 www.richtek.com A BJ F H M C D I 8-Lead SOP Plastic Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.050 0.254 0.002 0.010 J 5.791 6.200 0.228 0.244 M 0.400 1.270 0.016 0.050
DS9715-03 April 2011www.richtek.com L D E E1 e A b Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.810 1.100 0.032 0.043 A1 0.000 0.150 0.000 0.006 A2 0.750 0.950 0.030 0.037 b 0.220 0.380 0.009 0.015 D 2.900 3.100 0.114 0.122 e 0.650 0.026 E 4.800 5.000 0.189 0.197 E1 2.900 3.100 0.114 0.122 L 0.400 0.800 0.016 0.031 8-Lead MSOP Plastic Package
DS9715-03 April 2011 www.richtek.com Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringemen t of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed b y Richtek. Richtek Technology Corporation Taipei Office (Marketing) 5F, No. 95, Minchiuan Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)86672399 Fax: (8862)86672377 Email: marketing@richtek.com Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 2.950 3.050 0.116 0.120 D2 2.100 2.350 0.083 0.093 E 2.950 3.050 0.116 0.120 E2 1.350 1.600 0.053 0.063 e 0.650 0.026 L 0.425 0.525 0.017 0.021 W-Type 8L DFN 3x3 Package 1 122 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options D E A L be SEE DETAIL A