RT9618 RICHTEK | Alldatasheet
Document overview
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Technical content
Features
zzzzz Drives Two N-Channel MOSFETs zzzzz Adaptive Shoot-Through Protection zzzzz Embedded Boot Strapped Diode zzzzz Support High Switching Frequency zzzzz Fast Output Rise Time zzzzz Small SOP-8 Package zzzzz Tri-State Input for Bridge Shutdown zzzzz Supply Under Voltage Protection zzzzz Upper MOSFET Direct Shorted Protection zzzzz RoHS Compliant and 100% Lead (Pb)-Free
Applications
z Core Voltage Supplies for Desktop, Motherboard CPU z High Frequency Low Profile DC-DC Converters z High Current Low Voltage DC-DC Converters Synchronous-Rectified Buck MOSFET Drivers General Description The RT9618/A is a high frequency, dual MOSFET driver specifically designed to drive two power N-Channel MOSFETs in a synchronous-rectified buck converter topology. This driver combined with Richtek’s series of Multi-Phase Buck PWM controller form a complete core- voltage regulator solution for advanced micro-processors. The RT9618/A drives both the lower/upper gate in a synchronous-rectifier bridge with 12V. This drive-voltage flexibility provides the advantage of optimizing applications involving trade-offs between switching losses and conduction losses. RT9618A has longer UGATE/LGATE deadtime which can drive the MOSFETs with large gate RC value, avoiding the shoot-through phenomenon. RT9618 is targeted to drive low gate RC MOSFETs and performs better efficiency. The output drivers in the RT9618/A can efficiently switch power MOSFETs at frequency up to 500kHz. Switching frequency above 500kHz has to take into account the thermal dissipation of SOP-8 package. RT9618/A is capable to drive a 3nF load with a 30ns rise time. RT9618/ A implements bootstrapping on the upper gate with an external capacitor an d an embedded diode. This reduces implementation complexity and allows the use of higher performance, cost effective N-Channel MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs from conducting simultaneously. Pin Configurations (TOP VIEW) SOP-8
Ordering Information
Note : RichTek Pb-free and Green products are : \RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. \Suitable for use in SnPb or Pb-free soldering processes. \`100% matte tin (Sn) plating. RT9618/A Package Type S : SOP-8 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commer- cial Standard) Long Dead Time Short Dead Time
DS9618/A-04 March 2007www.richtek.com Functional Pin Description Pin No. Pin Name Pin Function 1 BOOT Floating bootstrap supply pin for upper gate drive. 2 PWM Input PWM signal for controlling the driver. 3 OD Output Disable. When low, both UGATE and LGATE are driven low and the normal operation is disabled. 4 VCC +12V Supply Voltage. 5 LGATE Lower Gate Drive Output. Connected to gate of low-side power N-Channel MOSFET. 6 PGND Common Ground.
7 PHASE Connected this pin to the source of the high-side MOSFET and the drain of the low-side
MOSFET. 8 UGATE Upper Gate Drive Output. Connected to gate of high-side power N-Channel MOSFET. Typical Application Circuit VCC PWM PGND BOOT UGATE PHASE LGATE RT9618/A 1uF 2.2 Q1ATX_12V 1uF PWM 3.3nF 1uH 2200uF 2200uF 10uF 10uF 2.2uH 1000uF 1000uF 10uF 10uF1000uF10uF10uF ATX_12V VCORE 2.2 3 OD C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 R4 R5 VIN +5V
DS9618/A-04 March 2007 www.richtek.com Function Block Diagram Timing Diagram PWM UGATE LGATE tpdhUGATE tpdlLGATE tpdlUGATE tpdhLGATE 90% 90% 2V 2V Shoot-Through Protection Turn Off Detect Shoot-Through Protection Input Disable VCC PWM Internal BOOT UGATE PHASE LGATE PGND R R VCC POR OD
DS9618/A-04 March 2007www.richtek.com
Electrical Characteristics
Recommended Operating Conditions (Note 3) Parameter Symbol Test Conditions Min Typ Max Units VCC Supply Voltage Power Supply Voltage VCC 7.3 -- 13.5 V VCC Supply Current Power Supply Current IVCC V BOOT = 12V, PWM = 0V -- 1 2.5 mA Power-On Reset POR Threshold VVCCrth V CC Rising 5.5 6.4 7.3 V Hysteresis VVCChys -- 2.2 -- V To be continued (Recommended Operating Conditions, T A = 25°C unless otherwise specified) Absolute Maximum Ratings (Note 1) z BOOT to GND z PHASE to GND z LGATE z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 4) z ESD Susceptibility (Note 2)
DS9618/A-04 March 2007 www.richtek.com Parameter Symbol Test Conditions Min Typ Max Units PWM Input Maximum Input Current IPWM PWM = 0V or 5V -- 300 -- μA PWM Floating Voltage VPWMfl V CC = 12V -- 2.4 -- V PWM Rising Threshold VPWMrth 3.2 3.6 3.9 V PWM Falling Threshold VPWMfth 1.1 1.3 1.5 V Output Disable Input OD Rising Threshold V ODrth 1.5 1.8 2.1 V OD Hysteresis V ODhys -- 0.5 -- V Timing UGATE Rise Time t rUGATE V CC = 12V, 3nF load -- 27 35 ns UGATE Fall Time t fUGATE V CC = 12V, 3nF load -- 32 45 ns LGATE Rise Time t rLGATE V CC = 12V, 3nF load -- 35 45 ns LGATE Fall Time t fLGATE V CC = 12V, 3nF load -- 27 38 ns RT9618 -- 20 -- RT9618A tpdhUGATE -- 90 -- tpdlUGATE VBOOT − VPHASE= 12V See Timing Diagram -- 15 -- tpdhLGATE -- 20 -- Propagation Delay RT9618/A tpdlLGATE See Timing Diagram -- 8 -- ns Output UGATE Drive Source R UGATEsr V BOOT − VPHASE= 12V -- 1.9 3 Ω UGATE Drive Sink R UGATEsk V BOOT − VPHASE= 12V -- 1.4 3 Ω LGATE Drive Source R LGATEsr V CC = 12V -- 1.9 3 Ω LGATE Drive Sink R LGATEsk V CC = 12V -- 1.1 2.2 Ω Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θ JA is measured in the natural convection at T A = 25 °C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard.
DS9618/A-04 March 2007www.richtek.com Typical Operating Characteristics Time (25ns/Div) PWM to Drive Waveform PHASE (10V/Div) UGATE (20V/Div) PWM (5V/Div) LGATE (10V/Div) No Load Time (25ns/Div) PWM to Drive Waveform PHASE (10V/Div) UGATE (20V/Div) PWM (5V/Div) LGATE (10V/Div) No Load Dead Time Time (20ns/Div) 30A/CH PHASE LGATE UGATE (5V/Div) Dead Time Time (20ns/Div) 30A/CH PHASE LGATE UGATE (5V/Div) High side MOSFET : FR3707Z x 1, Low side MOSFET : LR8113 x 2 Time (1 μs/Div) Drive Enable PHASE (10V/Div) UGATE (20V/Div) LGATE (10V/Div) No Load OD (2V/Div) PHASE (10V/Div) UGATE (20V/Div) LGATE (10V/Div) Drive Disable Time (1 μs/Div) No Load OD (2V/Div)
DS9618/A-04 March 2007 www.richtek.com Dead Time Time (20ns/Div) No Load PHASE LGATE UGATE (5V/Div) Dead Time Time (20ns/Div) No Load PHASE LGATE UGATE (5V/Div) (5V/Div) Short Pulse Time (20ns/Div) IOUT = 119A to 24A PHASELGATE UGATE Internal Diode I-V Curve 0.00 0.01 0.02 0.03 0.04 0.05 0.06 Voltage (V) Current (A)
DS9618/A-04 March 2007www.richtek.com
Application Information
The RT9618/A is designed to drive both high side and low side N-Channel MOSFET through externally input PWM control signal. It has power-on protection function which held UGATE and LGATE low before VCC up across the rising threshold voltage. After the initialization, the PWM signal takes the control. The rising PWM signal first forces the LGATE signal turns low then UGATE signal is allowed to go high just after a non-overlapping time to avoid shoot- through current. The falling of PWM signal first forces UGATE to go low. When UGATE and PHASE signal reach a predetermined low level, LGATE signal is allowed to turn high. The PWM signal is acted as "High" if above the rising threshold and acted as "Low" if below the falling threshold. Any signal level enters and remains within the shutdown window is considered as "tri-state", the output drivers are disabled and both MOSFET gates are pulled and held low. If left the PWM signal floating, the pin will be kept around 2.4V by the internal divider and provide the PWM controller with a recognizable level. OD pin will also shutdown the bridge of tied to GND. The RT9618/A typically operates at frequency of 200kHz to 500kHz. It shall be noted that to place a 1N4148 or schottky diode between the VCC and BOOT pin as shown in the typical application circuit for ligher efficiency. Non-overlap Control To prevent the overlap of the gate drives during the UGATE turn low and the LGATE turn high, the non-overlap circuit monitors the voltages at the PHASE node and high side gate drive (UGATE-PHASE). When the PWM input signal goes low, UGATE begins to turn low (after propagation delay). Before LGATE can turn high, the non-overlap protection circuit ensures that the monitored voltages have gone below 1.2V. Once the monitored voltages fall below 1.2V, LGATE begins to turn high. For short pulse condtion, if the PHASE pin had not gone high after LGATE turns low, the LGATE has to wait for 200ns before turn high. By waiting for the voltages of the PHASE pin and high side gate drive to fall below 1.2V, the non-overlap protection circuit ensures that UGATE is low before LGATE turns high. In Figure 1, the current I g1 and Ig2 are required to move the gate up to 12V. The operation consists of charging C gd and Cgs. Cgs1 and Cgs2 are the capacitances from gate to source of the high side and the low side power MOSFETs, respectively. In general data sheets, the C gs is referred as "Ciss" which is the input capacitance. Cgd1 and Cgd2 are the capacitances from gate to drain of the high side and Figure 1. Equivalent Circuit and Associated Waveforms UGATE is allowed to go high.
Figure 6. Two-Phase Synchronous Buck Converter Circuit of Q1, Q2, L2 should be very close. short to decrease the noise of the driver output signals. to the pins of the IC as possible.
DS9618/A-04 March 2007www.richtek.com Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com Outline Dimension A BJ F H M C D I 8-Lead SOP Plastic Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.050 0.254 0.002 0.010 J 5.791 6.200 0.228 0.244 M 0.400 1.270 0.016 0.050