RT9591 RICHTEK | Alldatasheet
Document overview
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Technical content
Features
zzzzz 1.8V to 6.5V Battery Input Voltage Range zzzzz Charges Any Size Photoflash Capacitor zzzzz Adjustable Input Current zzzzz Uses Standard Transformers zzzzz Adjustable Output Voltage zzzzz Charge Complete Indicator zzzzz Built-in IGBT Driver for IGBT Application zzzzz Built-in Voltage Detector zzzzz 16-Lead VQFN Package zzzzz RoHS Compliant and 100% Lead (Pb)-Free Pin Configurations
Applications
Ordering Information
The RT9591 is a highly integrated photoflash charging solution in digital and film cameras. It is targeted for applications that use either two AA batteries or a single lithium-ion battery. The RT9591 integrates a constant current controller for charging high voltage photoflash capacitor quickly and efficiently, an IGBT driver for igniting flash tube, and a voltage detector. Only a few external components are used to reduce PCB space and cost. RT9591 is available in VQFN-16L 3x3 package. (TOP VIEW) Smart Photoflash Capacitor Charger with IGBT Driver VQFN-16L 3x3 Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail. Note : Richtek Pb-free and Green products are : \RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. \Suitable for use in SnPb or Pb-free soldering processes. \`100% matte tin (Sn) plating. RT9591 Package Type QV : VQFN-16L 3x3 (V-Type) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commer- cial Standard) FB DRVOUT GND EXT PGND VDOUT IMCD VDRV 13141516 8765 FBVD VDD CHARGE STAT GNDDRV VBAT CS DRVIN GND
Figure 3. Photoflash Capacitor Charger Application with Center-Tap Transformer
DS9591-07 August 2007www.richtek.com Patent Pending Function Block Diagram Functional Pin Description Pin No. Pin Name Pin Function 1 FB Feedback Voltage Pin. 2 PGND Power Ground. 3 EXT Output Pin for driving external NMOS on Flyback topology. 4 GND Ground. 5 VDD Power Input Pin of RT9591.
6 CHARGE
Charge Enable Pin, the charge function is executed when CHARGE pin is set from Low to High. And the RT9591 gets into Shutdown mode when CHARGE pin is set to Low. 7 STAT Charge Status Output. Open Drain output. When target output voltage is reached, N-MOSFET turns off. This pin needs a pull up resistor. 8 FBVD Voltage Detector Feedback Pin. 9 VDOUT Voltage Detector Output Pin, Open Drain output. 10 IMCD Minimum Current Detection Pin. 11 VDRV IGBT Driver Power Pin. 12 DRVOUT IGBT Driver Output Pin. 13 GNDDRV IGBT Driver Ground Pin. 14 DRVIN IGBT Driver Input Pin. 15 CS Input Current Setting Pin. 16 VBAT Battery Supply Voltage Input Pin. Exposed Pad (17) GND The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Ω RQ S One Shot + - RQ S HV Detector One Shot Charging Block Enable Latch Chip Enable Voltage Detector 1.0V Reference IGBT Driver DRVIN FBVD CHARGE CS VDD GND GNDDRV DRVOUT VDRV STAT VDOUT FB IMCD Driver 3.6 36mV VBAT Charging Block Latch EXTConstant Peak Current Control VDD PGND
DS9591-07 August 2007 www.richtek.com Patent Pending Absolute Maximum Ratings (Note 1) z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance z ESD Susceptibility (Note 2)
Electrical Characteristics
(VDD = 3.3V, VVDRV = 3.3V, TA = 25°C, Unless Otherwise specification) To be continued Parameter Symbol Test Conditions Min Typ Max Units VDD Operating Voltage V DD 1.8 -- 6.5 V VDD UVLO Rising -- 1.6 1.8 V VDD UVLO Hysteresis 30 60 -- mV VBAT Voltage Rising V BAT(MIN) -- 1.6 1.81 V VBAT UVLO Hysteresis 190 300 -- mV FB Voltage V FB 0.96 0.98 1 V 1.8V< VDD < 3V -- -- 8 mV Line Regulation |ΔVFB| 3V < VDD < 6.5V -- -- 7 mV Switch-Off Current I VDD_SW_OFF V FB = 1.1V -- 1 10 uA Switch-Off Current I VBAT_SW_OFF VFB = 1.1V -- 0.01 1 uA Shutdown Current IVDD+IVBAT IOFF Charge pin = 0V, V DD = 4.5V -- 0.01 1 uA Minimum Current on Secondary Side IIMCD 8 10 12 mA EXT On Resistance to VDD V DD = 3.3V -- 3 6 Ω EXT On Resistance to GND V DD = 3.3V -- 3 6 Ω STAT On Resistance to GND V DD = 3.3V -- 16 19 Ω
DS9591-07 August 2007www.richtek.com Patent Pending Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. VDRV is the IGBT gate driving power. Therefore, setting VDRV voltage must consider IGBT gate threshold voltage, and its driving capability. Parameter Symbol Test Conditions Min Typ Max Units Charge Input High Threshold -- 0.7 1.3 V Charge Input Low Threshold 0.4 0.7 -- V Minimum Off Time VBAT = 1.8V to 6.5V VDD = 1.8V to 6.5V 280 360 430 ns IGBT Driver IGBT Driver Supply Voltage V VDRV 2.0 -- 5.5 V DRVIN Input High Threshold -- 1.0 1.3 V DRVIN Input Low Threshold 0.4 1 -- V DRVOUT On Resistance to VVDRV V VDRV = 3.3V -- 6 8 Ω DRVOUT On Resistance to GND V VDRV = 3.3V -- 6 8 Ω Propagation Delay (Rising) -- -- 20 ns Propagation Delay (Falling) VBAT = 1.8V to 6.5V VDD = 1.8V to 6.5V VVDRV = 2V to 6.5V(Note 3) -- -- 200 ns Voltage Detector Voltage Detector Trip (Falling) V FBVD FBVD Falling 0.96 0.99 1.02 V VDOUT On Resistance to GND V DD = 3.3V -- 16 19 Ω
DS9591-07 August 2007 www.richtek.com Patent Pending Typical Operating Characteristics Output Voltage vs. Temperature 250 260 270 280 290 300 310 320 330 340 350 -50 -25 0 25 50 75 100 125 Temperature (℃) Output Voltage (V) (°C) Charge Time vs. VBAT (100uF COUT) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 VBAT (V) Charge Time (s) 1 VOUT = 0V to 300V COUT = 100uF VDD = 3.3V IPK-PRI = 1A IPK-PRI = 1.5A Charge Time vs. VBAT (47uF COUT) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VBAT (V) Charge Time (s) VOUT = 0V to 300V COUT = 47uF VDD = 3.3V IPK-PRI = 1A IPK-PRI = 1.5A Efficiency vs. Output Voltage 50 100 150 200 250 300 Output Voltage (V) Efficiency (%) ) VIN = 5V IPK-PRI = 1.5A COUT = 100uFVIN = 3.3V VDD = VBAT = VIN VIN = 1.8V VIN = 2.5V Output Voltage vs. Input Voltage 250 260 270 280 290 300 310 320 330 340 350 Input Voltage (V) Output Voltage (V) VDD = VIN VBAT = V IN TA = 25°C VOUT set 300V Secondary Minimum Current vs. Temperature 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 -50 -25 0 25 50 75 100 125 Temperature Secondary Minimum Current (mA) (°C)
DS9591-07 August 2007www.richtek.com Patent Pending Time (1s/Div) STAT (2V/Div)Output Voltage (100V/Div) STAT & Output Voltage Time (1us/Div) VSW (10V/Div) IPRI (1A/Div) VSW & Primary Current VOUT = 300V VSW is the drain-to-source voltage of NMOS. Time (1us/Div) VSW (10V/Div) IPRI (1A/Div) VOUT = 100V VSW & Primary Current VSW is the drain-to-source voltage of NMOS. Time (1us/Div) VSW (10V/Div) ISEC (50mA/Div) VSW & Secondary Current VOUT = 300V VSW is the drain-to-source voltage of NMOS. Time (1us/Div) VSW (10V/Div) ISEC (50mA/Div) VOUT = 100V VSW & Secondary Current VSW is the drain-to-source voltage of NMOS.
DS9591-07 August 2007 www.richtek.com Patent Pending Adjustable Output Voltage The RT9591 senses output voltage by a voltage divider connecting to the anode of the rectifying diode during OFF time. This eliminates power loss at voltage-sensing circuit when charging completed. R3 to (R1+R2) ratio determines the output voltage as shown in the application circuit Figure1. The feedback reference voltage is 0.98V. If VOUT = 300V, in Figure 1 Photoflash Capacitor Charger Application according to the following equation: OUT FB R1+ R2 R1+ R2V = V (1+ ), so = 305 R3 R3 Figure 7 Adjustable Input Current The RT9591 simply adjusts peak primary current by a resistor RCS connecting to CS pin as shown in Function Block Diagram. RCS paralleled with internal 1MΩ resistor determines the ON time of primary NMOS. During the ON time, the primary current ramps linearly with a slope = VBAT/LPRI. Consequently, the current setting resister (RCS) could be calculated as: Where IPK-PRI is the primary peak current and N is the turns ratio of transformer. Users could select appropriate RCS according to the battery capability and required charging time. Minimum IPK-PRI Limitation where 430 x 10-9 is the maximum value of minimum off time. If lower IPK-PRI setting limitation is required, you may change transformer to incease N x LPRI product. Output Voltage (100V/Div) Time (1s/Div) Input Average Current (500mA/Div) Input Average Current & Output Voltage VBAT = 3.3V CIN = 10uF R3 is recommend 1KΩ; R1 and R2 are used 150KΩ for reducing parasitic capacitance coupling effect of FB pin. R1 and R2 MUST be greater than 0805 size resister for enduring secondary HV. Lower Charging Current at Low Battery Voltage The RT9591 integrates a voltage detector with open drain output. This voltage detector is specially designed for lowering peak primary current and minimizing the impact to battery voltage at low V BAT condition as shown in Figure 8. The voltage detector senses VBAT through a resister divider R6 and R7 and compares it with internal 1V reference voltage. When the sensed voltage is lower than the reference voltage, VDOUT pin goes low and changes the resistance connecting to CS pin and the ON time. For exa mple, if R6 equal 1.5MΩ and R7equal 1MΩ, VDOUT pin change status form open to ground when VBAT voltage under 2.5V. And current setting resister R4 and R5 can set different resistance for different input current when V BAT voltage under detector voltage. Figure 9 shows the lower charging current waveform. When V BAT voltage under 2.5V, the input average current become approximately 600mA to 460mA. )( Ra1M Ra x 1M R 10 x 30 L x N) x 10 x 8 (I Ra CS 12- PRI-3PRI-PK Ω−= , L x N x V10 x 430 must setting I The PRI OUT-9 PRI-PK ≥
DS9591-07 August 2007 www.richtek.com Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com Outline Dimension A D E L be SEE DETAIL A Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.800 1.000 0.031 0.039 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 1.300 1.750 0.051 0.069 E 2.950 3.050 0.116 0.120 E2 1.300 1.750 0.051 0.069 e 0.500 0.020 L 0.350 0.450 0.014 0.018 V-Type 16L QFN 3x3 Package Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2