RT9218 RICHTEK | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 18

Technical content

Features

zzzzz Operating with 5V or 12V Supply Voltage zzzzz Drives All Low Cost N-MOSFETs zzzzz Voltage Mode PWM Control zzzzz 300kHz Fixed Frequency Oscillator zzzzz Fast Transient Response : \\\\\High-Speed GM Amplifier \\\\\Full 0 to 100% Duty Ration zzzzz Internal Soft-Start zzzzz Power Good Indicator zzzzz Adaptive Non-Overlapping Gate Driver zzzzz Over-Current Fault Monitor on MOSFET, No Current Sense Resistor Required zzzzz Specific power good indicator for Intel® Grantsdale FSB_VTT power sequence zzzzz RoHS Compliant and 100% Lead (Pb)-Free 5V/12V Synchronous Buck PWM DC-DC and Linear Power Controller General Description The RT9218 is a dual output with one synchronous buck PWM and one linear controller. The part is proposed to generate logic-supply voltages for PC based systems. The high-performance device includes internal soft-start, frequency-compensation networks, power good signaling with specific sequence, and it comes all of the logic control, output adjustment, power monitoring and protection functions into a small footprint package. The part is operated at fixed 300kHz frequeny providing an optimum compromise between efficiency, external component size, and cost. The linear controller is implemented to drive an external MOSFET for regulation and it's adjustable by setting external resistors. Moreover the specific internal PGOOD sequence and indicator is also implemented to conform to Intel ® new platform requirement on FSB_VTT power plane. An adjustable over-current protection (OCP) is proposed to monitor the voltage drop across the RDS(ON) of the lower MOSFET for synchronous buck PWM DC-DC controller.

Ordering Information

Applications

z Motherboard, Desktop Servers z IA Equipments z Telecomm Equipments z High Power DC-DC Regulators Pin Configurations (TOP VIEW) SOP-14 NC DRV GND UGATE NC OPS LGATE NC FBL PGOOD BOOT FB PHASE VCC 4 11 7 8 Note : RichTek Pb-free and Green products are : \RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. \Suitable for use in SnPb or Pb-free soldering processes. \`100% matte tin (Sn) plating. Package Type S : SOP-14 RT9218 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commer- cial Standard)

DS9218-08 March 2007www.richtek.com Typical Application Circuit 2%)(0.8V voltage reference Internal:V )R2 R1(1VLV )R6 R5(1VSV REF REFOUT REFOUT +×= +×= RT9218 PHASE OPSUGATE BOOT GND LGATE FB FBL NC 8 DRV 6 NC NC VCC 12V PGOOD VCC

12 Disable

0.1uF1N4148 3904 ROCSET 1000uF x 2 32R 68R 1k/NC 0.1uF/NC8k 470uF 2.2uH 1uF 10R C7C1 to C2 C3 to C4 MU MLC5 to C6 D1 C8 C10 C11R4 2.2 RBOOT 2.2 RUGATE R C

DS9218-08 March 2007 www.richtek.com Functional Pin Description UGATE (Pin 2) Upper gate driver output. Connect to gate of the high- side power N-MOSFET. This pin is monitored by the adaptive shoot-through protection circuitry to determine when the upper MOSFET has turned off. BOOT (Pin 1) Bootstrap supply pin for the upper gate driver. Connect the bootstrap capacitor between BOOT pin and the PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. PHASE (Pin 14) Connect this pin to the source of the upper MOSFET and the drain of the lower MOSFET. OPS (OCSET, POR and Shut-Down) (Pin 13) This pin provides multi-function of the over-current setting, UGATE turn-on POR sensing, and shut-down features. Connecting a resistor (R OCSET) between OPS and PHASE pins sets the over-current trip point. Pulling the pin to ground resets the device and all external MOSFETs are turned off allowing the output voltage power rails to float. This pin is also used to detect V IN in power on stage and issues an internal POR signal. LGATE (Pin 4) Lower gate drive output. Connect to gate of the low-side power N-MOSFET. This pin is monitored by the adaptive shoot-through protection circuitry to determine when the lower MOSFET has turned off. FB (Pin 12) Switcher feedback voltage. This pin is the inverting input of the error amplifier. FB senses the switcher output through an external resistor divider network. VCC (Pin 11) Connect this pin to a well-decoupled 5V or 12V bias supply. It is also the positive supply for the lower gate driver, LGATE. GND (Pin 3) Both signal and power ground for the IC. All voltage levels are measured with respect to this pin. Ties the pin directly to the low-side MOSFET source and ground plane with the lowest impedance. DRV (Pin 5) Connect this pin to the base/gate of an external transistor/ MOSFET. This pin provides the drive for the linear regulator's pass transistor/MOSFET. FBL (Pin 9) Linear regulator feedback voltage. This pin is the inverting input of the error amplifier and protection monitor. Connect this pin to the external resistor divider network of the linear regulator. PGOOD (Pin 10) PGOOD is an open-drain output used to indicate that the regulator is within normal operating voltage ranges and it's implemented with a specific sequence as following chart. NC (Pin 6,7,8) No internal connection.

DS9218-08 March 2007www.richtek.com Timing Diagram Specific Power Sequence for LDO 90% 80% 1-10ms <1ms FSB_VTT (1.2V @ 5Amp) VTT_GD Function Block Diagram Gate Control Logic Oscillator (300k/600kHz) EO UV_L GM 0.64V DRV GND UGATE OPS LGATE FBL PGOOD BOOT FB PHASE VCC Soft-Start Fault Logic UV_S+ 0.64V + VCC 0.8VREF Power On ResetReferenceBias & Regulators (3V_Logic & 3VDD_Analog) 1.5V 0.15V PH_M EN OC 0.4V 40uA VCC

DS9218-08 March 2007 www.richtek.com

Electrical Characteristics

(VCC = 5V/12V, TA = 25°C, unless otherwise specified) Absolute Maximum Ratings (Note 1) z PHASE to GND z BOOT to GND z Package Thermal Resistance (Note 4) z ESD Susceptibility (Note 2) Parameter Symbol Test Conditions Min Typ Max Units VCC Supply Current Nominal Supply Current ICC UGATE and LGATE Open -- 6 15 mA Power-On Reset POR Threshold VCCRTH VCC Rising -- 4.1 4.5 V Hysteresis VCCHYS 0.35 0.5 -- V Switcher Reference Reference Voltage VREF VCC = 12V 0.784 0.8 0.816 V Oscillator Free Running Frequency fOSC VCC = 12V 250 300 350 kHz Ramp Amplitude ΔVOSC -- 1.5 -- VP-P To be continued Recommended Operating Conditions (Note 3)

DS9218-08 March 2007www.richtek.com Parameter Symbol Test Conditions Min Typ Max Units Error Amplifier (GM) E/A Transconductance gm -- 0.2 -- ms Open Loop DC Gain AO -- 90 -- dB Linear Regulator DRV Driver Source IDS V DRV = 6V -- 1.4 -- mA Reference Voltage VREFREG VCC = 12V 0.784 0.8 0.816 V PWM Controller Gate Drivers (VCC = 12V) Upper Gate Source IUGATE VBOOT − VPHASE = 12V VUGATE − VPHASE = 6V 0.6 1 -- A Upper Gate Sink RUGATE VBOOT − VPHASE = 12V VUGATE − VPHASE = 1V -- 4 -- Ω Lower Gate Source ILGATE V CC = 12V, VLGATE = 6V 0.6 1 -- A Lower Gate Sink RLGATE V CC = 12V, VLGATE = 1V -- 3 4 Ω Dead Time TDT -- -- 100 ns Protection FB Under-Voltage Trip ΔFBUVT FB Falling 70 75 80 % FBL Under-Voltage Trip ΔFBLUVT FB and FBL Falling 70 75 80 % OC Current Source IOC V PHASE = 0V -- 40 -- μA Soft-Start Interval TSS -- 3.5 -- ms Power Good Power Good Rising Threshold VCC = 12V -- 90 -- % Power Good Hysteresis VCC = 12V -- 10 -- % PG Sink Capability VCC = 12V, 1mA -- 0.2 0.4 V Power Good Rising Delay VCC = 12V 1 3 10 ms Power Good Falling Delay VCC = 12V -- 15 -- us Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θ JA is measured in the natural convection at T A = 25 °C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard.

DS9218-08 March 2007 www.richtek.com Typical Operating Characteristics POR vs. Temperature 3.5 3.75 4.25 4.5 4.75 -40 -10 20 50 80 110 140 Temperature POR Rising or Falling (V) Falling Rising Efficiency vs. Output Current 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 0 5 10 15 20 25 Output Current (A) Efficiency(%) VCC = 5V VIN = 5V OCP Time (5us/Div) IL (10V/Div) (10A/Div) UGATE VCC = 12V, V IN = 5V IOCSET= 20A ROCSET = 15kΩ Efficiency vs. Output Current 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 0 5 10 15 20 25 Output Current (A) Efficiency(%) VCC = 12V VIN = 5V (VOUT = 2.5V, unless otherwise specified ) Reference Voltage vs. Temperature 0.798 0.8 0.802 0.804 0.806 0.808 0.81 0.812 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature Reference Voltage (V) (°C) VCC = 12V VIN = 5V Frequency vs. Temperature 250 270 290 310 330 350 -40 -10 20 50 80 110 140 Temperature Frequency (kHz ) (°C) Falling Rising (°C)

DS9218-08 March 2007www.richtek.com Dead Time (Falling) Time (10ns/Div) UGATE LGATE PHASE VCC = 12V VIN = 5V IOUT= 25A Dead Time (Rising) Time (25ns/Div) UGATE LGATE PHASE VCC = V IN = 5V IOUT= 25A Power On Time (500us/Div) IOUT UGATE (10V/Div) (500mV/Div) (2A/Div) SVOUT Power Off Time (5ms/Div) UGATE SVOUT VCC VIN VCC Switching Time (10ms/Div) VCC IOUT UGATE (20V/Div) (10V/Div) (100mV/Div) (10A/Div) SVOUT VCC = 12Vto 5V IOUT= 10A VIN = 5V VCC Switching Time (10ms/Div) VCC IOUT UGATE (20V/Div) (10V/Div) (100mV/Div) (10A/Div) SVOUT VCC = 5V to 12V IOUT= 10A, VIN = 5V

DS9218-08 March 2007 www.richtek.com Transient Response (Falling) Time (25us/Div) L = 2.2uH C = 2000uF VCC = V IN = 12V IOUT= 15A to 0A f = 1/20ms SR = 2.5A/us SVOUT (100mV/Div) IL (10A/Div) UGATE (10V/Div) Transient Response (Rising) Time (5us/Div) SVOUT (100mV/Div) IL (10A/Div) UGATE (10V/Div) L = 2.2uH C = 2000uF VCC = V IN = 12V IOUT= 0A to 15A f = 1/20ms, SR = 2.5A/us Soft Start & PGOOD Time (10ms/Div) IL PGOOD (1V/Div) (500mV/Div) (2A/Div) SVOUT

DS9218-08 March 2007www.richtek.com OPS (Over Current Setting, VIN_POR and Shutdown) 1.OCP Sense the low-side MOSFET's RDS(ON) to set over-current trip point. Connecting a resistor (ROCSET) from this pin to the source of the upper MOSFET and the drain of the lower MOSFET sets the over-current trip point. ROCSET, an internal 40μA current source, and the lower MOSFET on resistance, RDS(ON), set the converter over-current trip point (IOCSET) according to the following equation : OPS pin function is similar to RC charging or discharging circuit, so the over-current trip point is very sensitive to parasitic capacitance (ex. shut-down MOSFET) and the duty ratio. Below Figures say those effect. And test conditions are Rocset = 15k Ω (over -current trip point = 20.6A), Low-side MOSFET is IR3707. OCP Time (5 μs/Div) UGATE (10V/Div) IL (10A/Div) OPS (200mV/Div) VIN = 5V, VCC = 12V VOUT = 1.5V OCP Time (2.5 μs/Div) UGATE (10V/Div) IL (10A/Div) VIN = 12V, VCC = 12V VOUT = 1.5V OPS (200mV/Div) OCP Time (2.5 μs/Div) UGATE (10V/Div) IL (10A/Div) VIN = 12V, VCC = 12V VOUT = 1.5V OCP Time (5 μs/Div) UGATE (10V/Div) IL (10A/Div) VIN = 5V, VCC = 12V VOUT = 1.5V MOSFET lower the of 0.4VR40uAI DS(ON) OCSET OCSET R −×=

path is broken, the converter is operated in the open loop. the converter follows the ramp input, SSE (SS − VGS). Figure 6. OCP and VIN_POR actions

DS9218-08 March 2007www.richtek.com

DS9218-08 March 2007 www.richtek.com According to our test experience, you must still notice two items to avoid noise coupling : 1.The ground plane should not be separated. 2.V CC rail adding the LC filter is recommended.

DS9218-08 March 2007www.richtek.com Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com Outline Dimension A B F J D C I H M Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 8.534 8.738 0.336 0.344 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 14–Lead SOP Plastic Package