RT9146ZQW

RT9146_13 RICHTEK | Alldatasheet

Document overview

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Technical content

Features

zzzzz Rail-to-Rail Output Swing zzzzz Supply Voltage : 6V to 20V zzzzz Peak Output Current : 1A zzzzz High Slew Rate : 35V/μμμμμs zzzzz Unity Gain Stable zzzzz RoHS Compliant and Halogen Free NC VIN- VS- NC VS+ VOUT NC VIN+ VS- WQFN-16L 4x4 RT9147 NC NC VS+ NC NC NC VOUTA VINA- VINB- VINB+ VINA+ VS- NC NC NC VOUTB 5678 1316 1415 VS- RT9147 Package Type QW : WQFN-16L 4x4 Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) RT9146 Package Type QW : WDFN-8L 3x3 QWA : WDFN-8SL 3x3 Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) 43 : Product Code YMDNN : Date Code Marking Information RT9146ZQW 85 YM DNN 85 : Product Code YMDNN : Date Code RT9147ZQW 43 YM DNN RT9146ZQWA 2W : Product Code YMDNN : Date Code2W YM DNN

DS9146/7-03 May 2013www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. RT9146 Pin No. WDFN-8L 3x3 WDFN-8SL 3x3 Pin Name Pin Function 1, 5, 8 NC No Internal Connection. 2 VIN − Negative Input. 3 VIN+ Positive Input. 9 (Exposed Pad) VS− Negative Supply Input. The exposed pad must be soldered to a large PCB and connected to VS− for maximum power dissipation. 6 VOUT Output. 7 VS+ Positive Supply Input. Bypass VS+ to VS − with a 0.1 μF capacitor placed as close as possible to the device. RT9147 Pin No. Pin Name Pin Function 1, 2, 4, 5, 6, 13, 15, 16 NC No Internal Connection. 3 VS+ Positive Supply Input. Bypass VS+ to VS − with a 0.1 μF capacitor placed as close as possible to the device. 7 VOUTA Output of Amplifier A. 8 VINA − Positive Input of Amplifier A. 9 VINA+ Negative Input of Amplifier A. 10, 17 (Exposed Pad) VS− Negative Supply Input. The exposed pad must be soldered to a large PCB and connected to VS− for maximum power dissipation. 11 VINB+ Positive Input of Amplifier B. 12 VINB − Negative Input of Amplifier B. 14 VOUTB Output of Amplifier B. Functional Pin Description Typical Application Circuit VS+ VS- VINx+ VINx- VOUTx VS+ RS* TFT-LCD Capacitance * : RS may be needed for some applications.

DS9146/7-03 May 2013 www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Function Block Diagram VS+ VS- VOUTA VINA- VINA+ + VOUTB VINB- VINB+ RT9146 RT9147 VIN- VIN+ VS+ VOUT VS-

DS9146/7-03 May 2013www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Recommended Operating Conditions (Note 4) Absolute Maximum Ratings (Note 1) z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 2) z ESD Susceptibility (Note 3) (VS+ = 16V, VS− = 0V, VINx+ = VOUTx = VS+ / 2, TA = 25°C, unless otherwise specified)

Electrical Characteristics

Parameter Symbol Test Conditions Min Typ Max Unit Input Characteristics Input Offset Voltage V OS V CM = VS+ / 2 -- 2 15 mV Input Bias Current I B V CM = VS+ / 2 -- 2 50 nA IOUTx = 0 to −80mA -- 0.1 -- Load Regulation ΔVLOAD IOUTx = 0 to 80mA -- −0.1 -- mV/mA Common Mode Input Range CMIR 0.5 -- VS+ −0.5 V Common Mode Rejection Ratio CMRR 0.5V ≤ VOUTx ≤ VS+ − 0.5V -- 95 -- dB Open Loop Gain A VOL 0.5V ≤ VOUTx ≤ VS+ − 0.5V -- 118 -- dB

DS9146/7-03 May 2013 www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured at T A = 25 °C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Parameter Symbol Test Conditions Min Typ Max Unit Output Characteristics Output Swing Low V OL I L = −50mA -- 0.6 1.5 V Output Swing High V OH I L = 50mA VS+ − 1.5 VS+ − 0.3 -- V Transient Peak Output Current IPK 800 1000 1400 mA Power Supply Power Supply Rejection Ratio PSRR V S+ = 6V to 20V, VCM = VOUTx = VS+ / 2 -- 96 -- dB Quiescent Current I DD No Load -- 4 -- mA Dynamic Performance Slew Rate SR 4V step, 20% to 80%, A V = 1 -- 35 -- V/ μs Setting to ±0.1% (AV = 1) t S AV = 1, VOUTx = 2V step RL = 10kΩ, CL = 10pF -- 270 -- ns −3dB Bandwidth BW R L = 10kΩ, CL = 10pF -- 16 -- MHz Gain-Bandwidth Product GBWP R L = 10kΩ, CL = 10pF -- 12 -- MHz Phase Margin PM R L = 10kΩ, CL = 10pF -- 50° -- -- Thermal Shutdown Temperature TS Temperature Rising -- 150 -- °C Thermal Shutdown Hysteresis ΔTS -- 20 -- °C

DS9146/7-03 May 2013www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Operating Characteristics Rail to Rail Time (25 μs/Div) VIN+ (4V/Div) VOUT (4V/Div) Unity Gain, VIN+ = 0.5V to 15.5V, VS+ = 16V, VS− = 0V, f = 10kHz Input Offset Voltage vs. Temperature -50 -25 0 25 50 75 100 125 Temperature (°C) Input Offset Voltage (mV) Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V Supply Current vs. Temperature -50 -25 0 25 50 75 100 125 Temperature (°C) Supply Current (mA) Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V Input Offset Voltage vs. Supply Voltage -1.5 -1.0 -0.5 0.0 6 8 10 12 14 16 18 20 Supply Voltage (V) Input Offset Voltage (mV) Unity Gain, VIN+ = VS+ / 2, VS+ = 6V to 20V, V S− = 0V Supply Current vs. Supply Voltage 6 8 10 12 14 16 18 20 Supply Voltage (V) Supply Current (mA) Unity Gain, VIN+ = VS+ / 2, VS+ = 6V to 20V, V S− = 0V Output Voltage Swing vs. Supply Voltage -0.6 -0.4 -0.2 0.0 0.2 0.4 6 8 10 12 14 16 18 20 Supply Voltage (V) Output Voltage Swing (V ) VS+ = 6V to 20V, V S− = 0V Swing Low, V IN+ = 0V, VIN− = 3V, ILOAD = −50mA Swing High, V IN+ = 3V, VIN− = 0V, ILOAD = 50mA

DS9146/7-03 May 2013 www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Small Signal Response Time (2.5 μs/Div) VIN+_ac coupled (100mV/Div) Unity Gain, VIN+ = 7.9V to 8.1V, VS+ = 16V, VS− = 0V, f = 100kHz VOUT_ac coupled (100mV/Div) Large Signal Response Time (2.5 μs/Div) Unity Gain, VIN+ = 6V to 10V, VS+ = 16V, VS− = 0V, f = 100kHz VIN+_ac coupled (2V/Div) VOUT_ac coupled (2V/Div) Slew Rate Time (50ns/Div) VIN+ (5V/Div) Unity Gain, VIN+ = 4V to 8V, VS+ = 16V, VS− = 0V, f = 10kHz VOUT (5V/Div) Rising Slew Rate Time (50ns/Div) Unity Gain, VIN+ = 8V to 4V, VS+ = 16V, VS− = 0V, f = 10kHz VIN+ (5V/Div) VOUT (5V/Div) Falling Gain Bandwidth Product Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V, RL = 10kΩ, CL = 10pF Unity Gain, VIN+ = 8V, VS+ = 16V, VS− = 0V, RL = 10kΩ, CL = 10pF

©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Figure 1. Derating Curve of Maximum Power Dissipation 10kΩ resistance and 10pF capacitance. directly shorted to positive/negative supply rails. The RT9146/7 is mainly designed for LCD V-com buffer. on the maximum power dissipation.

DS9146/7-03 May 2013 www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Layout Consideration PCB layout is very important for designing power converter circuits. The following layout guidelines should be strictly followed for best performance of the RT9146/7. \ Place the power components as close to the IC as possible. The traces should be wide and short, especially for the high current loop. \ A series resistance may be needed at the output for some applications. \ Connect a 0.1μF capacitor from VINx+ to ground and place it as close to the IC as possible for better performance. \ The exposed pad of the chip should be connected to a large PCB plane for maximum thermal consideration.

DS9146/7-03 May 2013www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Outline Dimension Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 2.950 3.050 0.1 16 0.120 D2 2.100 2.350 0.083 0.093 E 2.950 3.050 0.1 16 0.120 E2 1.350 1.600 0.053 0.063 e 0.650 0.026 L 0.425 0.525 0.017 0.021 W-Type 8L DFN 3x3 Package 1 122 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options D E A L be SEE DETAIL A

DS9146/7-03 May 2013 www.richtek.com ©Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. W-Type 8SL DFN 3x3 Package Min. Max. Min. Max. A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 2.900 3.100 0.114 0.122 D2 2.250 2.350 0.089 0.093 E 2.900 3.100 0.114 0.122 E2 1.450 1.550 0.057 0.061 e L 0.300 0.400 0.012 0.016 Symbol Dimensions In Millimeters Dimensions In Inches 0.650 0.026 1 122 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options

DS9146/7-03 May 2013www.richtek.com Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. A D E L be SEE DETAIL A Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.250 0.380 0.010 0.015 D 3.950 4.050 0.156 0.159 D2 2.000 2.450 0.079 0.096 E 3.950 4.050 0.156 0.159 E2 2.000 2.450 0.079 0.096 e 0.650 0.026 L 0.500 0.600 0.020 0.024 W-Type 16L QFN 4x4 Package Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2