RT8800

RT8800 RICHTEK | Alldatasheet

Document overview

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Technical content

Features

zzzzz 5V Power Supply Voltage zzzzz 2/3-Phase Power Conversion with Automatic Phase Selection (RT8800 : 2/3-Phase, RT8800B : 2-Phase) zzzzz Output Voltage Controlled by External Reference Voltage zzzzz Precise Core Voltage Regulation zzzzz Power Stage Thermal Balance by DCR Current Sensing zzzzz Extreme Low-Cost, Lossless Time Sharing Current Sensing zzzzz Internal Soft-start zzzzz Hiccup Mode Over-Current Protection zzzzz Over-Voltage Protection zzzzz Adjustable Operating Frequency and Typical at 300kHz Per Phase zzzzz Power Good indication zzzzz Small 16-Lead VQFN Package (For RT8800 only) zzzzz RoHS Compliant and 100% Lead (Pb)-Free

Applications

z Low Output Voltage, High power density DC-DC Converters z Voltage Regulator Modules General Purpose 2/3-Phase PWM Controller for High-Density Power Supply Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area.

Ordering Information

Note : Richtek products are : \ RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. \ Suitable for use in SnPb or Pb-free soldering processes. Package Type QV : VQFN-16L 3x3 (V-Type) S : SOP-16 Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) RT8800/B 2-Phase 2/3-Phase

DS8800/B-08 April 2011www.richtek.com Pin Configurations (TOP VIEW) VQFN-16L 3x3 RT8800 SOP-16 RT8800B Functional Pin Description DACFB Negative input of internal buffer amplifier for reference voltage regulation. The pin voltage is locked at internal VREF = 0.8V by properly close the buffer amplifier feedback loop. DACQ The pin is defined as the output of internal buffer amplifier for reference voltage regulation. FB The pin is defined as the inverting input of internal error amplifier. DVD The pin is defined as a programmable power UVLO detection input. Trip threshold = 0.8V at VDVD rising. COMP The pin is defined as the output of the error amplifier and the input of all PWM comparators. PI The pin is defined as the positive input of the error amplifier. RT Switching frequency setting. Connect this pin to GND with a resistor to set the frequency. ICOMMON Common negative input of current sense amplifiers for all three channels. PGOOD Output power-good indication. The signal is implemented as an output signal with open-drain type. ISP1 , ISP2 , ISP3 Current sense positive inputs for individual converter channel current sense. PWM1 , PWM2 , PWM3 PWM outputs for each phase switching drive. VDD Chip power supply. Connect this pin to a 5V supply. GND Chip power ground. Exposed Pad (17) (RT8800) The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. DACFB ISP1 PGOOD ISP3 ISP2 DVD FB DACQ ICOMMON COMP PI RT PWM1 VDD PWM3 PWM2 13141516 8765 GND VDD DACFB DACQ FB DVD COMP PI RT ICOMMON GND PGOOD ISP2 ISP1 N/C PWM1 PWM2

DS8800/B-08 April 2011 www.richtek.com Typical Application Circuit (Note : The inductor’ s DCR value must be large than 0.3m Ω : X7R/R-type capacitor is required for all time constant setting capacitor of DCR sensing.) BOOT1 UGATE1 PHASE1 LGATE1 VDD PVCC PWM1 PWM2 RT9602 UGATE2 PHASE2 LGATE2 BOOT2 GND PGND SS12/SM 101uF 12V 1uF PHB83N03LT PHB95N03LT 1uF2200uF 12V PHB83N03LT PHB95N03LT 1uF2200uF SS12/SM 1uF VCORE 3.3nF 2.2 2.2 3.3nF 0.5uH 0.5uH 1uH PHASE2 PHASE1 10uF x 4 1000uF x 12 PHASE2 PHASE1 PI DACQ DACFB PGOOD PWM2 ISP2 FB COMP VDD PWM1 RT DVD ICOMMON ISP1 VID0 VID2 VID3 VID4 VID1 VID5 3.3V 12V VCORE 6 5 15k 10nF 33pF Optional Optional 1uF 1uF 430 16k27k 10k 1.8k 110k 56k 27k 13k 6.8k 3.3k R R RT8800B 5.1k GND 10 Optional for R & C 1uF 1000uF Optional RDROOP RICOMMON1RICOMMON2 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 C10 C11 C12 C13 C14 C15 C16 C17 C18 to C29 C30 to C33 Figure A. 2-phase with resistive DAC

DS8800/B-08 April 2011www.richtek.com PHASE3 PHASE2 PHASE1 PI DACQ DACFB PGOOD PWM3 PWM2 ISP3 ISP2 FB COMP VDD PWM1 RT DVD ICOMMON ISP1 VID0 VID2 VID3 VID4 VID1 VID5 3.3V 12V VCORE 5 4 GND 15k 10nF 33pF 4.7uF Optional Optional Optional 1uF 1uF 1uF 430 3k 16k 27k 10k 1.8k 110k 56k 27k 13k 6.8k 3.3k R R R RT8800 5.1k BOOT2 PWM3 PWM2 PWM1 BOOT1 LGATE3 PVCC3 PHASE3 UGATE3 BOOT3 UGATE2 PVCC2 PHASE2 LGATE2 NC UGATE1 PVCC1 PHASE1 LGATE1 VDD 12V 5VSB PHASE1 VIN PHASE2 VCORE PHASE3 12 4 2 2 2 3 20211917 GND 12V 12V 12V VIN 12V 1uF1000uF 1uH 01uF 1uF 1uF 3.3nF 2.2 1uF 01uF 0 3.3uF2.2 0.5uH 0.5uH 0.5uH 1uF 3.3nF 2.2 1uF 10uF x 4 1000uF x 12 RT9605 1500uF x 4 12V VIN Optional Optional RDROOP RICOMMON1RICOMMON2 R10 R11 R12 R13 R14 R15 R16 R17 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 C8 C9 C10 to C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 to C35 C36 to C39 Q1 Q2 Q4 Q5 Figure B. 3-phase with resistive DAC

DS8800/B-08 April 2011 www.richtek.com PHASE3 PHASE2 PHASE1 PI DACQ DACFB PGOOD PWM3 PWM2 ISP3 ISP2 FB COMP VDD PWM1 RT DVD ICOMMON ISP1 3.3V 12V VCORE 5 4 GND 15k 10nF 33pF 4.7uF Optional Optional Optional 1uF 1uF 1uF 430 3k 16k 27k 10k 5.1k R R R RT8800 BOOT2 PWM3 PWM2 PWM1 BOOT1 LGATE3 PVCC3 PHASE3 UGATE3 BOOT3 UGATE2 PVCC2 PHASE2 LGATE2 NC UGATE1 PVCC1 PHASE1 LGATE1 VDD 12V 5VSB PHASE1 VIN PHASE2 VCORE PHASE3 12 4 2 2 2 3 20211917 GND 12V 12V 12V VIN 12V 1uF1000uF 1uH 01uF 1uF 1uF 3.3nF 2.2 1uF 01uF 0 3.3uF2.2 0.5uH 0.5uH 0.5uH 1uF 3.3nF 2.2 1uF 10uF x 4 1000uF x 12 RT9605 1500uF x 4 12V VIN Optional Optional RDROOP RICOMMON1RICOMMON2 5.1k 10nF RT9401A/B VID1 VDD VID0 VID3 VDA GND VID2 VID4 4 5 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 C9 C10 C11 to C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 to C36 C37 to C40 Q1 Q2 Q4 Q5 Figure C. 3-phase with RT9401A/B DAC generator

DS8800/B-08 April 2011www.richtek.com Function Block Diagram Oscillator Ramp Generator ++ Sample & Hold PWM1 PWM2 PWM3 OCP SUM/N & OCP Detection PGOOD DVD GND Soft Start - ICOMMON ISP1 ISP2 ISP3 PWM Logic & Driver PWMCP PWM Logic & Driver PWMCP PWM Logic & Driver PWMCP Mux MuxSample & Hold Sample & Hold VDD FB EA GM COMP 0.8V VREF PI Buffer Amplifier INH INH INH Power On Reset RT MAJ 500mV OVP DACFB DACQ

DS8800/B-08 April 2011 www.richtek.com VID5 VID4 VID3 VID2 VID1 VID0 Nominal Output Voltage (V) 1 1 1 1 1 1 1.0800 1 1 1 1 1 0 1.1000 0 1 1 1 1 0 1.1125 1 1 1 1 0 1 1.1250 0 1 1 1 0 1 1.1375 1 1 1 1 0 0 1.1500 0 1 1 1 0 0 1.1625 1 1 1 0 1 1 1.1750 0 1 1 0 1 1 1.1875 1 1 1 0 1 0 1.2000 0 1 1 0 1 0 1.2125 1 1 1 0 0 1 1.2250 0 1 1 0 0 1 1.2375 1 1 1 0 0 0 1.2500 0 1 1 0 0 0 1.2625 1 1 0 1 1 1 1.2750 0 1 0 1 1 1 1.2875 1 1 0 1 1 0 1.3000 0 1 0 1 1 0 1.3125 1 1 0 1 0 1 1.3250 0 1 0 1 0 1 1.3375 1 1 0 1 0 0 1.3500 0 1 0 1 0 0 1.3625 1 1 0 0 1 1 1.3750 0 1 0 0 1 1 1.3875 1 1 0 0 1 0 1.4000 0 1 0 0 1 0 1.4125 1 1 0 0 0 1 1.4250 0 1 0 0 0 1 1.4375 1 1 0 0 0 0 1.4500 0 1 0 0 0 0 1.4625 1 0 1 1 1 1 1.4750 0 0 1 1 1 1 1.4875 1 0 1 1 1 0 1.5000 0 0 1 1 1 0 1.5125 1 0 1 1 0 1 1.5250 0 0 1 1 0 1 1.5375 1 0 1 1 0 0 1.5500 Table. Output Voltage Program To be continued

DS8800/B-08 April 2011www.richtek.com VID5 VID4 VID3 VID2 VID1 VID0 Nominal Output Voltage (V) 0 0 1 1 0 0 1.5625 1 0 1 0 1 1 1.5750 0 0 1 0 1 1 1.5875 1 0 1 0 1 0 1.6000 1 0 1 0 0 1 1.6250 1 0 1 0 0 0 1.6500 1 0 0 1 1 1 1.6750 1 0 0 1 1 0 1.7000 1 0 0 1 0 1 1.7250 1 0 0 1 0 0 1.7500 1 0 0 0 1 1 1.7750 1 0 0 0 1 0 1.8000 1 0 0 0 0 1 1.8250 1 0 0 0 0 0 1.8500 Table. Output Voltage Program Note: 1 : Open 0 : VSS or GND

DS8800/B-08 April 2011 www.richtek.com Absolute Maximum Ratings (Note 1) z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 2) z ESD Susceptibility (Note 3)

Electrical Characteristics

(VDD = 5V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit VDD Supply Current Nominal Supply Current IDD PWM 1,2,3 Open -- 5 -- mA Power On Reset Rising 4.0 4.2 4.5 VDD Threshold Hysteresis 0.2 0.5 -- V DVD Rising Threshold 0.75 0.8 0.85 V DVD Hysteresis -- 65 -- mV Oscillator Free Running Frequency fOSC R RT = 16kΩ 170 200 230 kHz Frequency Adjustable Range fOSC_ADJ 50 -- 400 kHz Ramp Amplitude ΔVOSC R RT = 16kΩ -- 1.7 -- V Ramp Valley VRV -- 1.0 -- V Maximum On-Time of Each Channel 62 66 75 % Minimum On-Time of Each Channel -- 120 -- ns RT Pin Voltage VRT R RT = 16kΩ 0.77 0.82 0.87 V Recommended Operating Conditions (Note 4) To be continued

DS8800/B-08 April 2011www.richtek.com Parameter Symbol Test Conditions Min Typ Max Unit Reference Voltage Reference Voltage VDACFB 0.79 0.8 0.81 V DACFB Sourcing Capability -- -- 10 mA Error Amplifier DC Gain -- 65 -- dB Gain-Bandwidth Product GBW C L = 10pF -- 10 -- MHz Slew Rate SR C L = 10pF -- 8 -- V/ μs Current Sense GM Amplifier Recommended Full Scale Source Current -- 100 -- μA OCP trip level I OC P 160 190 220 μA Protection Over-Voltage Trip (VFB - VDACQ) -- 500 -- mV Power Good PGOOD Output Low Voltage V PGOOD I PGOOD = 4mA -- -- 0.2 V PGOOD Delay T PGOOD_Delay 90% * V OUT to PGOOD_H 4 -- 8 ms Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θ JA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions.

DS8800/B-08 April 2011 www.richtek.com Typical Operating Characteristics VREF vs. Temperature 0.78 0.785 0.79 0.795 0.8 0.805 0.81 0.815 -25 -10 5 20 35 50 65 80 95 110 125 Temperature VREF(V) (°C) GM3 GM2 GM1 RICOMMON1 = 430 Ω Frequency vs. RRT 100 200 300 400 500 600 700 800 900 1000 0 5 10 15 20 25 30 35 40 45 50 55 60 RRT (kٛ) Frequency (kHz) (kΩ) Load Line 1.24 1.26 1.28 1.3 1.32 1.34 1.36 1.38 1.4 0 1 02 03 04 05 06 07 08 09 0 1 0 0 Output Current (A) Output Voltage (V) RLL = 1.5mΩ, RICOMMON2 = 10kΩ, RDROOP = 100Ω VIN = 12V Efficiency vs. Output Current 100 0 1 02 03 04 05 06 07 08 09 0 1 0 0 Output Current (A) Efficiency (%) Driver RT9605 VIN = 12V, V OUT = 1.4V GM 0 1 02 03 04 05 06 07 08 09 0 1 0 0 1 1 0 VC (mV) IADJ (uA) GM3 GM2 GM1 RICOMMON1 = 430 Ω (°C) OCP Trip Point vs. Temperature 120 150 180 210 240 - 2 5 - 1 05 2 03 55 06 58 09 5 Temperature Ix (uA)

DS8800/B-08 April 2011www.richtek.com Frequency vs. Temperature 100 150 200 250 300 350 -25 -10 5 20 35 50 65 80 95 110 125 Temperature Frequency (kHz) (°C) RRT = 16kΩ Time (2.5 μs/Div) Load Transient Response UGATE1 (20V/Div) VCORE (200mV/Div) UGATE2 (20V/Div) UGATE3 (20V/Div) phase 1, IOUT = 5A to 85A @SR = 93A/us) Time (2.5 μs/Div) Load Transient Response UGATE1 (20V/Div) VCORE (200mV/Div) UGATE2 (20V/Div) UGATE3 (20V/Div) phase 3, IOUT = 5A to 85A @SR = 93A/us) Time (10ms/Div) Over Current Protection IL1+IL2 (50A/Div) VCORE (1V/Div) PWM1 (10V/Div) VCOMP (2V/Div) Short While Turn_On Time (10ms/Div) Over Current Protection IL1+IL2 (50A/Div) VCOMP (2V/Div) PWM1 (10V/Div) VCORE (1V/Div) Short After Turn_On Time (2.5 μs/Div) Load Transient Response UGATE1 (20V/Div) VCORE (200mV/Div) UGATE2 (20V/Div) UGATE3 (20V/Div) phase2, IOUT = 5A to 85A @SR = 93A/us)

DS8800/B-08 April 2011 www.richtek.com Time (10 μs/Div) VID On the Fly Rising IOUT = 5A VFB (200mV/Div) VID0 (2V/Div) PWM (5V/Div) VCORE (200mV/Div) Time (10 μs/Div) VID On the Fly Rising IOUT = 90A VFB (200mV/Div) VID0 (2V/Div) PWM (5V/Div) VCORE (200mV/Div) Time (25 μs/Div) VID On the Fly Falling VFB (200mV/Div) VID0 (2V/Div) PWM (5V/Div) VCORE (50mV/Div) IOUT = 90A Time (25 μs/Div) VID On the Fly Falling VFB (200mV/Div) VID0 (2V/Div) PWM (5V/Div) VCORE (100mV/Div) IOUT = 5A

DS8800/B-08 April 2011www.richtek.com

Application Information

RT8800/B are multiphase DC/DC controllers for extreme low cost applications that precisely regulate CPU core voltage and balance the current of different power channels using time sharing current sensing method. The converter consisting of RT8800/B and its companion MOSFET driver RT96xx series provide high quality CPU power and all protection functions to meet the requirement of modern VRM. Phase Setting and Converter Start Up RT8800/B interface with companion MOSFET drivers (like RT9602, RT9603, and RT9605) for correct converter initialization. RT8800/B will sense the voltage on PWM pins at the instant of POR rising. If the voltage is smaller than (V DD − 1.2V) the related channel is activated. Tie the PWM to VDD and the corresponding current sense pins to GND or left float if the channel is unused. For example, for 2-Channel application, tie PWM3 to V DD and ISP3 to GND (or let ISP3 open). PGOOD Function and Soft Start To indicate the condition of multiphase converter, RT8800/B provide PGOOD signal through an open drain connection. The output becomes high impedance after internal SS ramp > 3.5V. 1) Mode 1 (SS< Vramp_valley) Initially the COMP stays in the positive saturation. When SS< V RAMP_Valley, there is no non-inverting input available to produce duty width. So there is no PWM signal and V OUT is zero. 2) Mode 2 (VRAMP_Valley< SS< Cross-over) When SS>VRAMP_Valley, SS takes over the non-inverting input and produce the PWM signal and the increasing duty width according to its magnitude above the ramp signal. The output follows the ramp signal, SS. However while VOUT increases, the difference between VOUT and SSE(SS − V GS) is reduced and COMP leaves the saturation and declines. The takeover of SS lasts until it meets the COMP. During this interval, since the feedback path is broken, the converter is operated in the open loop. 3) Mode3 ( Cross-over< SS < V GS + VREF) When the Comp takes over the non-inverting input for PWM Amplifier and when SSE (SS − VGS) < VREF, the output of the converter follows the ramp input, SSE (SS − VGS). Before the crossover, the output follows SS signal. And when Comp takes over SS, the output is expected to follow SSE (SS − V GS). Therefore the deviation of V GS is represented as the falling of VOUT for a short while. The COMP is observed to keep its decline when it passes the cross-over, which shortens the duty width and hence the falling of VOUT happens. Since there is a feedback loop for the error amplifier, the output’ s response to the ramp input, SSE (SS − VGS) is lower than that in Mode 2. 4) Mode 4 (SS > VGS + VREF) When SS > VGS + VREF, the output of the converter follows the desired VREF signal and the soft start is completed now. Voltage Control The voltage control loop consists of error amplifier, multiphase pulse width modulator, driver and power components. As conventional voltage mode PWM controller, the output voltage is locked at the positive input of error amplifier and the error signal is used as the control signal of pulse width modulator. The PWM signals of different channels are generated by comparison of EA output and split-phase sawtooth wave. Power stage transforms V IN to output by PWM signal on-time ratio. Output Voltage Program The output voltage of a RT8800/B converter is programmed to discrete levels between 1.08V and 1.85V. The voltage identification (V ID) pins program an external voltage reference (DACQ) with a 6-bit digital-to-analog converter (DAC). The level of DACQ also sets the OVP threshold. The output voltage should not be adjusted while the converter is delivering power. Remove input power before COMP VCORE SSE_Internal SS_Internal Cross-over VRAMP_Valley

separate them from sensitive nodes. differencial pair, and 20 mil gap to other phase pair. Figure 22. Power Stage Ripple Current Path

1. Switching ripple current path:

a. Input capacitor to high side MOSFET. b. Low side MOSFET to output capacitor. c. The return path of input and output capacitor. d. Separate the power and signal GND. copper thickness and avoiding of via.

1. MOSFET driver should be closed to MOSFET.

DS8800/B-08 April 2011www.richtek.com Figure 27

DS8800/B-08 April 2011 www.richtek.com Outline Dimension A D E L be SEE DETAIL A Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.800 1.000 0.031 0.039 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.1 16 0.120 D2 1.300 1.750 0.051 0.069 E 2.950 3.050 0.1 16 0.120 E2 1.300 1.750 0.051 0.069 e 0.500 0.020 L 0.350 0.450 0.014 0.018 V-Type 16L QFN 3x3 Package Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2

DS8800/B-08 April 2011www.richtek.com Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property inf ringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications i s assumed by Richtek. Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 5F, No. 95, Minchiuan Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)86672399 Fax: (8862)86672377 Email: marketing@richtek.com F B C I H D A J M Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 9.804 10.008 0.386 0.394 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 16–Lead SOP Plastic Package