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Technical content

Features

 Support Connected Standby Mode for Ultrabook  CCRCOT Control with 100ns Load Step Response  PWM Maximum Duty Ratio > 98%  5V to 25V Input Voltage Range  Dual Adjustable Output :  5V/3.3V LDOs with 100mA Output Current  1% Accuracy on 3.3V LDO Output  Oscillator Driving Output for Charge Pump Application  Internal Frequency Setting  500kHz/600kHz (CH1/CH2)  Internal Soft-Start and Soft-Discharge  4700ppm/°°°°°C RDS(ON) Current Sensing  Independent Switcher Enable Control  Built in OVP/UVP/OCP/OTP  Power Good Indicator  20-Lead WQFN Package  RoHS Compliant and Halogen Free Dual-Channel Synchronous DC/DC Step-Down Controller with 5V/3.3V LDOs RT8249D PHASE1 LGATE1 BOOT1 UGATE1 VIN PHASE2 LGATE2 BOOT2 UGATE2 FB2 VIN BYP1 FB1 PGOOD LDO3 EN1 3.3V VOUT2 VOUT1 Channel 1 Enable EN2Channel 2 Enable LDO5 5V PGOOD Indicator CS1 CS2 GND Off On

DS8249D-00 May 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Pin Description

Ordering Information

Note : ***Empty means Pin1 orientation is Quadrant 1 Richtek products are :  RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020.  Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations (TOP VIEW) Marking Information WQFN-20L 3x3 FB2 LDO3 CS1 FB1 LGATE1 BYP1 VIN LDO5 EN2 PGOOD BOOT2 EN1 SKIPSEL BOOT1 PHASE1 UGATE1 CS2 LGATE2 UGATE2 PHASE2 17181920 9876 GND 115

Applications

 Notebook and Sub-Notebook Computers  System Power Supplies  3-Cell and 4-Cell Li+ Battery-Powered Devices RT8249D Package Type QW : WQFN-20L 3x3 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) Pin 1 Orientation*** (2) : Quadrant 2, Follow EIA-481-D 9N= : Product Code YMDNN : Date Code RT8249DGQW 9N=YM DNN Pin No. Pin Name Pin Function

1 CS1

Current Limit Setting. Connect a resistor to GND to set the threshold for Channel 1 synchronous R DS(ON) sense. The GND  PHASE1 current limit threshold is 1/8th the voltage seen at CS1 over a 0.2V to 2V range. There is an internal 50A current source from LDO5 to CS1. 2 FB1 Feedback Voltage Input for Channel 1. Connect FB1 to a resistive voltage divider from VOUT1 to GND to adjust output from 2V to 5.5V. 3 LDO3 3.3V Linear Regulator Output. It is always on when VIN is higher than VINPOR threshold. 4 FB2 Feedback Voltage Input for Channel 2. Connect FB2 to a resistive voltage divider from VOUT2 to GND to adjust output from 2V to 4V.

5 CS2

Current Limit Setting. Connect a resistor to GND to set the threshold for Channel 2 synchronous R DS(ON) sense. The GND  PHASE2 current limit threshold is 1/8th the voltage seen at CS2 over a 0.2V to 2V range. There is an internal 50A current source from LDO5 to CS2. 6 EN2 Enable Control Input for Channel 2. 7 PGOOD Power Good Indicator Output for Channel 1 and Channel 2. (Logical AND)

8 PHASE2

Switch Node of Channel 2 MOSFETs. PHASE2 is the internal lower supply rail for the UGATE2 high-side gate driver. PHASE2 is also the current-sense input for the Channel 2. 9 BOOT2 Bootstrap Supply for Channel 2 High-Side Gate Driver. Connect to an external capacitor according to the typical application circuits. 10 UGATE2 High-Side Gate Driver Output for Channel 2. UGATE2 swings between PHASE2 and BOOT2.

DS8249D-00 May 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Pin No. Pin Name Pin Function 11 LGATE2 Low-Side Gate Driver Output for Channel 2. LGATE2 swings between GND and LDO5. 12 VIN Power Input for 5V and 3.3V LDO Regulators and Buck Controllers. 13 LDO5 5V Linear Regulator Output. LDO5 is also the supply voltage for the low-side MOSFET and analog supply voltage for the device. 14 BYP1 Switch-over Source Voltage Input for LDO5. 15 LGATE1 Low-Side Gate Driver Output for Channel 1. LGATE1 swings between GND and LDO5. 16 UGATE1 High-Side Gate Driver Output for Channel 1. UGATE1 swings between PHASE1 and BOOT1. 17 BOOT1 Bootstrap Supply for Channel 1 High-Side Gate Driver. Connect to an external capacitor according to the typical application circuits.

18 PHASE1

Switch Node of Channel 1 MOSFETs. PHASE1 is the internal lower supply rail for the UGATE1 high-side gate driver. PHASE1 is also the current sense input for the Channel 1.

19 SKIPSEL

PWM Operating Mode Selection. Diode-emulation Mode : Connect to LDO3 Audio Skipping Mode : Short to GND 20 EN1 Enable Control Input for Channel 1. (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Functional Block Diagram Channel 2 Buck Controller BOOT2 UGATE2 PHASE2 LGATE2 GND LDO5 FB2 CS2 PGOOD Channel 1 Buck Controller BOOT1 UGATE1 PHASE1 LGATE1 LDO5 FB1 CS1 LDO5 REF SW5 Threshold VIN LDO5 LDO3 LDO3 BYP1 Power-On Sequence Clear Fault Latch BYP1 SKIPSEL EN1 EN2

DS8249D-00 May 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Operation The RT8249D includes two constant on-time synchronous step-down controllers and two linear regulators. Buck Controller In normal operation, the high-side N-MOSFET is turned on when the output is lower than VREF, and is turned off after the internal one-shot timer expires. While the high- side N-MOSFET is turned off, the low-side N-MOSFET is turned on to conduct the inductor current until next cycle begins. Soft-Start For internal soft-start function, an internal current source charges an internal capacitor to build the soft-start ramp voltage. The output voltage will track the internal ramp voltage during soft-start interval. PGOOD The power good output is an open-drain architecture. When the two channels soft-start are both finished, the PGOOD open-drain output will be high impedance. Current Limit The current limit circuit employs a unique “valley” current sensing algorithm. If the magnitude of the current sense signal at PHASE is above the current limit threshold, the PWM is not allowed to initiate a new cycle. Thus, the current to the load exceeds the average output inductor current, the output voltage falls and eventually crosses the under-voltage protection threshold, inducing IC shutdown. Over-Voltage Protection (OVP) & Under-Voltage Protection (UVP) The two channel output voltages are continuously monitored for over-voltage and under-voltage conditions. When the output voltage exceeds over-voltage threshold (113% of VOUT), UGATE goes low and LGATE is forced high. When it is less than 52% of reference voltage, under- voltage protection is triggered and then both UGATE and LGATE gate drivers are forced low. The controller is latched until ENx is reset or LDO5 is re-supplied. LDO5 and LDO3 When the VIN voltage exceeds the POR rising threshold, LDO3 will default turn-on. The LDO5 can be power on by ENx. The linear regulator LDO5 and LDO3 provide 5V and 3.3V regulated output. Switching Over The BYP1 is connected to the Channel 1 output. After the Channel 1 output voltage exceeds the set threshold (4.66V), the output will be bypassed to the LDO5 output to maximize the efficiency.

DS8249D-00 May 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Absolute Maximum Ratings (Note 1)  BOOTx to GND  BOOTx to PHASEx  PHASEx to GND  UGATEx to GND  UGATEx to PHASEx  LGATEx to GND  Power Dissipation, PD @ TA = 25°C  Package Thermal Resistance (Note 2)  ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4)

DS8249D-00 May 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.

Electrical Characteristics

(VIN = 12V, VEN1 = VEN2 = 3.3V, VCS1 = VCS2 = 2V, No Load, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Supply VIN Power On Reset V IN_POR Rising Threshold -- 4.6 4.9 V Falling Threshold 3.2 3.7 -- VIN Standby Supply Current IVIN_SBY Both Buck Controllers Off, VEN1 = VEN2 = GND -- 20 35 A VIN Quiescent Current I VIN_nosw Both Buck Controllers On, VFBx = 2.05V, VBYP1 = 5.05V -- 15 25 A BYP1 Supply Current I BYP1_nosw Both Buck Controllers On, VFBx = 2.05V, VBYP1 = 5.05V -- 120 180 A Soft-Start Soft-Start Time t SSx V OUT Ramp-up Time -- 0.9 -- ms Buck Controllers Output and FB Voltage FBx Valley Trip Voltage V FBx CCM Operation 1.98 2 2.02 V BYP1 Discharge Current I DCHG_BYP1 V BYP1 = 0.5V 10 45 -- mA PHASEx Discharge Current IDCHG_LX V PHASEx = 0.5V 5 8 -- mA Switching Frequency Switching Frequency f SW x VIN = 20V, VOUT1 = 5V 400 500 600 kHz VIN = 20V, VOUT2 = 3.33V 480 600 720 Minimum Off-Time t OFF(MIN) V FBx = 1.9V -- 200 275 ns Current Sense CSx Source Current I CSx V CSx = 1V 47 50 53 A CSx Current Temperature Coefficient TCICSx In Comparison with 25°C -- 4700 -- ppm/ C Zero-Current Threshold V ZC V FBx = 2.05V, GND  PHASEx -- 1 -- mV Internal Regulator LDO5 Output Voltage V LDO5 VIN = 12V, No Load 4.9 5 5.1 V VIN > 7V, ILDO5 < 100mA 4.8 5 5.1 VIN > 5.5V, ILDO5 < 35mA 4.8 5 5.1 VIN > 5V, ILDO5 < 20mA 4.5 4.75 5.1 LDO3 Output Voltage V LDO3 VIN = 12V, No Load 3.267 3.3 3.333 V VIN > 7V, ILDO3 < 100mA 3.217 3.3 3.383 VIN > 5.5V, ILDO3 < 35mA 3.267 3.3 3.333 VIN > 5V, ILDO3 < 20mA 3.217 3.3 3.383

DS8249D-00 May 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit LDO5 Output Current I LDO5 VLDO5 = 4.5V, VBYP1 = GND, VIN = 7.4V 100 175 -- mA LDO3 Output Current I LDO3 V LDO3 = 3V, VIN = 7.4V 100 175 -- mA LDO5 Switch-over Threshold to BYP1 VSWTH Rising Edge at BYP1 Regulation Point -- 4.66 -- V LDO5 Switch-over Equivalent Resistance RSW LDO5 to BYP1, 10mA -- 1.5 3  SKIP Mode Selection SKIPSEL Input Voltage V SKIPSEL ASM Operation -- -- 0.8 V DEM Operation 1.2 -- -- UVLO LDO5 UVLO Threshold V UVLO5 Rising Edge -- 4.3 4.6 V Falling Edge 3.7 3.9 4.1 LDO3 UVLO Threshold V UVLO3 Channel x Off -- 2.5 -- V Power Good PGOOD Threshold V PGxTH PGOOD Detect, VFBx Rising Edge 84 88 92 Hysteresis -- 8 -- PGOOD Leakage Current High state, V PGOOD = 5.5V -- -- 1 A PGOOD Output Low Voltage I SINK = 4mA -- -- 0.3 V Fault Detection OVP Trip Threshold V OVP FBx with Respect to Internal Reference 109 113 117 % OVP Propagation Delay -- 1 -- s UVP Trip Threshold V UVP UVP Detect, FBx Falling Edge 47 52 57 % UVP Shutdown Blanking Time tSHDN_UVP From ENx Enable -- 1.3 -- ms Thermal Shutdown Thermal Shutdown Threshold TSD -- 150 -- °C Logic Inputs ENx Threshold Voltage VENx_H SMPS On 1.6 -- -- V VENx_L SMPS Off -- -- 0.4 Internal Boost Switch Internal Boost Switch On-Resistance RBST LDO5 to BOOTx -- 80 -- 

DS8249D-00 May 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit Power MOSFET Drivers UGATEx On-Resistance R UG High State, VBOOTx  VUGATEx = 0.25V, VBOOTx  VPHASEx = 5V -- 3 --  Low State, VUGATEx  VPAHSEx = 0.25V, VBOOTx  VPHASEx = 5V -- 2 -- LGATEx On-Resistance R LG High State, VLDO5  VLGATEx = 0.25V, VLDO5 = 5V -- 3 -- Low State, VLGATEx  GND = 0.25V -- 1 -- Dead-Time t d LGATEx Rising -- 20 -- ns UGATEx Rising -- 30 -- Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured at T A = 25 °C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions.

DS8249D-00 May 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Application Circuit C17 3.3V RT8249D PHASE1 LGATE1 BOOT1 UGATE1 VIN12 PHASE2 LGATE2 BOOT2 UGATE2 FB2 VIN 10µF10 C13R8 C10 0.1µF 5.2V to 25V L2C11 0.1µF R9 0 R14 130k L1 C2 C35V 0.1µF R3 0 R12 150k R13 100k R15 200k BYP114 FB12 10µF PGOOD 7 LDO3 3 C16 1µF 3.3V Always On VOUT2 VOUT1 R4 0 R10 0 BSC0909 NS 10µF C12 BSC0909 NS BSC0909 NS 3.3µH R5* C4* 220µF C18* BSC0909 NS R11* C14* 2.2µH 220µF C21* LDO5 13 1µF PGOOD Indicator CS1 1 CS2 5 16k 16k 21 (Exposed Pad)GND EN120Channel 1 Enable EN26Channel 2 Enable Off On SKIPSEL19DEM : 3.3V ASM : GND * : Optional 0.1µF C23

DS8249D-00 May 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Operating Characteristics VOUT1 Efficiency vs. Output Current 100 0.001 0.01 0.1 1 10 Output Current (A) Efficiency (%) DEM, EN1 = LDO3, EN2 = 0V, BYP1 on VIN = 7.4V VIN = 11.1V VIN = 14.8V VIN = 20.5V VOUT2 Efficiency vs. Output Current 100 0.001 0.01 0.1 1 10 Output Current (A) Efficiency (%) DEM, EN1 = 0V, EN2 = LDO3, BYP1 on VIN = 7.4V VIN = 11.1V VIN = 14.8V VIN = 20.5V VOUT1 Switching Frequency vs. Output Current 100 150 200 250 300 350 400 450 0.001 0.01 0.1 1 10 Output Current (A) Switching Frequency (kHz) 1 DEM, EN1 = LDO3, EN2 = 0V, BYP1 on VIN = 19V VIN = 11.1V VIN = 7.4V VOUT2 Switching Frequency vs. Output Current 100 200 300 400 500 600 0.001 0.01 0.1 1 10 Output Current (A) Switching Frequency (kHz) 1 DEM, EN1 = 0V , EN2 = LDO3, BYP1 on VIN = 19V VIN = 11.1V VIN = 7.4V VOUT1 Switching Frequency vs. Input Voltage 100 150 200 250 300 350 400 450 5 7 9 1 11 31 51 71 92 12 32 5 Input Voltage (V) Switching Frequency (kHz) 1 DEM, EN1 = LDO3, EN2 = 0V, IOUT1 = 6A, BYP1 on VOUT2 Switching Frequency vs. Input Voltage 100 150 200 250 300 350 400 450 500 550 5 7 9 1 11 31 51 71 92 12 32 5 Input Voltage (V) Switching Frequency (kHz) 1 DEM, EN1 = 0V, EN2 = LDO3, IOUT2 = 6A, BYP1 on

DS8249D-00 May 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Output Voltage 1 vs. Output Current 4.95 4.96 4.97 4.98 4.99 5.00 5.01 0.001 0.01 0.1 1 10 Output Current (A) Output Voltage (V) DEM, EN1 = LDO3, EN2 = 0V, BYP1 on VIN = 7.4V VIN = 11.1V VIN = 14.8V VIN = 20.5V Output Voltage 2 vs. Output Current 3.29 3.30 3.31 3.32 0.001 0.01 0.1 1 10 Output Current (A) Output Voltage (V) DEM, EN1 = 0V, EN2 = LDO3, BYP1 on VIN = 7.4V VIN = 11.1V VIN = 14.8V VIN = 20.5V VLDO5 vs. ILDO5 5.000 5.002 5.004 5.006 5.008 5.010 5.012 5.014 5.016 5.018 5.020 0 1 02 03 04 05 06 07 08 09 0 1 0 0 ILDO5 (mA) VLDO5 (V) DEM, VIN = 12V, EN1 = LDO3, EN2 = 0V, BYP1 off VLDO3 vs. ILDO3 3.280 3.282 3.284 3.286 3.288 3.290 3.292 3.294 3.296 3.298 3.300 0 1 02 03 04 05 06 07 08 09 0 1 0 0 ILDO3 (mA) VLDO3 (V) DEM, VIN = 12V, EN1 = 0V , EN2 = LDO3, BYP1 off Quiescent Current vs. Input Voltage 5 7 9 1 11 31 51 71 92 12 32 5 Input Voltage (V) Quiescent Current (µA) DEM, EN1 = EN2 = LDO3, BYP1 on BYP1 Supply Current vs. Input Voltage 100 110 120 130 140 150 160 5 7 9 1 11 31 51 71 92 12 32 5 Input Voltage (V) Supply Current (µA) DEM, EN1 = EN2 = LDO3, BYP1 on

DS8249D-00 May 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. DEM, EN1 = EN2 = LDO3 , VIN = 12V , No Load Time (400 μs/Div) Power On from EN VOUT1 (5V/Div) LDO5 (5V/Div) EN (5V/Div) VOUT2 (5V/Div) DEM, EN1 = EN2 = LDO3 , VIN = 12V , No Load Time (20ms/Div) Power Off from EN VOUT1 (5V/Div) LDO5 (5V/Div) EN (5V/Div) VOUT2 (5V/Div) Time (40 μs/Div) VOUT1 Load Transient Response at DEM EN1 = LDO3, EN2 = 0V, VIN = 12V, IOUT1 = 0A to 6A VOUT1 (50mV/Div) IOUT1 (5A/Div) UGATE1 (20V/Div) LGATE1 (5V/Div) Time (40 μs/Div) VOUT1 Load Transient Response at ASM EN1 = LDO3, EN2 = 0V, VIN = 12V, IOUT1 = 0A to 6A VOUT1 (50mV/Div) IOUT1 (5A/Div) UGATE1 (20V/Div) LGATE1 (5V/Div) Time (40 μs/Div) VOUT2 Load Transient Response at DEM EN1 = 0V, EN2 = LDO3, VIN = 12V, IOUT1 = 0A to 6A VOUT1 (50mV/Div) IOUT1 (5A/Div) UGATE1 (20V/Div) LGATE1 (5V/Div) Time (40 μs/Div) VOUT2 Load Transient Response at ASM EN1 = 0V, EN2 = LDO3, VIN = 12V, IOUT1 = 0A to 6A VOUT1 (50mV/Div) IOUT1 (5A/Div) UGATE1 (20V/Div) LGATE1 (5V/Div)

DS8249D-00 May 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (400 μs/Div) VOUT1 UVP DEM, EN1 = EN2 = LDO3 , VIN = 12V VOUT1 (5V/Div) LGATE1 (5V/Div) UGATE1 (20V/Div) IL1 (10A/Div) Time (100 μs/Div) VOUT1 OVP PGOOD (5V/Div) VOUT1 (2V/Div) DEM, EN1 = EN2 = LDO3 , VIN = 12V , No Load LGATE1 (5V/Div)

DS8249D-00 May 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.

Application Information

The RT8249D is a dual-channel, low quiescent, Mach ResponseTM DRVTM mode synchronous Buck controller targeted for Ultrabook system power supply solutions. Richtek's Mach Response TM technology provides fast response to load steps. The topology solves the poor load transient response timing problems of fixed frequency current mode PWMs, and avoids the problems caused by widely varying switching frequencies in CCR (constant current ripple) constant on-time and constant off-time PWM schemes. A special adaptive on-time control trades off the performance and efficiency over wide input voltage range. The RT8249D includes 5V (LDO5) and 3.3V (LDO3) linear regulators. The LDO5 linear regulator steps down the battery voltage to supply both internal circuitry and gate drivers. The synchronous switch gate drivers are directly powered by LDO5. When V OUT1 rises above 4.66V, an automatic circuit disconnects the linear regulator and allows the device to be powered by V OUT1 via the BYP1 pin. PWM Operation The Mach ResponseTM DRVTM mode controller relies on the output filter capacitor's Effective Series Resistance (ESR) to act as a current sense resistor, so that the output ripple voltage provides the PWM ramp signal. Referring to the RT8249D's Function Block Diagram, the synchronous high-side MOSFET is turned on at the beginning of each cycle. After the internal one-shot timer expires, the MOSFET will be turned off. The pulse width of this one- shot is determined by the converter's input output voltages to keep the frequency fairly constant over the entire input voltage range. Another one-shot sets a minimum off-time (200ns typ.). The on-time one-shot will be triggered if the error comparator is high, the low-side switch current is below the current limit threshold, and the minimum off- time one-shot has timed out. PWM Frequency and On-time Control For each specific input voltage range, the Mach Response TM control architecture runs with pseudo constant frequency by feed forwarding the input and output voltage into the on-time one-shot timer. The high-side switch on-time is inversely proportional to the input voltage as measured by V IN and proportional to the output voltage. The inductor ripple current operating point remains relatively constant, resulting in easy design methodology and predictable output voltage ripple. The frequency of 3V output controller is set higher than the frequency of 5V output controller. This is done to prevent audio frequency “ beating ” between the two sides, which switch asynchronously for each side. The RT8249D adaptively changes the operation frequency according to the input voltage. Higher input voltage usually comes from an external adapter, so the RT8249D operates with higher frequency to have better performance. Lower input voltage usually comes from a battery, so the RT8249D operates with lower switching frequency for lower switching losses. For a specific input voltage range, the switching cycle period is given by : For 5V VOUT, where the VIN is in volt. The on-time guaranteed in the Electrical Characteristics table is influenced by switching delays in the external high-side power MOSFET. Operation Mode Selection The RT8249D supports two operation modes : diode emulation mode (DEM) and ultrasonic mode (ASM). The operation mode can be set via the SKIPSEL pin. When the SKIPSEL pin voltage is higher than 1.2V, the RT8249D operates in DEM. When the SKIPSEL pin Voltage is lower than 0.8V, the RT8249D operates in ASM. Diode Emulation Mode In diode emulation mode, the RT8249D automatically reduces switching frequency at light load conditions to maintain high efficiency. This reduction of frequency is achieved smoothly. As the output current decreases from For 3.3V VOUT, IN IN V1 . 6 2Period (usec.) = V3 . 7 9 IN IN V1 . 4 5Period (usec.) = V2 . 5 9

©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. operation. This is normal and results in high efficiency. (especially at low input voltage levels). the inductor current reaches the continuous conduction. signal is “OR”ed with an internal oscillator (>25kHz). turn on UGATE and give it shorter on-time. voltage and switching frequency simultaneously. voltage will be lifted up under the slight load condition. disconnects the internal linear regulator. Figure 1. Boundary Condition of CCM/DEM

DS8249D-00 May 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Thermal Protection The RT8249D features thermal shutdown to prevent damage from excessive heat dissipation. Thermal shutdown occurs when the die temperature exceeds 150°C. All internal circuitries are turned off during thermal shutdown. The RT8249D triggers thermal shutdown if LDO5 is not supplied from V OUT1, while input voltage on VIN and drawing current from LDO5 are too high. Nevertheless, even if LDO5 is supplied from V OUT1, overloading LDO5 can cause large power dissipation on automatic switches, which may still result in thermal shutdown. Discharge Mode (Soft Discharge) When ENx is low the output under-voltage fault latch is set, the output discharge mode will be triggered. During discharge mode, an internal switch creates a path for discharging the output capacitors' residual charge to GND. Standby Mode When VIN rises POR threshold and ENx < 0.4V, RT8249D operate in standby mode, CH1 and CH2 is OFF state. For RT8249D, LDO5 is OFF and LDO3 is ON state and approximately consumes 17μA of input current. Power-Up Sequencing and On/Off Controls (ENx) EN1 and EN2 control the power-up sequencing of the two channels of the Buck converter. The 0.4V falling edge threshold on ENx can be used to detect a specific analog voltage level and to shutdown the device. Once in shutdown, the 1.6V rising edge threshold activates, providing sufficient hysteresis for most applications. Power Good Output (PGOOD) PGOOD is an open-drain output and requires a pull-up resistor. PGOOD is actively held low in soft-start, standby, and shutdown. For RT8249D, PGOOD is released when both output voltages are above 88% of nominal regulation point. The PGOOD signal goes low if either output turns off or is 20% below or 13% over its nominal regulation point. Output Over-Voltage Protection (OVP) The output voltage can be continuously monitored for over- voltage condition. If the output voltage exceeds 13% of its set voltage threshold, the over-voltage protection is triggered and the LGATEx low-side gate drivers are forced high. This activates the low-side MOSFET switch, which rapidly discharges the output capacitor and pulls the output voltage downward. The RT8249D is latched once OVP is triggered and can only be released by either toggling ENx or cycling VIN. There is a 1μs delay built into the over-voltage protection circuit to prevent false transition. Note that latching LGATEx high will cause the output voltage to dip slightly negative due to previously stored energy in the LC tank circuit. For loads that cannot tolerate a negative voltage, place a power Schottky diode across the output to act as a reverse polarity clamp. If the over-voltage condition is caused by a shorted in high-side switch, turning the low-side MOSFET on 100% will create an electrical shorted circuit between the battery and GND to blow the fuse and disconnecting the battery from the output. Output Under-Voltage Protection (UVP) The output voltage can be continuously monitored for under- voltage condition. If the output is less than 52% (typ.) of its set voltage threshold, the under-voltage protection will be triggered and then both UGATEx and LGATEx gate drivers will be forced low. The UVP is ignored for at least 1.3ms (typ.) after a start-up or a rising edge on ENx. Toggle ENx or cycle VIN to reset the UVP fault latch and restart the controller.

©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Table 2. Enabling/PGOOD State Figure 4. RT8249D Timing Table 1. Operation Mode Truth Table Run ENx = high, VOUT1 or VOUT2 are enabled Normal Operation. Protection Either output >113% of the nominal level. LGATEx is forced high. LDO3 and LDO5 are active. Exit by VIN POR or by toggling ENx. Shutdown TJ > 150C All circuitries are off. Exit by VIN POR.

©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. the average inductor current. The calculation above shall serve as a general reference. considered when improving transient response. 5.5V for CH1 and 2V to 4V for CH2, as shown in Figure 5. Figure 5. Setting VOUTx with a resistive voltage divider on the maximum power dissipation.

©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Figure 6. Derating Curve of Maximum Power Dissipation starting a layout with the RT8249D. to high-voltage switching node. 0.65mm (25 mils) or wider trace. feedback trace from power traces and components. inductor, should be as short and wide as possible.

DS8249D-00 May 2016 www.richtek.com Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. Outline Dimension Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 2.900 3.100 0.114 0.122 D2 1.650 1.750 0.065 0.069 E 2.900 3.100 0.114 0.122 E2 1.650 1.750 0.065 0.069 e 0.400 0.016 L 0.350 0.450 0.014 0.018 W-Type 20L QFN 3x3 Package Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2