RT8206A

RT8206A RICHTEK | Alldatasheet

Document overview

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Technical content

Features

zzzzz Wide Input Voltage Range 6V to 25V zzzzz Dual Fixed 5V/3.3V Outputs or Adjustable from 2V to 5.5V, 1.5% Accuracy zzzzz Secondary Feedback Input Maintains Charge Pump Voltage (RT8206A) zzzzz Independent Enable and Power Good zzzzz 5V Fixed LDO Output : 70mA zzzzz 2V Reference Voltage ±±±±±1% : 50uA zzzzz Constant ON-Time Control with 100ns Load Step Response zzzzz Frequency Selectable via TON Setting zzzzz RDS(ON) Current Sensing and Programmable Current Limit zzzzz Selectable PWM, DEM or Ultrasonic Mode zzzzz Internal Soft-Start with 5 Steps Current Limiting and Soft-Discharge zzzzz High Efficiency Up to 97% zzzzz 5mW Quiescent Power Dissipation zzzzz Thermal Shutdown zzzzz RoHS Compliant and Halogen Free

Applications

z Notebook and Sub-Notebook Computers z 3-Cell and 4-Cell Li+ Battery-Powered Devices Package Type QW : WQFN-32L 5x5 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) RT8206 A : With SECFB B : Without SECFB

Figure 1. Fixed Voltage Regulator

Figure 2. Adjustable Voltage Regulator

DS8206A/B-04 March 2011www.richtek.com Function Block Diagram Function Block Diagram PWM Controller (One Side) SMPS2 PWM Buck Controller BOOT2 UGATE2 PHASE2 LGATE2 GND PVCC VOUT2 FB2 ILIM2 PGOOD2 SMPS1 PWM Buck Controller BOOT1 UGATE1 PHASE1 LGATE1 PVCC VOUT1 FB1 ILIM1 PGOOD1 LDO Thermal Shutdown REF Internal Logic Power-On Sequence Clear Fault Latch SW Threshold VCC PVCC ENLDO EN1 EN2 REF TON SKIP BYP VIN LDO PGND TRIG Q TOFF 1-Shot TRIG Q 1-Shot RTON - Comp- Fault Latch 1.1 x V REF 0.7 x V REF 0.9 x V REF Over-Voltage Under-Voltage On-Time Compute VINTON VOUT REF FB PGOOD LGATE UGATE Blanking Time + VCC Current Limit Zero Detector SKIP PHASE ILIM SS Time 25kHz Detector

DS8206A/B-04 March 2011 www.richtek.com Functional Pin Description REF (Pin 1) 2V Reference Output. Bypass to GND with a 0.22uF capacitor. REF can source up to 50uA for external loads. Loading REF degrades FBx and output accuracy according to the REF load-regulation error. TON (Pin 2) Frequency Select Input. (VOUT1/VOUT2 switching frequency, respectively) : TON = VCC, (200kHz / 250kHz) TON = REF, (300kHz / 375kHz) TON = GND, (400kHz / 500kHz) VCC (Pin 3) Analog Supply Voltage Input for the PWM Core. Bypass to GND with a 1uF ceramic capacitor ENLDO (Pin 4) LDO Enable Input. The REF/LDO is enabled if ENLDO is within logic high level and disable if ENLDO is less than the logic low level. NC (Pin 5, 8) No Internal Connection. VIN (Pin 6) Power-supply Input. VIN is used for the constant on-time PWM one shot circuits. VIN is also used to power the linear regulators. The linear regulators are powered by SMPS1 if VOUT1 is set greater than 4.66V and BYP is tied to VOUT1. Connect VIN to the battery input and bypass with a 1uF capacitor. LDO (Pin 7) Linear-Regulator Output. LDO can provide a total of 70mA external loads. The LDO regulates a fixed 5V output. When the BYP is within 5V switchover threshold, the internal regulator shuts down and the LDO output pin connects to BYP through a 1.5Ω switch. Bypass LDO output with a minimum of 4.7uF ceramic. BYP (Pin 9) BYP is the switchover source voltage input for the LDO. VOUT1 (Pin 10) SMPS1 Output Voltage-Sense Input. Connect this pin to the SMPS1 output. VOUT1 is an input to the Constant on-time-PWM one-shot circuit. It also serves as the SMPS1 feedback input in fixed-voltage mode. FB1 (Pin 11) SMPS1 Feedback Input. Connect FB1 to VCC or GND for fixed 5V operation. Connect FB1 to a resistive voltage- divider from VOUT1 to GND to adjust output from 2V to 5.5V. ILIM1 (Pin 12) SMPS1 Current-Limit Adjustment. The GND − PHASE1 current-limit threshold is 1/10th the voltage seen at ILIM1 over a 0.5V to 2V range. There is an internal 5uA current source from VCC to ILIM1. The logic current limit threshold is default to 100mV if ILIM1 is higher than (VCC − 1V). PGOOD1 (Pin 13) SMPS1 Power-Good Open-Drain Output. PGOOD1 is low when the SMPS1 output voltage is more than 7.5% below the normal regulation point or during soft-start. PGOOD1 is high impedance when the output is in regulation and the soft-start circuit has terminated. PGOOD1 is low in shutdown. EN1 (Pin 14) SMPS1 Enable Input. The SMPS1 will be enabled if EN1 is greater than the logic high level and disabled if EN1 is less than the logic low level. If EN1 is connected to REF, the SMPS1 starts after the SMPS2 reaches regulation (delay start). Drive EN1 below 0.8V to clear fault level and reset the fault latches. UGATE1 (Pin 15) High-Side MOSFET Floating Gate-Driver Output for SMPS1. UGATE1 swings between PHASE1 and BOOT1. PHASE1 (Pin 16) Inductor Connection for SMPS1. PHASE1 is the internal lower supply rail for the UGATE1 high-side gate driver. PHASE1 is the current-sense input for the SMPS1.

DS8206A/B-04 March 2011www.richtek.com BOOT1 (Pin 17) Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor according to the typical application circuits. LGATE1 (Pin 18) SMPS1 Synchronous-Rectifier Gate-drive Output. LGATE1 swings between PGND and PVCC. PVCC (Pin 19) PVCC is the supply voltage for the low-side MOSFET driver LGATEx. Connect a 5V power source to the PVCC pin (bypass with 1uF MLCC capacitor to PGND if necessary). There is an internal 10 Ω connecting from PVCC to VCC. Make sure that both VCC and PVCC are bypassed with 1uF MLCC capacitors. SECFB (Pin 20) (RT8206A) The SECFB is used to monitor the optional external 14V charge pump. Connect a resistive voltage-divider from the 14V charge pump output to GND to detect the output. If SECFB drops below the threshold voltage, LGATE1 will be turned on for 300ns. This will refresh the external charge pump driven by LGATE1 without over-discharging the output voltage. NC (Pin 20) (RT8206B) No Internal Connection. GND [Pin 21, Exposed Pad (33)] Analog Ground for both SMPS and LDO. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. PGND (Pin 22) Power Ground for SMPS controller. Connect PGND externally to the underside of the exposed pad. LGATE2 (Pin 23) SMPS2 Synchronous-Rectifier Gate-drive Output. LGATE2 swings between PGND and PVCC. BOOT2 (Pin 24) Boost Flying Capacitor Connection for SMPS2. Connect this pin to an external capacitor according to the typical application circuits. PHASE2 (Pin 25) Inductor Connection for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2 high-side gate driver. PHASE2 is the current-sense input for the SMPS2. UGATE2 (Pin 26) High-Side MOSFET Floating Gate-Driver Output for SMPS2. UGATE2 swings between PHASE2 and BOOT2. EN2 (Pin 27) SMPS2 Enable Input. The SMPS2 will be enabled if EN2 is greater than the logic high level and be disabled if EN2 is less than the logic low level. If EN2 is connected to REF, the SMPS2 starts after the SMPS1 reaches regulation (delay start). Drive EN2 below 0.8V to clear fault level and reset the fault latches. PGOOD2 (Pin 28) SMPS2 Power-Good Open-Drain Output. PGOOD2 is low when the SMPS2 output voltage is more than 7.5% below the normal regulation point or during soft-start. PGOOD2 is high impedance when the output is in regulation and the soft-start circuit has terminated. PGOOD2 is low in shutdown. SKIP (Pin 29) SMPS Operation Mode Control. SKIP = GND : DEM operation SKIP = REF : Ultrasonic Mode operation SKIP = VCC : PWM operation. VOUT2 (Pin 30) SMPS2 Output Voltage-Sense Input. Connect this pin to the SMPS2 output. VOUT2 is an input to the constant on-time-PWM one-shot circuit. It also serves as the SMPS2 feedback input in fixed-voltage mode. ILIM2 (Pin 31) SMPS2 Current-Limit Adjustment. The GND − PHASE2 current-limit threshold is 1/10th the voltage seen at ILIM2 over a 0.5V to 2V range. There is an internal 5uA current source from VCC to ILIM2. The logic current limit threshold is default to 100mV value if ILIM2 is higher than (VCC − 1V).

DS8206A/B-04 March 2011 www.richtek.com FB2 (Pin 32) SMPS2 Feedback Input. Connect FB2 to VCC or GND for fixed 3.3V operation. Connect FB2 to a resistive voltage- divider from VOUT2 to GND to adjust output from 2V to 5.5V.

DS8206A/B-04 March 2011www.richtek.com Recommended Operating Conditions (Note 4) Absolute Maximum Ratings (Note 1) z PHASEx to GND z UGATEx to PHASEx z LGATEx, BYP to GND z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 2) z ESD Susceptibility (Note 3) To be continued

DS8206A/B-04 March 2011 www.richtek.com To be continued

Electrical Characteristics

(VIN = 12V, EN1 = EN2 = VCC, VBYP = 5V, PVCC = 5V, VENLDO = 5V, No Load on LDO, VOUT1, VOUT2 and REF, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Supply VIN Standby Supply Current I VIN_SBY VIN = 6V to 25V, Both SMPS Off, ENLDO = 5V -- 180 250 μA VIN Shutdown Supply Current IVIN_SHDH VIN = 6V to 25V, ENx = ENLDO = GND -- 20 40 μA Quiescent Power Consumption Both SMPSs On, FB1 = SKIP = GND, FB2 = VCC, VOU T1 = BYP = 5.3V, VOU T2 = 3.5V (Note 5) -- 5 7 mW SMPS Output and FB Voltage VOUT1 Output Voltage in Fixed Mode VOUT1 VIN = 6V to 25V, FB1= GND, SKIP = 5V 4.975 5.05 5.125 V VOUT2 Output Voltage in Fixed Mode VOUT2 VIN = 6V to 25V, FB2 = VCC, SKIP = 5V 3.285 3.33 3.375 V FBx in Output Adjustable Mode FBx V IN = 6V to 25V 1.975 2 2.025 V SECFB Voltage SECFB V IN = 6V to 25V (RT8206A) 1.92 2 2.08 V Output Voltage Adjust Range SMPS1, SMPS2 2 -- 5.5 V FBx Adjustable-mode Threshold Voltage Fixed or Adj-Mode comparator threshold 0.2 0.4 0.55 V Either SMPS, SKIP = VCC, 0 to 5A -- −0.1 -- Either SMPS, SKIP = REF, 0 to 5A -- −1.7 -- DC Load Regulation V LOAD Either SMPS, SKIP = GND, 0 to 5A -- −1.5 -- Line Regulation V LINE Either SMPS, V IN = 6V to 25V -- 0.005 -- %/V On Time SMPS1 = 5.05V (200kHz) 1895 2105 2315 TON = VCC SMPS2 = 3.33V (250kHz) 999 1 110 1221 SMPS1 = 5.05V (300kHz) 1227 1403 1579 TON = REF SMPS2 = 3.33V (375kHz) 647 740 833 SMPS1 = 5.05V (400kHz) 895 1052 1209 On-Time Pulse Width t UGATEx TON = GND SMPS2 = 3.33V (500kHz) 475 555 635 ns Minimum Off-Time t LGATEx 200 300 400 ns Ultrasonic Mode Frequency SKIP = REF 25 33 -- kHz Soft Start Soft-Start Time t SSx Zero to full limit from ENx Enable -- 2 -- ms Current Sense Current Limit Threshold (Default) I LIMx = VCC, GND − PHASEx 90 100 110 mV Current Limit Current Source ILIMX 4.75 5 5.25 μA

DS8206A/B-04 March 2011www.richtek.com To be continued Parameter Symbol Test Conditions Min Typ Max Unit ILIM Adjustment Range V ILIMx = ILIMx × RILIMx 0.5 -- 2 V VILIMx = 0.5V 40 50 60 VILIMx = 1V 90 100 110 Current-Limit Threshold GND − PHASEx VILIMx = 2V 180 200 220 mV Zero-Current Threshold SKIP = GND or REF, GND − PHASEx -- 3 -- mV Internal Regulator and Reference LDO Output Voltage V LDO BYP = GND, 6V < VIN < 25V, 0 < ILDO < 70mA 4.9 5 5.1 V LDO Output Current I LDO BYP = GND, V IN = 6V to 25V 70 -- -- mA LDO Short-Circuit Current LDO = GND, BYP = GND -- 200 300 mA LDO 5V Switchover Threshold to BYP VBYP Falling Edge, Rising Edge at BYP Regulation Point 4.53 4.66 4.79 V LDO Switchover Equivalent Resistance RSW LDO to BYP, 10mA -- 1.5 3 Ω REF Output Voltage V REF No External Load 1.98 2 2.02 V REF Load Regulation I REF = 0 to 50uA -- 10 -- mV REF Sink Current REF in Regulation 10 -- -- μA UVLO Rising Edge -- 4.35 4.5 PVCC UVLO Threshold PVCC Falling Edge 3.9 4.05 -- V Power Good PGOODx Threshold FBx with Respect to Internal Reference, Falling Edge, Hysteresis = 1% −11 −7.5 −4 % PGOODx Propagation Delay Falling Edge -- 10 -- μs PGOODx Leakage Current High State, Forced to 5.5V -- -- 1 μA PGOODx Output Low Voltage I SINK = 4mA -- -- 0.3 V Fault Detection OVP Trip Threshold V FB_OVP FBx with Respect to Internal Ref. 108 111 115 % OVP Propagation Delay FBx with 50mV Overdrive -- 10 -- μs UVP Trip Threshold FBx with Respect to Internal Ref. 65 70 75 % UVP Shutdown Blanking Time tSHDN_UVP From ENx Enable -- 3 -- ms Thermal Shutdown Thermal Shutdown T SHDN -- 150 -- °C Thermal Shutdown Hysteresis -- 10 -- °C Logic Input Low Level (Internal Fixed VOUTx) -- -- 0.2 FB1/FB2 Input Voltage High Level (Internal Fixed VOUT x) V CC−1 -- -- V

DS8206A/B-04 March 2011 www.richtek.com Note 1. Stresses beyond those listed under “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. θJA is measured in the natural convection at T A = 25°C on a high effective four layers thermal conductivity test board of JEDEC 51-7 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. PVIN + PPVCC Parameter Symbol T est Conditions Min Typ Max Unit Low Level (DEM) -- -- 0.8 REF Level (Ultrasonic Mode) 1.8 -- 2.3 SKIP Input Voltage High Level (PWM Mode) 2.5 -- -- V VOUT1 / VOUT2 (400kHz / 500kHz) -- -- 0.8 VOUT1 / VOUT2 (300kHz / 375kHz) 1.8 -- 2.3 TON Setting Voltage VOUT1 / VOUT2 (200kHz / 250kHz) 2.5 -- -- V Clear Fault Level / SMPS Off Level -- -- 0.8 Delay Start 1.8 -- 2.3 ENx Input Voltage SMPS On Level 2.5 -- -- V Rising Edge 1.2 1.6 2.0 ENLDO Input Voltage V ENLDO Falling Edge 0.94 1 1.06 V ENLDO = 0V or 25V −1 -- +3 ENx = 0V or 5V −1 -- +1 TON, SKIP = 0V or 5V −1 -- +1 FBx = 0V or 5V −1 -- +1 Input Leakage Current SECFB = 0V or 5V (RT8206A) −1 -- +1 μA Internal BOOT Switch Internal Boost Charging Switch On-Resistance PVCC to BOOTx -- 20 -- Ω Power MOSFET Drivers UGATEx Driver Sink/Source Current UGATEx Forced to 2V -- 2 -- A LGATEx Driver Source Current LGATEx Forced to 2V -- 1.7 -- A LGATEx Driver Sink Current LGATEx Forced to 2V -- 3.3 -- A UGATEx On-Resistance BOOTx to PHASEx Forced to 5V -- 1.5 4 Ω LGATEx, High State -- 2.2 5 LGATEx On-Resistance LGATEx, Low State -- 0.6 1.5 Ω LG Rising -- 30 -- Dead Time UG Rising -- 40 -- ns

DS8206A/B-04 March 2011www.richtek.com Typical Operating Characteristics VOUT2 Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 Load Current (A) Efficiency (%) Ultrasonic Mode VIN = 25V, TON = VCC, EN2 = VCC, EN1 = GND, ENLDO = VIN, FB2 = GND DEM Mode PWM Mode VOUT2 Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 Load Current (A) Efficiency (%) Ultrasonic Mode VIN = 7V, TON = VCC, EN2 = VCC, EN1 = GND, ENLDO = VIN, FB2 = GND DEM Mode PWM Mode VOUT1 Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 Load Current (A) Efficiency (%) Ultrasonic Mode VIN = 25V, TON = VCC, EN2 = GND, EN1 = VCC, ENLDO = VIN, FB1 = GND DEM Mode PWM Mode VOUT2 Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 Load Current (A) Efficiency (%) Ultrasonic Mode VIN = 12V, TON = VCC, EN2 = VCC, EN1 = GND, ENLDO = VIN, FB2 = GND DEM Mode PWM Mode VOUT1 Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 Load Current (A) Efficiency (%) Ultrasonic Mode VIN = 12V, TON = VCC, EN2 = GND, EN1 = VCC, ENLDO = VIN, FB1 = GND DEM Mode PWM Mode VOUT1 Efficiency vs. Load Current 100 0.001 0.01 0.1 1 10 Load Current (A) Efficiency (%) DEM Mode Ultrasonic Mode PWM Mode VIN = 7V, TON = VCC, EN2 = GND, EN1 = VCC, ENLDO = VIN, FB1 = GND

DS8206A/B-04 March 2011 www.richtek.com VOUT2 Switching Frequency vs. Load Current 100 125 150 175 200 225 250 275 300 0.001 0.01 0.1 1 10 Load Current (A) Switching Frequency (kHz)Ultrasonic Mode VIN = 25V, TON = VCC, EN2 = VCC, EN1 = GND, ENLDO = VIN, FB2 = GND DEM Mode PWM Mode VOUT2 Switching Frequency vs. Load Current 100 125 150 175 200 225 250 275 300 0.001 0.01 0.1 1 10 Load Current (A) Switching Frequency (kHz) Ultrasonic Mode VIN = 12V, TON = VCC, EN2 = VCC, EN1 = GND, ENLDO = VIN, FB2 = GND DEM Mode PWM Mode VOUT2 Switching Frequency vs. Load Current 100 125 150 175 200 225 250 275 300 0.001 0.01 0.1 1 10 Load Current (A) Switching Frequency (kHz) Ultrasonic Mode VIN = 7V, TON = VCC, EN2 = VCC, EN1 = GND, ENLDO = VIN, FB2 = GND DEM Mode PWM Mode VOUT1 Switching Frequency vs. Load Current 100 125 150 175 200 225 250 0.001 0.01 0.1 1 10 Load Current (A) Switching FrequencyY (kHz) Ultrasonic Mode VIN = 25V, TON = VCC, EN2 = GND, EN1 = VCC, ENLDO = VIN, FB1 = GND DEM Mode PWM Mode VOUT1 Switching Frequency vs. Load Current 100 125 150 175 200 225 250 0.001 0.01 0.1 1 10 Load Current (A) Switching Frequency (kHz) Ultrasonic Mode VIN = 7V, TON = VCC, EN2 = GND, EN1 = VCC, ENLDO = VIN, FB1 = GND DEM Mode PWM Mode VOUT1 Switching Frequency vs. Load Current 100 125 150 175 200 225 250 0.001 0.01 0.1 1 10 Load Current (A) Switching Frequency (kHz) Ultrasonic Mode VIN = 12V, TON = VCC, EN2 = GND, EN1 = VCC, ENLDO = VIN, FB1 = GND DEM Mode PWM Mode

DS8206A/B-04 March 2011www.richtek.com VREF vs. Temperature 1.95 1.96 1.97 1.98 1.99 2.00 2.01 2.02 2.03 2.04 2.05 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature VREF (V) (°C) VIN = 12.6V Standby Current vs. Input Voltage 198 200 202 204 206 208 210 212 214 216 7 9 11 13 15 17 19 21 23 25 Input Voltage (V) Standby Current (uA) Standby Current No Load, EN1 = EN2 = GND, ENLDO = VIN No Load Battery Current vs. Input Voltage 0.1 100 7 9 11 13 15 17 19 21 23 25 Input Voltage (V) Battery Current (mA) Ultrasonic Mode TON = VCC, EN1 = EN2 = VCC, ENLDO = VIN DEM Mode PWM Mode Shutdown Current vs. Input Voltage 7 9 11 13 15 17 19 21 23 25 Input Voltage (V) Shutdown Current (uA) Shutdown Current No Load on VOUT1, VOUT2, LDO and REF, EN1 = EN2 = GND, ENLDO = GND LDO Output Voltage vs. Output Current 5.02 5.024 5.028 5.032 5.036 5.04 0 1 02 03 04 05 06 07 0 Output Current (mA) Output Voltage (V) VIN = 12V, EN1 = EN2 = GND, ENLDO = VIN VREF vs. Output Current 2.00300 2.00325 2.00350 2.00375 2.00400 2.00425 2.00450 2.00475 2.00500 -10 0 10 20 30 40 50 Output Current (uA) VREF (V) VIN = 12V, EN1 = EN2 = GND, ENLDO = VIN

DS8206A/B-04 March 2011 www.richtek.com Power On from VIN Time (400 μs/Div) REF (2V/Div) LDO (5V/Div) VIN (10V/Div) CP (10V/Div) No Load, VIN = 12V, TON = VCC, EN1 = VCC, EN2 = GND, ENLDO = VIN Power On from EN1 Time (1ms/Div) IL1 (2A/Div) VOUT1 (5V/Div) EN1 (5V/Div) PGOOD1 (5V/Div) TON = VCC, EN1 = VCC, EN2 = GND, ENLDO = VIN No Load, VIN = 12V, DEM Mode Power On from EN1 Time (1ms/Div) IL1 (2A/Div) VOUT1 (5V/Div) EN1 (5V/Div) PGOOD1 (5V/Div) TON = VCC, EN1 = VCC, EN2 = GND, ENLDO = VIN No Load, VIN = 12V, PWM Mode Power On from EN1 Time (1ms/Div) IL1 (2A/Div) VOUT1 (5V/Div) EN1 (5V/Div) PGOOD1 (5V/Div) TON = VCC, EN1 = VCC, EN2 = GND, ENLDO = VIN ILOAD = 4A, VIN = 12V, PWM Mode Power On from EN2 Time (1ms/Div) IL2 (2A/Div) VOUT2 (5V/Div) EN2 (5V/Div) PGOOD2 (5V/Div) TON = VCC, EN1 = GND, EN2 = VCC, ENLDO = VIN No Load, VIN = 12V, DEM Mode Power On from EN2 Time (1ms/Div) IL2 (2A/Div) VOUT2 (5V/Div) EN2 (5V/Div) PGOOD2 (5V/Div) TON = VCC, EN1 = GND, EN2 = VCC, ENLDO = VIN No Load, VIN = 12V, PWM Mode

DS8206A/B-04 March 2011www.richtek.com VOUT1 Load Transient Response Time (20 μs/Div) IL1 (5A/Div) VOUT1_ac- coupled (50mV/Div) LGATE1 (5V/Div) PWM Mode, VIN = 12V TON = VCC, SKIP = VCC, ENLDO = VIN, FB1 = VCC Power Off from EN1 Time (10ms/Div) VOUT1 (5V/Div) EN1 (10V/Div) UGATE1 (20V/Div) LGATE1 (5V/Div) VIN = 12V, TON = VCC, SKIP = VCC, ENLDO = VIN Power On from EN2 (Delay Start) Time (400 μs/Div) VOUT1 (2V/Div) EN1 (5V/Div) VIN = 12V, TON = VCC, ENLDO = VIN EN1 = REF EN2 (5V/Div) VOUT2 (2V/Div) Power On from EN1 (Delay Start) Time (400 μs/Div) VOUT1 (2V/Div) EN1 (5V/Div) VIN = 12V, TON = VCC, ENLDO = VIN EN2 = REF EN2 (5V/Div) VOUT2 (2V/Div) VOUT2 Load Transient Response Time (20 μs/Div) IL2 (2A/Div) VOUT2_ac- coupled (50mV/Div) LGATE2 (5V/Div) PWM Mode, VIN = 12V TON = VCC, SKIP = VCC, ENLDO = VIN, FB2 = VCC Power On from EN2 Time (1ms/Div) IL2 (2A/Div) VOUT2 (5V/Div) EN2 (5V/Div) PGOOD2 (5V/Div) TON = VCC, EN1 = GND, EN2 = VCC, ENLDO = VIN ILOAD = 4A, VIN = 12V, PWM Mode

DS8206A/B-04 March 2011 www.richtek.com OVP Time (500 μs/Div) PGOOD1 (5V/Div) VOUT1 (5V/Div) PGOOD2 (5V/Div) VOUT2 (5V/Div) VIN = 12V, TON = VCC, SKIP = GND, ENLDO = VIN UVP Time (10 μs/Div) VOUT1 (5V/Div) UGATE1 (20V/Div) IL1 (10A/Div) LGATE1 (5V/Div) VIN = 12V, TON = VCC, SKIP = VCC, ENLDO = VIN Power On in Short Circuit Time (400 μs/Div) UGATE1 (20V/Div) VOUT1 (1V/Div) LGATE1 (5V/Div) VOUT1 = Short IL1 (5A/Div) VIN = 12V, TON = VCC, SKIP = VCC, ENLDO = VIN

DS8206A/B-04 March 2011www.richtek.com

Application Information

The RT8206A/B is a dual, high efficiency, Mach ResponseTM DRVTM dual ramp valley mode synchronous buck controller. The controller is designed for low-voltage power supplies for notebook computers. Richtek Mach Response TM technology is specifically designed for providing 100ns “instant-on” response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The DRV TM mode PWM modulator is specifically designed to have better noise immunity for such a dual output application. The RT8206A/B achieves high efficiency at a reduced cost by eliminating the current-sense resistor found in traditional current-mode PWMs. Efficiency is further enhanced by its ability to drive very large synchronous rectifier MOSFETs. The RT8206A/B includes 5V (LDO) linear regulator which can step down the battery voltage to supply both internal circuitry and gate drivers. When V OUT1 voltage is above 4.66V, an automatic circuit turns off the linear regulator and powers the device from V OUT1 through BYP pin connected to VOUT1. PWM Operation The Mach ResponseTM DRVTM mode controller relies on the output filter capacitor's effective series resistance (ESR) to act as a current-sense resistor, so the output ripple voltage provides the PWM ramp signal. Refer to the function block diagram, the UGATE driver will be turned on at the beginning of each cycle. After the internal one- shot timer expires, the UGATE driver will be turned off. The pulse width of this one shot is determined by the converter's input voltage and the output voltage to keep the frequency fairly constant over the input voltage range. Another one-shot sets a minimum off-time (300ns typ.). The on-time one-shot is triggered if the error comparator is high, the low-side switch current is below the current- limit threshold, and the minimum off-time one-shot has timed out. PWM Frequency and On-Time Control The Mach Response TM control architecture runs with pseudo-constant frequency by feed-forwarding the input and output voltage into the on-time one-shot timer. The high-side switch on-time is inversely proportional to the input voltage as measured by the V IN, and proportional to the output voltage. The on-time is given by : On-Time= K (VOUT / VIN) There “K” is set by the TON pin-strap connector (Table 1). One-shot timing error increases for the shorter on- time setting due to fixed propagation delays that is approximately ±15% at high frequency and the ±10% at low frequency. The on-time guaranteed in the Electrical Characteristics tables is influenced by switching delays in the external high-side power MOSFET. Two external factors that influence switching-frequency accuracy are resistive drops in the two conduction loops (including inductor and PC board resistance) and the dead-time effect. These effects are the largest contributors to the change of frequency with changing load current. The dead-time effect increases the effective on-time, reducing the switching frequency as one or both dead times. It occurs only in PWM mode (SKIP = high) when the inductor current reverses at light or negative load currents. With reversed inductor current, the inductor's EMF causes PHASE X to go high earlier than normal, extending the on- time by a period equal to the low-to-high dead time. For loads above the critical conduction point, the actual switching frequency is : F S = (VOUT +VDROP1) / TON x (VIN + VDROP1 − VDROP2 ) The VDROP1 is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PC board resistances; V DROP2 is the sum of the resistances in the charging path; and TON is the on- time calculated by the RT8206A/B. Table 1. TON Setting and PWM Frequency Table

the three operation modes will be introduced as follows. Figure 3. Boundary Condition of CCM/DEM where TON is the given On-time. current dropped below the zero-crossing threshold.

An internal regulator produces a fixed output voltage 5V. not reach more than 2V, the monitor will be deactivated. threshold by ~3x the hysteresis, or (3 x 17mV) = 51mV. Figure 4. Valley Current-Limit

side MOSFET off to high-side MOSFET on. efficiency-killing, EMI-producing shoot-through currents. MOSFET without degrading the turn-off time (Figure 5). Figure 5. Reducing the UGATEx Rise Time OUT folded-back in the soft-start duration. approximately 3.7V (typ.), resetting the fault latches. is 7.5% below its nominal regulator point. and the LGATEx low-side gate drivers are forced high. 3ms (typ.) after start-up or after a rising edge on ENx. internal circuitry will be shut down during thermal shutdown. VIN and drawing current that is too high from the LDO.

switches, which may result in thermal shutdown. will be discharged to GND through an internal 20Ω switch. hysteresis for most application. when ENx voltage falling below 1.8V. in this situation, neither of the two ENx will be in regulation. Figure 6. Setting VOUTx with a Resistor-Divider to the average inductor current. performance, especially at low V IN − VOUTx differences.

2 OUTxLOAD OFF(MIN)

DS8206A/B-04 March 2011 www.richtek.com P-P LOAD(MAX) VESR I≤ P-P IR LOAD(MAX) VESR LI≤ × SWESR OUT f1f = 2 ESR C 4π ≤×× × In non-CPU applications, the output capacitor's size depends on how much ESR is needed to maintain an acceptable level of output voltage ripple : There V P-P is the peak-to-peak output voltage ripple. Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are recommended. Output Capacitor Stability Stability is determined by the value of the ESR zero relative to the switching frequency. The point of instability is given by the following equation : Do not put high-value ceramic capacitors directly across the outputs without taking precautions to ensure stability. Large ceramic capacitors can have a high- ESR zero frequency and cause erratic, unstable operation. However, it is easy to add enough series resistance by placing the capacitors a couple of inches downstream from the inductor and connecting VOUTx or the FBx divider close to the inductor. There are two related but distinct ways including double- pulsing and feedback loop instability in the unstable operation. Double-pulsing occurs due to noise on the output or because the ESR is too low that there is not enough voltage ramp in the output voltage signal. This “fools” the error comparator into triggering a new cycle immediately after the 300ns minimum off-time period has expired. Double-pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it may indicate the possible presence of loop instability, which is caused by insufficient ESR. Loop instability can result in oscillations at the output after line or load perturbations that can trip the over-voltage protection latch or cause the output voltage to fall below the tolerance limit. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output-voltage-ripple envelope for overshoot and ringing. It helps to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under- or overshoot. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : P D(MAX) = ( TJ(MAX) - TA ) / θJA Where T J(MAX) is the maximum operation junction temperature, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8206, the maximum junction temperature is 125°C. The junction to ambient thermal resistance θ JA is layout dependent. For WQFN-32L 5x5 packages, the thermal resistance θ JA is 36°C/W on the standard JEDEC 51-7 four layers thermal test board. The maximum power dissipation at T A = 25°C can be calculated by following formula : PD(MAX) = (125 °C − 25 °C) / (36 °C/W) = 2.778W for WQFN-32L 5x5 packages Output Capacitor Selection The output filter capacitor must have low enough ESR to meet output ripple and load-transient requirements, it’s commanded to keep the feedback voltage between 6 to 12mV. Also, the capacitance value must be high enough to absorb the inductor energy going from a full-load to no- load condition without tripping the OVP circuit. For CPU core voltage converters and other applications where the output is subject to violent load transients, the output capacitor’s size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance :

for a proper layout of RT8206A/B. close to the IC, within 12mm (0.5 inch) if possible. to high-voltage switching node. 0.65mm (25 mils) or wider trace. Figure 7. Derating Curves for RT8206A/B Packages should be as short and wide as possible.

Table 2. Operation Mode Truth Table after REF becomes valid. LDO and REF remain active. RUN ENLDO = high, EN1 or EN2 enabled Normal Operation. VIN POR or by toggling ENLDO. discharge mode terminates. LDO and REF are active. discharges to GND through an internal 20 Ω switch. ENLDO = high. LGATEx stays low. LDO and REF active. Shutdown EN1, EN2, ENLDO=low All circuitry off. Thermal Shutdown T J > +150°C All circuitry off. Exit by VIN POR or by toggling ENLDO. Table 3. Power-Up Sequencing

DS8206A/B-04 March 2011www.richtek.com Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property inf ringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications i s assumed by Richtek. Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 5F, No. 95, Minchiuan Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)86672399 Fax: (8862)86672377 Email: marketing@richtek.com Outline Dimension E D L be A SEE DETAIL A Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2 Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 4.950 5.050 0.195 0.199 D2 3.400 3.750 0.134 0.148 E 4.950 5.050 0.195 0.199 E2 3.400 3.750 0.134 0.148 e 0.500 0.020 L 0.350 0.450 0.014 0.018 W-Type 32L QFN 5x5 Package