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Richtek Mach ResponseTM Technology VCC Input Range : 4.5V to 13.2V VOUT Operating Range : 0.6V to 5V Power Stage Input Range : 2.5V to 24V Shutdown Current <10μμμμμA Operating Frequency : Fixed 300kHz Diode Emulation Mode (RT8128A) Pinless LGATE Over-Current Setting (LGOCS) Power Good Indication Embedded Bootstrap Switch Current Limit with Low-Side Current Sense Scheme 1% High Accuracy Internal VREF = 0.6V OVP/UVP/OTP/Pre-OVP/OCP RoHS Compliant and Halogen Free General Description The RT8128A/C PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for CPU core, I/O, and chipset RAM supplies in notebook computers. Richtek Mach Response TM technology is specifically designed for providing 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. The RT8128A/C achieves high efficiency at a reduced cost by eliminating the current sense resistor found in traditional current mode PWMs. Efficiency is further enhanced by its ability to drive very large synchronous rectifier MOSFETs. The Buck conversion allows this device to directly step down high voltage batteries at the highest possible efficiency. The RT8128A/C is designed for CPU core, chipset, DRAM, or other low voltage supplies as low as 0.6V. High Efficiency Synchronous Buck PWM Controller Simplified Application Circuit UGATE FB RT8128A/C LGATE/ OCSET BOOT PHASE VIN GND EN VOUT VCCVCC PGOODPGOOD Enable
DS8128A/C-03 March 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Pin Description
Ordering Information
Note : Richtek products are : RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations (TOP VIEW) SOP-8 (Exposed Pad) Marking Information Pin No. Pin Name Pin Function 1 BOOT Bootstrap Supply for High-Side Gate Driver. Connect a capacitor between the BOOT and PHASE pins. 2 UGATE Gate Drive Output for the High-Side External MOSFET. 3 PGOOD Open-Drain Power Good Indicator. High impedance indicates power is good. 4 LGATE/OCSET Gate Drive Output for the Low-Side External MOSFET. This pin is also used to set the OCP threshold. Please refer the application information.
5 VCC
Control Voltage Input. It supports the power for the PWM controller, the low-side driver and the bootstrap circuit for high-side driver. Bypass to GND with a 4.7F ceramic capacitor. 6 FB Feedback Voltage Input. Connect FB and GND to a resistive voltage divider to set the output voltage level. The internal reference voltage is 0.6V typically. 7 EN Active-High Enable Control Input. Pull low to GND to disable the PWM controller.
8 PHASE
Return Path of High-Side Gate Driver. Connect this pin to external MOSFETs and inductor. It behaves as the current sense comparator input for low-side MOSFET RDS (ON) sensing and reference voltage for on-time generation. 9 (Exposed pad) GND Ground. Connect this pin directly to the low-side MOSFET source and ground plane with the lowest impedance. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. RT8128xGSP : Product Number x : A or C YMDNN : Date Code RT8128x GSPYMDNN BOOT UGATE PGOOD LGATE/OCSET PHASE EN VCC FB GND 4 5 RT8128A/C Package Type SP : SOP-8 (Exposed Pad-Option 1) Lead Plating System G : Green (Halogen Free and Pb Free) A : Diode Emulation Mode C : FCCM
DS8128A/C-03 March 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Block Diagram Operation The controller with the Mach ResponseTM technology is suitable for low external component count configuration with appropriate amount of Equivalent Series Resistance (ESR) capacitor(s) at the output. The output ripple valley voltage is monitored at a feedback point voltage. Refer to the function block diagrams of the RT8128A/C, the synchronous high-side MOSFET is turned on at the beginning of each cycle. After the internal one-shot timer expires, the MOSFET is turned off. The pulse width of this one-shot is determined by the converter's input and output voltages to keep the frequency fairly constant over the entire input voltage range. Another one-shot sets a minimum off-time (400ns typ.). The on-time one-shot comparator has two inputs. One input looks at the output voltage, while the other input samples the input voltage and converts it to a current. This input voltage proportional current is used to charge an internal on-time capacitor. The on-time is the time required for the voltage on this capacitor to charge from zero volt to VOUT, thereby making the on-time of the high- side switch directly proportional to the output voltage and inversely proportional to the input voltage. The implementation results in a nearly constant switching frequency without the need of a clock generator. Min TOFF COMP VREF S1 Q Latch S1 Q Latch OV UV 125% VREF 67.5% VREF Thermal Shutdown DEM RT8128A On-time One-Shot FB UGATE PHASE GND LGATE/OCSET BOOT EN R QS VCC PHASE SSPOR REF VREF Sample and Hold 50µA gm VCC PGOOD
DS8128A/C-03 March 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Recommended Operating Conditions (Note 4) Absolute Maximum Ratings (Note 1) BOOT to GND BOOT to PHASE PHASE to GND UGATE to GND UGATE to PHASE LGATE to GND Power Dissipation, PD @ TA = 25°C Package Thermal Resistance (Note2) ESD Susceptibility (Note 3)
DS8128A/C-03 March 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Electrical Characteristics
(TA = 25 °C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit PWM Controller VCC POR Threshold Rising Edge, Hysteresis = 120mV, PWM disabled below this level 3.8 4 4.2 V VCC Quiescent Supply Current I Q FB forced above the Regulation Point, VEN = 5V -- 0.5 1.25 mA VCC Shutdown Current I SHDN V CC Current, VEN = 0V -- -- 10 A Feedback Threshold (Note 5) V FB V CC = 4.5V to 13.2V 588 594 600 mV Output Voltage Range V OUT 0.6 -- 5 V Switching Frequency f OSC (Note 6) 270 300 330 kHz Minimum Off-Time 200 -- -- ns Current Sensing IOCSET 45 50 55 A Zero Crossing Threshold 6 -- 8 mV Soft-Start Time T SS -- 3 -- ms Protection Function Current Limit Threshold Offset 20 -- 20 mV Current Limit Threshold Setting Range 50 -- 400 mV UV Threshold UVP Detect, FB Falling Edge 60 -- 75 % OVP Threshold OVP Detect, FB Rising Edge 120 125 130 % Thermal Shutdown -- 140 -- C Driver On-Resistance UGATE Driver Source R UGATEsr VBOOT VPHASE = 12V, Source Current = 100mA -- 1.5 3 UGATE Driver Sink R UGATEsk VUGATE VPHASE = 0.1V, ISNK = 50mA -- 2.25 4 LGATE Driver Source R LGATEsr VCC = 12V, Source Current = 100mA -- 1.5 3 LGATE Driver Sink R LGATEsk V LGATE, ISNK = 50mA -- 1 2 Dead Time LGATE Rising (V PHASE = 1.5V) -- 30 -- ns Dead Time UGATE Rising -- 30 -- ns Internal Boost Charging Switch On-Resistance VCC to BOOT, 10mA -- -- 80 EN Threshold EN Threshold Logic-High V IH -- -- 2.4 V Logic-Low V IL 0.4 -- -- EN Current High State, forced to 5V -- -- 10 A
DS8128A/C-03 March 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Application Circuit UGATE FB RT8128A/C LGATE/ OCSET BOOT PHASE VIN GND EN VOUT VCCVCC 4.7µF 9 (Exposed pad) PGOODPGOOD 100k Enable 0.1µF 1µH 2.7k 1.4k 2.1k 820µF x 2 10µF x 2 22µF x 2 Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured at T A = 25 °C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. The reference voltage shift −6mV from 0.6V for offset canceling under feedback valley control. Note 6. No production tested. Test condition V IN = 12V, VOUT = 1.5V, IOUT = 10A using application circuit. Parameter Symbol Test Conditions Min Typ Max Unit PGOOD (Upper Side Threshold Decided by OV threshold) PGOOD Blanking Time PGOOD Rising Edge from VIN Detect -- -- 10 ms Output Low Voltage I SINK = 4mA -- -- 0.3 V Leakage Current High State, Forced to 5V -- -- 1 A
DS8128A/C-03 March 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Operating Characteristics TON vs. Temperature 360 380 400 420 440 460 480 500 -50 -25 0 25 50 75 100 125 Temperature (°C) TON (ns) VIN = VCC = 12V, VOUT = 1.5V, No Load Output Voltage vs. Temperature 1.45 1.46 1.47 1.48 1.49 1.50 1.51 1.52 1.53 1.54 -50 -25 0 25 50 75 100 125 Temperature (°C) Output Voltage (V) VIN = VCC = 12V, No Load Power On from EN Time (2ms/Div) PGOOD (10V/Div) EN (5V/Div) VIN = VCC = 12V, IOUT = 50mA VOUT (1V/Div) UGATE (20V/Div) RT8128A Frequency vs. Load Current 100 150 200 250 300 350 400 450 02468 1 0 1 2 1 4 1 6 1 8 2 0 Load Current (A) Frequency (kHz) 1 VIN = V CC = 12V, VOUT = 1.5V RT8128C RT8128A Efficiency vs. Load Current 100 0.01 0.1 1 10 100 Load Current (A) Efficiency (%) RT8128A RT8128C VIN = V CC = 12V, VOUT = 1.5V Output Voltage vs. Load Current 1.45 1.46 1.47 1.48 1.49 1.50 1.51 1.52 1.53 1.54 0 2 4 6 8 1 01 21 41 61 82 0 Load Current (A) Output Voltage (V) VIN = VCC = 12V RT8128C RT8128A
DS8128A/C-03 March 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Power On from EN Time (2ms/Div) PGOOD (10V/Div) EN (5V/Div) VIN = VCC = 12V, IOUT = 50mA VOUT (1V/Div) UGATE (20V/Div) RT8128C Power Off from EN Time (5ms/Div) PGOOD (10V/Div) EN (5V/Div) VIN = VCC = 12V, IOUT = 50mA VOUT (1V/Div) UGATE (20V/Div) RT8128A Power Off from EN Time (2ms/Div) PGOOD (10V/Div) EN (5V/Div) VIN = VCC = 12V, IOUT = 50mA VOUT (1V/Div) UGATE (20V/Div) RT8128C OVP Time (100 μs/Div) PGOOD (5V/Div) VIN = V CC = 12V, VOUT = 1.5V VOUT (2V/Div) LGATE (10V/Div) VFB (1V/Div) Load Transient Response Time (200 μs/Div) VIN = V CC = 12V, VOUT = 1.5V RT8128A IOUT (10A/Div) VOUT (100mV/Div) Load Transient Response Time (200 μs/Div) VIN = V CC = 12V, VOUT = 1.5V RT8128C IOUT (10A/Div) VOUT (100mV/Div)
DS8128A/C-03 March 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. OCP Time (20 μs/Div) UGATE (20V/Div) VIN = V CC = 12V, VOUT = 1.5V IL (20A/Div) LGATE (10V/Div) VOUT (2V/Div) Short Circuit before Power On Time (1ms/Div) UGATE (20V/Div) VIN = V CC = 12V, VOUT = 1.5V IL (20A/Div) LGATE (10V/Div) VOUT (1V/Div) UVP Time (20 μs/Div) UGATE (20V/Div) VIN = V CC = 12V, VOUT = 1.5V VOUT (1V/Div) LGATE (10V/Div)
DS8128A/C-03 March 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Applications Information The RT8128A/C PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for CPU core, I/O, and chipset RAM supplies in notebook computers. Richtek Mach Response TM technology is specifically designed for providing 100ns “instant-on” response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The topology solves the poor load transient response timing problems of fixed frequency current mode PWMs and avoids the problems caused by widely varying switching frequencies in conventional constant on-time and constant off-time PWM schemes. The PSR PWM modulator is specifically designed to have better noise immunity for such a single output application. Supply Voltage and Power-On Reset (POR) The input voltage range for VCC is from 4.5V to 13.2V with respect to GND. An internal linear regulator regulates the supply voltage for internal control logic circuit. A minimum 0.1μF ceramic capacitor is recommended to bypass the supply voltage. Place the bypassing capacitor near the IC. VCC also supplies the integrated MOSFET drivers. A bootstrap diode is embedded to facilitate PCB design and reduce the total BOM cost. No external Schottky diode is required in real applications. The Power-On Reset (POR) circuit monitors the supply voltage at the VCC pin. If VCC exceeds the POR rising threshold voltage (4V typ.), the controller resets and prepares the PWM for operation. If VCC falls below the POR falling threshold during normal operation, all MOSFETs stop switching. The POR rising and falling threshold has a hysteresis (0.12V typ.) to prevent unintentional noise based reset. VIN Detection Once VCC exceeds its Power-On Reset (POR) rising threshold voltage, UGATE will output continuous pulses, and LGATE will be forced low for converter input voltage VIN detection. If the voltage pulses at the PHASE pin are greater than 2V when UGATE is turned off more than 3 cycles, VIN is recognized as ready. Then, the controller will initiate soft-start operation. Internal Soft-Start The RT8128A/C provides an internal soft-start function. The soft-start function is used to prevent large inrush current and output voltage overshoot while the converter is being powered-up. The soft-start function automatically begins once the chip is enabled. An internal current source charges the internal soft-start capacitor such that the internal soft-start voltage ramps up uniformly. The FB voltage will track the internal soft-start voltage during the soft-start interval. Therefore, the PWM pulse width increases gradually to limit the input current. After the internal soft-start voltage exceeds the reference voltage, the FB voltage no longer tracks the soft-start voltage but rather follows the reference voltage. Therefore, the duty cycle of the UGATE signal as well as the input current at power up are limited. Over-Current Protection The RT8128A/C provides lossless over-current protection by detecting the voltage drop across the low-side MOSFET when it is turned on. The over-current threshold is set by an external resistor, R OCSET, at LGATE. During the initial stage when LGATE is turned on, the RT8128A/ C samples and holds the phase voltage. The sample and hold voltage represents the valley inductor current and is compared to the OCP threshold. If the sensed phase voltage is lower than the OCP threshold, OCP will be triggered. When OCP is triggered, LGATE will turn on to prevent inductor current increasing until the OCP condition is released. LGATE Over-Current Setting (LGOCS) Over-current threshold is externally programmed by adding a resistor (R OCSET) between LGATE and GND. Once VCC exceeds the POR threshold, an internal current source I OCSET flows through ROCSET. For maintaining the OCP threshold accuracy while temperature Variation, the current source (I OCSET) has an approximately 6500ppm/ °C temperature slope to compensate the dependency of RDS(ON) of MOSFET. The voltage across ROCSET is stored as the over current protection threshold VOCSET. After that, the current source is switched off. R OCSET can be determined using the following equation :
DS8128A/C-03 March 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. IN OUT OUT (MIN) SW OUT_Full Load IN VV VL = fk I V where k is the ratio between inductor ripple current and rated output current. Input Capacitor Selection Voltage rating and current rating are the key parameters when selecting an input capacitor. Conservatively speaking, an input capacitor should have a voltage rating 1.5 times OUT OUT RMS OUT IN IN VVI = I 1 VV where VBOOT represents the voltage across the bootstrap capacitor and fSW is the switching frequency. It is important to ensure the package can dissipate the switching loss and have enough room for safe operation. Inductor Selection The inductor plays an important role in step-down converters because it stores the energy from the input power rail and then releases the energy to the load. From the viewpoint of efficiency, the DC Resistance (DCR) of the inductor should be as small as possible to minimize the conduction loss. In addition, the inductor covers a significant proportion of the board space, so its size is also important. Low profile inductors can save board space especially when the height has a limitation. However, low DCR and low profile inductors are usually not cost effective. Additionally, larger inductance results in lower ripple current, which translates into the lower power loss. The inductor current rising time increases with inductance value. This means the transient response will be slower. Therefore, the inductor design is a trade-off among performance, size and cost. In general, inductance is chosen such that the ripple current ranges between 20% to 40% of the full load current. The inductance can be calculated using the following equation : The next step is to select a proper capacitor for the RMS current rating. Using more than one capacitor with low Equivalent Series Resistance (ESR) in parallel to form a capacitor bank is a good design. Placing a ceramic capacitor close to the Drain of the high-side MOSFET can also be helpful in reducing the input voltage ripple at heavy load. Output Capacitor Selection The output filter capacitor must have low enough ESR to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. Also, the capacitance must be high enough to absorb the inductor energy going from a full-load to no-load condition without tripping the OVP circuit. For CPU core voltage converters and other applications where the output is subject to violent load transients, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance : DRIVER SW G BOOT G_LOW SIDE DRIVER_LOW SIDE P = f ( Q V Q V ) greater than the maximum input voltage to be considered a safe design. The input capacitor is used to supply the input RMS current, which can be approximately calculated using the following equation : PP LOAD(MAX) VESR I In non-CPU applications, the output capacitor's size depends on how much ESR is needed to maintain an acceptable level of output voltage ripple : PP IR LOAD(MAX) VESR L x I where VP−P is the peak-to-peak output voltage ripple. Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are recommended. For low input-to-output voltage differentials (VIN / VOUT < 2), additional output capacitance is required to maintain stability and good efficiency in ultrasonic mode. The amount of overshoot due to stored inductor energy can be calculated as : The RT8128A/C embeds high current gate drivers to obtain high efficiency power conversion. The embedded drivers contribute to the majority of the power dissipation of the controller. Therefore, SOP-8 (Exposed Pad) package is chosen for its power dissipation rating. If no gate resistor is used, the power dissipation of the controller can be approximately calculated using the following equation :
DS8128A/C-03 March 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. PEAK SOAR OUT OUT (I ) x LV 2 x C x V where IPEAK is the peak inductor current. Output Capacitor Stability Stability is determined by the value of the ESR zero relative to the switching frequency. The point of instability is given by the following equation : SW ESR OUT f1f 2 x x ESR x C 4 Do not put high value ceramic capacitors directly across the outputs without taking precautions to ensure stability. Large ceramic capacitors can have a high ESR zero frequency and cause erratic, unstable operation. However, it is easy to add enough series resistance by placing the capacitors a couple of inches downstream from the inductor and connecting V OUT or the FB voltage-divider close to the inductor. Unstable operation manifests itself in two related and distinctly different ways : double-pulsing and feedback loop instability. Double-pulsing occurs due to noise on the output or because the ESR is so low that there is not enough voltage ramp in the output voltage signal. This “fools” the error comparator into triggering a new cycle immediately after the 400ns minimum off-time period has expired. Double pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it may indicate the possible presence of loop instability, which is caused by insufficient ESR. Loop instability can result in oscillations at the output in the form of line or load perturbations, which can trip the over-voltage protection latch or cause the output voltage to fall below the tolerance limit. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output-voltage-ripple envelope for overshoot and ringing. It helps to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under- or over-shoot. MOSFET Selection The majority of power loss in the step-down power conversion is due to the loss in the power MOSFETs. For low voltage high current applications, the duty cycle of the high-side MOSFET is small. Therefore, the switching loss of the high-side MOSFET is of concern. Power MOSFETs with lower total gate charge are preferred in such kind of application. However, the small duty cycle means the low-side MOSFET is on for most of the switching cycle. Therefore, the conduction loss tends to dominate the total power loss of the converter. To improve the overall efficiency, MOSFETs with low R DS(ON) are preferred in the circuit design. In some cases, more than one MOSFET are connected in parallel to further decrease the on-state resistance. However, this depends on the low-side MOSFET driver capability and the budget. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : P D(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-8 (Exposed Pad) package, the thermal resistance, θ JA, is 30.6°C/W on the standard JEDEC 51-7 four-layers thermal test board. The maximum power dissipation at T A = 25°C can be calculated by the following formula : PD(MAX) = (125 °C − 25 °C) / (30.6 °C/W) = 3.26W for SOP-8 (Exposed Pad) package
©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Make MOSFET gate driver path as short as possible. can reduce the possibility of shoot-through. and improve transient response. from this kind of noisy node to avoid noise pick-up. layers for power rail or signal is suitable for PCB design. Figure 3. Derating Curve of Maximum Power Dissipation individual ceramic capacitor. on the maximum power dissipation.
DS8128A/C-03 March 2016 www.richtek.com Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. Outline Dimension A BJ F H M C D I Y X EXPOSED THERMAL PAD (Bottom of Package) 8-Lead SOP (Exposed Pad) Plastic Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Option 1 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Option 2 Y 3.000 3.500 0.118 0.138