RT7800B RICHTEK | Alldatasheet
Document overview
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Technical content
Features
AnyPowerTM = AnyVoltTM + AnyCurrentTM AnyVoltTM (50mV/step) Output Voltage Adjustment for USB Cable Bus Power (VBUS) Support Internet Online Firmware Updates AnyCurrentTM OCP for USB-C VBUS Output Cable Voltage Drop Compensation (CDC) for VBUS Support Provider, Consumer and Dual Role Compliant with USB Power Delivery 3.0 Specification ARM M0 MCU for PD Protocol, Policy Engine and Device Policy Manager; Two I2C Interfaces Built-in Rp, Rd and BMC Physical Layer GPIOs for MUX Control and Customized Functions Automatic IC Bias Input Selection Standard Compliance Quick Discharge for VBUS Support Dead Battery Function Support USB Plug Power (VCONN) 4 Built-in Charge Pump NMOS Gate Drivers OVP Detections at VBUS and VX Pins UVP Detection at VBUS Pin Current Limit for VCONN1/2 Output Maximum Rating, 22V for CC1 and CC2 Pins
Applications
Notebook PC, Tablet PC, Smart Phone Desktop PC, LCD Monitor, TV, Docking Station Car Charger, Power Bank Portable Hard Disk, Dongle, Hubs Marking Information
Ordering Information
Note : Richtek products are : RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Simplified Block Diagram ARMTM CortexTM-M0 ROM MTP Memory SRAM Output Bleeder GPIOs 10-bit ADC VBUS UVP AnyVoltTM CV Control NMOS Gate Drivers
3 Input Pins,
Slave, Master AnyCurrentTM Output OCP Dead Battery Function Offset-Cancelled CS Amplifier Built-in Rp, Rd VBUS, VX OVPs AnyPowerTM and PDsafeTM USB Type-C PD Controller MCU System IC Bias Supply Power Controls Protections VCONN Current- Limit VCONN Switch CC1/2 Functions PD Comm. Physical Layer RT7800BGQW : Product Number YMDNN : Date Code RT7800B Package Type QW : WQFN-40L 5x5 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) RT7800B GQW YMDNN
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Simplified Application Circuit (1) Provider Application with a DC-DC Converter (2) Provider Application without a DC-DC Converter (3) Dual Role Application with a DC-DC Converter RT7800B Provider Type-C Receptacle VBUS CC1/2 DC-DC PWM Converter GP CV Control Enable Control RCS OCP/ Current Detector CC1/2 VCONN GPIOs I2C(slave) EC GPIOs MUX VSYS +20V TX, RX Q1B (optional)Q2A Q2B GC2AGC1 Q1A (optional) Rising Time control MUX Provider TX, RX RT7800B Type-C Receptacle VBUS CC1/2 GP RCS CC1/2 VCONN GPIOs I2C(slave) EC GPIOs GC1GC2A VSYS12 +12V VSYS5 +5V Rising Time control OCP/ Current Detector Q2A Q2B Q1BQ1A CGP CGC1 OCP/ Current Detector RT7800B Provider/ Consumer Type-C Receptacle CC1/2 GP CV Control Enable Control RCS CC1/2 VCONN GPIOs I2C(slave) EC GPIOs MUX GC2 Charger VBUS DC-DC PWM Converter VSYS I2C(master) (optional) TX, RX Q1A Q1B Q2A Q2B
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Pin Description Pin No. Pin Name Pin Function 1 VCONN Power input of the power paths from VCONN to VCONN1 and VCONN2 pins. Generally, connect this pin to a 5V voltage source. 2, 7, 11, 20, 26, 29, 33, 35 NC No internal connection. 3 CC1 First configuration channel. Generally, connect this pin to USB CC1 terminal.
4 VCONN1
Power output pin which supplies USB plug power (V CONN) through USB CC1 terminal. A MOSFET is built in to turn on/off the power path from VCONN to VCONN1. Generally, connect this pin to USB CC1 terminal via a Schottky diode. 5 CC2 Second Configuration Channel. Generally, connect this pin to USB CC2 terminal.
6 VCONN2
Power output pin which supplies USB plug power (V CONN) through USB CC2 terminal. A MOSFET is built in to turn on/off the power path from VCONN to VCONN2. Generally, connect this pin to USB CC2 terminal via a Schottky diode.
8 VDD
Output of the built-in linear regulator and VSYS5-to-VDD power path. This pin is also input pin of bias voltage/current for internal circuits. When the regulator is enabled, it regulates 5V (typ.) at VDD pin from the input voltage at VBUS or VX pin; when the power path is closed, the voltage at VDD follows the input voltage at VSYS5 pin. Connecting this pin with a 1F external capacitor is recommended.
9 ALERT
Open-drain interrupt signal output. EC/AP could check the slave I 2C registers to do emergency control when it receives a low-level signal via this pin. This pin can be set as an open-drain or push-pull GPIO pin to achieve customized functions. 10 V2 Output of the built-in 1.8V linear regulator. From the input voltage at VDD pin, the regulator regulates voltage (1.8V typ.) at V2 pin for internal digital circuits. Connecting this pin with a 1F external capacitor is recommended. 12 ENB On/off control input of the internal VSYS5-to-VDD power path. The path is turned off for power-saving purpose when the ENB voltage is kept at high-level voltage. 13 SDA_EC Open-drain data signal input/output of the slave I 2C. This pin can be set as an open-drain GPIO pin. 14 SCK_EC Clock signal input of the slave I 2C. This pin can be set as an open-drain GPIO pin. Pin Configuration (TOP VIEW) WQFN-40L 5x5 VCONN VCONN1 CC1 ALERT VDD NC CC2 VCONN2 NC GP CSP CSN GPIO1/AIN1 GPIO2/AIN2 TS VRACT NC DAC_CV NC NC ENB SDA_EC SCK_EC CEB STAT IRQ SDA_CHG SCK_CHG NC VSYS5 GND VX VBUS VBP NC GC1 NC GC2B GC2A 20191817161514131211 31323334353637383940 GND
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Pin No. Pin Name Pin Function 15 CEB Open-drain output used to enable an external slave I 2C interface. This pin can be set as an open-drain or push-pull GPIO pin. 16 STAT Charger status input. This pin can be set as an open-drain GPIO pin.
17 IRQ
Interrupt Input Pin. The RT7800B could check the slave I2C registers of charger IC to do emergency control when it receives a low-level signal via this pin. This pin can be set as an open-drain or push-pull GPIO pin. 18 SDA_CHG Open-drain data signal input/output of the master I2C. This pin can be set as an open-drain or push-pull GPIO pin. 19 SCK_CHG Open-drain clock signal output of the master I 2C. This pin can be set as an open-drain or push-pull GPIO pin. 21 GPIO1/AIN1 Open-drain/push-pull GPIO or analog input. Its function is programmable. 22 GPIO2/AIN2 Open-drain/push-pull GPIO or analog input. Its function is programmable. 23 TS Battery temperature detection input. This pin can be set as an open-drain or push-pull GPIO pin. 24 VRACT Push-pull output which is designed to enable/disable a DC-DC converter. The voltage at VRACT pin must be less than VDD+0.3V.
25 DAC_CV
Digitalized sinking current output for adjusting the output voltage of the DC-DC converter. Connecting this pin to voltage feedback pin of the DC-DC converter through a resistor (R VRACT = 0) is recommended. The RVRACT can be open for enabling and testing the DC-DC converter during product development stage. The operating voltage at DAC_CV must be larger than 0.58V at I DAC_CV 240A. 27 CSP Positive current-sensing input for sensing output current in provider application. Please connect this pin to GND pin when this pin is not used.
28 CSN
Negative current-sensing input for sensing output current in provider application. Due to consideration of maximum voltage rating, please connect this pin to CSP pin when this pin is not used. 30 GP Charge-pump gate diver output. It drives N-Channel power MOSFETs to turn on/off a power-path. The CSP pin must be connected to downstream or upstream node of the power-path.
31 GC2A
Charge-pump gate diver output. It drives N-Channel power MOSFETs to turn on/off a power-path. The VBUS pin must be connected to downstream or upstream node of the power-path.
32 GC2B
Charge-pump gate diver output. It drives N-Channel power MOSFETs to turn on/off a power-path. The VBUS pin must be connected to downstream or upstream node of the power-path.
34 GC1
Charge-pump gate diver output. It drives N-Channel power MOSFETs to turn on/off a power-path. The VX pin must be connected to downstream or upstream node of the power-path. 36 VBP Voltage-sensing input which can be used to monitor the charger input voltage.
37 VBUS
Power and voltage-sensing input. This is one of input pins of the built-in linear regulator which regulates 5V (typ.) voltage at VDD pin. This pin is also voltage input pin of GC2A and GC2B charge-pump gate drivers. 38 VX Additional power and voltage-sensing input. This is one of input pins of the built-in linear regulator which regulates 5V (typ.) voltage at VDD pin. This pin is also voltage input pin of GC1 charge-pump gate driver. 39 GND Ground pin. 40 VSYS5 5V power and voltage-sensing input. Connect this pin to a 5V voltage source. (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation.
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Block Diagram VX VBUS VSYS5 VDD ENB IC Bias Supply MCU System Under-Voltage Protection (UVP) (8-bit, 20V max.) Over-Voltage Protections (OVP) (8-bit, 24V max.) VCONN1/2 Current-Limit Protections Over-Current Protection (OCP) (8-bit, 60mV max.) SCK_CHG SDA_CHG IRQ SCK_EC SDA_EC ALERT Selectable Current Source (Ip) (80µA, 180µA, 330µA) PD Communication Physical Layer Built-in VCONN Switchs CC1/2 Functions Dead Battery Function CEB VRACT STAT GPIO1/AIN1 GPIO2/AIN2 TS VBUS VX VSYS5 VCONN CSP TS AIN2 AIN1 VCS CC1 CC2 CC1 CC2 VCONN1 VCONN2 Output Bleeder (1k) Digital-controlled Sinking Current (9-bit, 0 to 350µA) Offset-cancelled Current-sensing Amplifier Power Controls DAC_CV CSP CSN VCS Charge-Pump Gate Drivers (VBUS) GP GC2A GC2B Charge-Pump Gate Driver (VX)GC1 VCONN HV LDO(5V)Switch Voltage Selector LV LDO (1.8V) Shutdown GND VBP Under-Voltage Lockout (UVLO) UVLO VBUS VX ARM CortexTM-M0 MTP Memory (16 kByte) ROM (16 kByte) SRAM (2 kByte) Watch Dog Timer Timers Master I2C (400 kbit/s) Slave I2C (400 kbit/s) 10-bit ADC and Multiplexer GPIOs Oscillator (21.6 MHz) Resistor Dividers VCS Power-Saving Mode Control Charge-Pump Gate Driver (CSP) Pull-down Resistor (Rd, 5.1k) Programmed as output pin : OD : Open-drain PP : Push-pull OD or PP OD OD OD OD or PP OD or PP OD or PP PP OD or PP OD or PP OD or PP OD or PP
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Operation The RT7800B is a versatile USB PD controller which can be used in a Provider, Consumer or Dual Role configuration. It’s a highly integrated solution, consisting of four main functional blocks: MCU system, power controls, protections and CC1/2 PD communication interface as shown in the “Simplified RT7800B Block Diagram”. The MCU system embeds ARM Cortex TM-M0 MCU, multi- time programmable (MTP) memory, ROM, SRAM, a 10- bit ADC (analog to digital converter), two I 2C interfaces (slave and master) and GPIO (General Purpose Input or Output) pins. The MCU system is programmed to perform Policy Engine and Device Policy Manager. It can report operating statuses of PD operation, such as present input/ output voltage and output current, to EC/AP and receive commends from EC/AP(System Policy Manager) via the slave I 2C interface. The GPIO pins can be used to switch high-speed multiplexers or some customized functions. The “power controls ” block consists of an AnyVolt TM constant-voltage (CV) control, an offset-cancelled output current-sense amplifier, four charge-pump gate drivers and VBUS output bleeder. The CV control programs sinking current, flowing into DAC_CV pin, to control output voltage of a DC-DC converter. The output current-sense amplifier, CS AMP , allows using a 10mΩ to 15mΩ current-sense resistor for reducing power loss. The charge-pump drivers drive low-cost (compared to P-Channel MOSFETs) N- Channel MOSFETs for on/off controls of three power-paths. The output bleeder, consisting of built-in resistor (typical 1kΩ) and an N-Channel MOSFET at VBUS pin, can be turned on to discharge the V BUS during V BUS negative transition, hard reset process or the removal of USB-C connector. The PDsafe TM power delivery operations consist of over- voltage protections (OVP) at VBUS and VX pins, under- voltage protection at VBUS pin, V BUS output over-current protection (OCP) and VCONN output current-limit function. The OVP and UVP trip levels can be dynamically set for each input/output voltage target. The V BUS output OCP trip level is also adaptively programmed according to full load current level. The “CC1/2 PD communication interface” block consists of physical layer, three selectable pull-up current sources (Ip, instead of resistors Rp), single pull-down resistor (Rd) and programmable switches, dead-battery function and V CONN power-path switches. VDD Bias Voltage Generation In Figure 1, there are three possible input pins (VBUS, VX, and VSYS5) to supply bias voltage to VDD pin for RT7800B internal circuits. This multi-input and auto- selection design, including a built-in high-voltage linear regulator and a VSYS5-to-VDD pass transistor (SW1), equips RT7800B with high application flexibility for Provider, Consumer or Dual Role applications. An input power selection circuit automatically selects the highest voltage at VBUS, VX or VSYS pins to generate the VDD voltage. When the linear regulator is enabled, it regulates the VDD voltage, typical 5V from the VBUS voltage (which is generally from a USB PD Provider), or the VX voltage (which is from an additional power source). If VBUS and VX pins have no sufficient voltage, the VDD voltage is supplied from the VSYS5 pin via the pass transistor. The transistor, designed for ultra low power consumption, is kept off when ENB voltage is at high level. The VSYS5 voltage is generally from the 5V voltage supply inside an application system. Under-Voltage Lockout (UVLO) The RT7800B UVLO function continually monitors the bias voltages at the VDD and V2 pins. When both of the supply voltages (V DD and V V2) exceed their rising UVLO thresholds, the IC is enabled to work. Otherwise, it will be “Under-Voltage Lockout ” status to prevent any undesirable operations. Figure 1 VBUS VX 5V Linear Regulator VDD CVDD 1.8V Linear Regulator CV2 VSYS5 VVSYS5 3.3V to 5.5V Power Selector H : closed H : closed VVBUS 5V to 24V VDD VV2 SW1 SW2 ENB SW1 is open at ENB = H ENB VBUSVX VVX 5V to 24V
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. AnyVoltTM Output Voltage Adjustment In a Provider application, the RT7800B provides the “AnyVoltTM” feature for multiple selections of output voltage so as to achieve high power efficiency of switching/ linear charger in portable devices such as smart phone, tablet PC, and etc. The RT7800B are designed to gradually increase/decrease the Provider output voltage from 3V to 20V or 20V to 3V with typical 50mV/step. A programmable sinking current (9-bit, 0 to 350μA), flowing into DAC_CV pin via a high-side feedback resistor of a DC-DC converter, is programmed to adjust output voltage of the DC-DC converter, where DAC_CV pin is connected to voltage feedback (FB) pin of the DC-DC converter. Cable Voltage Drop Compensation (CDC) In a power delivery operation, both Provider and Consumer configurations of the RT7800B can monitor the voltages on each VBUS pin to compensate voltage drop across USB cable. The Consumer RT7800B can request higher VBUS voltage from the Provider through PD protocol communication to achieve accurate application voltage. Figure 2 Programmable OVP Threshold Resistor DividerVX Programmable Debounce Time VX OVP Comparator 3 Programmable OVP Threshold Resistor DividerVBUS Programmable Debounce Time VBUS OVP Programmable UVP Threshold Programmable Debounce Time VBUS UVP Comparator 1 Comparator 2 Over-Voltage Protection (OVP) In Figure 2, OVPs are detected at VBUS and VX pins with programmable (8-bit) trip-level from 5.5V up to 24V. Each OVP debounce time is programmable to meet various application requirements. Under-Voltage Protection (UVP) In Figure 2, UVP is detected at VBUS pin with programmable (8-bit) trip-level from 3V to 20V. UVP debounce time is programmable to avoid false triggering and to meet various application requirements. AnyCurrent TM Over-Current Protection (OCP) Because a robust system is very important in USB PD operations, the AnyCurrentTM OCP feature allows setting a most suitable OCP trip level for a negotiated PD system. The RT7800B integrates a current-sense amplifier to detect the output current for OCP and to indicate the value of output current. The amplifier, designed with offset cancellation function, can accurately detect the current- sense voltage (i.e., output current x current-sense resistor) between CSP and CSN pins. The OCP trip voltage setting is programmable (8-bit) and recommended from 10mV to 60mV.
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Constant-Current (CC) Regulation In a RT7800B inside Provider working in coordination with a DC-DC converter, the output CC regulation function can be implemented by firmware design. The RT7800B, continuously monitoring output current via CSP and CSN pins, can regulate output current at a selected current level by dynamically adjusting the digitalized current flowing into DAC_CV pin. The CC regulation, limiting VBUS output current, provides a better system protection than over-current protection. Power-Path Gate Drivers There are four gate drivers in the RT7800B to turn on/off three pairs of low on-resistance N-Channel power MOSFETs for each individual input/output power path. Compared to driving P-Channel power MOSFET, this design using N-MOSFET is more cost-effective. Each gate driver includes a built-in charge pump for turning on and an internal pull-low switch for turning off the power MOSFETs. Internet On-line Firmware Update Due to using MTP memory, RT7800B firmware can be updated by an EC (Embedded Controller) or AP (Application Processor) via I 2C slave interface. Users can easily update firmware without de-soldering/soldering RT7800B during product development period. In mass MCU System CC1/2 VCONN Rd 5.1k VCONN1/2 Switch VCONN1/2 SW3 SEL1 to 2 Transmitter Receiver BMC : Biphase Mark Coding BMC Encoder/ Decoder ADC Voltage Clamping at no bias input Dead-Battery Function ON1/2 To USB-C CC1/2 terminal PD Communication Physical Layer D1/2 Selectable Current-Source (Ip) (off, 80µA, 180µA or 330µA) production, the RT7800B based products can use same- version RT7800B ICs to reduce inventory cost. It also allows updating RT7800B firmware at end customer site through internet in response to some necessary system software changes. Power Output for USB Plug Power (V CONN) In Figure 3, a selected output voltage at one of VCONN1 and VCONN2 pins is provided for powering an external Electrically Marked (E-mark) or active cable. One of internal MOSFETs between VCONN to VCONN1 and VCONN2 pins can be turned on to supply power to VCONN1 or VCONN2 pin. Connect the VCONN1/2 pin to USB-C CC1/2 terminal via a Schottky diode (D1/2) for blocking reverse current. The input pin VCONN must be connected to a 5V power source. Dead Battery Function In Figure 3, a voltage-clamping circuit clamps the CC1/2 voltage when the RT7800B has no power at VBUS, VX and VSYS5 pins. A no-power RT7800B Provider or Dual Role port will be recognized as a Consumer by clamping the voltage level at the RT7800B CC1/2 pin. The RT7800B starts to work, after an external Provider supplies USB cable power (V BUS) to its VBUS pin. Figure 3
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Recommended Operating Conditions (Note 4) Absolute Maximum Ratings (Note 1) Power Dissipation, PD @ TA = 25°C Package Thermal Resistance (Note 2) ESD Susceptibility (Note 3)
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Electrical Characteristics
(VVSYS5 = 5V, ENB = VX = VBUS = GND, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Built-in Linear Regulators and Operating Currents VBUS Pin Input Voltage Range VVBUS 4.5 -- 22 V VX Pin Input Voltage Range V VX 4.5 -- 22 V VSYS5 Pin Input Voltage Range VVSYS5 3.3 5 5.5 V VDD Output Voltage V REG5 Total Digital-pin IO < 10mA, IDD = 0mA VVSYS5 = 5V, VVX = VVBUS = 0V 4.4 4.7 -- V VVSYS5 = 0V, VVX/VVBUS = 5V VVSYS5 = 0V, VVX/VVBUS = 20V 4.5 5 5.5 VDD Short-Circuit Current I SC_VDD VDD = GND VVSYS5 = 5V, VVX = VVBUS = 0V 40 85 140 mA VVSYS5 = 0V, VVX/VVBUS =20V 40 85 140 VSYS5 Normal Operating Current IOP_VSYS5 VVSYS5 = 5V, VVBUS = VVX = 0V, Digital output pins = open -- 10 -- mA VBUS/VX Normal Operating Current IOP_VBUS/VX VVSYS5 = 0V, VVBUS/VVX = 20V, Digital output pins = open -- 10 -- mA VSYS5 Operating Current in Green-Mode (GM) IGM_VSYS5 V VSYS5 = 5V, VVBUS = VVX = 0V -- 5.5 7.5 mA VBUS/VX Operating Current in GM IGM_VBUS/VX V VSYS5 = 0V, VVBUS/VVX = 20V -- 5.5 7.5 mA VSYS5 Operating Current in Deep Green-Mode (DGM) IDGM_VSYS5 VVSYS5 = 5V, VBUS and VX power paths are disabled -- 108 200 A VSYS5 Shutdown Current I SD_VSYS5 VVSYS5 = 5V, VENB = 5V, VVX = VVBUS = 0V -- 4 8 A V2 Output Voltage V REG18 V DD = 5V, IV2 = 0mA 1.62 1.80 1.98 V V2 Short-Circuit Current I SC_V2 V2 = GND, V DD = 5V 20 40 60 mA Under-Voltage Lockout (UVLO), Over/Under-Voltage Protections (OVP , UVP), and Voltage Detections VDD UVLO Voltage Threshold VTH_UVLO1R V DD rising, not in deep-green mode 2.7 2.9 3.1 V VDD UVLO Voltage Hysteresis VHYS_UVLO1 -- 0.1 -- V V2 UVLO Voltage Threshold V TH_UVLO2R V V2 rising -- 1.4 -- V V2 UVLO Voltage Hysteresis V HYS_UVLO2 -- 0.2 -- V VBUS OVP Voltage Threshold Range VTH_VBUSOV Programmable (8-bit), 94.8mV/step at VBUS pin 5.5 -- 24 V VBUS OVP Voltage Threshold Accuracy Nominal VTH_VBUSOV = 6.0V/24.0V, VVBUS rising 5 -- 5 %
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit VBUS OVP Debounce Time t DB_VBUSOV Programmable, V VBUS rising 5.5 7.7 12.2 21.2 7.5 9.5 12.3 17.8 28.8 VBUS UVP Voltage Threshold Range VTH_VBUSUV Programmable (8-bit), 78mV/step at VBUS pin 3 -- 20 V VBUS UVP Voltage Threshold Accuracy Programmable, VVBUS falling VTH_VBUSUV = 3.06V/15.0V 5 -- +5 % VBUS UVP Debounce Time t DB_VBUSUV V VBUS falling, programmable 4.0 4.4 5.3 7.1 6.0 6.5 7.5 9.5 8.0 8.6 9.7 11.9 VX OVP Voltage Threshold Range VTH_VXOV Programmable (8-bit), 94.8mV/step 5.5 -- 24 V VX OVP Voltage Threshold Accuracy Nominal VTH_VXOV = 6.0V/24.0V, VVX rising 5 -- 5 % VX OVP Debounce Time t DB_VXOV Programmable, V VX rising 5.5 7.7 12.2 21.2 7.5 9.5 12.3 17.8 28.8 VBP Input Resistance R IN_VBP Resistor-divider : On -- 500 -- k VBP Input Current Resistor-divider : Off, VVBP = 20V -- -- 2 A Output Voltage Control and Over-Current Protection (OCP) of External DC-DC PWM Converter DAC_CV Sinking Current Range IDAC Programmable (9-bit), VDAC_CV = 0.75 to 2.5V 0 -- 350 Programmable, VDAC_CV = 0.58V 0 -- 240 Maximum DAC_CV Sinking Current IDAC_MAX VDAC_CV = 0.75 to 2.5V TA = 25C 5% 350 5% A TA = 40C to 85C (Note 5) 15% 350 15% Resolution of the DAC_CV Sinking Current IDAC_STEP -- IDAC_MAX /511 -- A CSP-to-CSN OCP Voltage Threshold Range VTH_OC Programmable (8-bit), VCSP and VCSN 3V, 0.238mV/step 10 -- 60 mV OCP Voltage Threshold Accuracy VTH_OCP = 30mV/60mV, VCSP and VCSN 3V 3 0 3 mV OCP Debounce Time t DB_OC (Note 5) -- 3 -- s CSP Input Current I CSP V CSP-CSN = 50mV VCSP = 5V 71 83 95 μA VCSP = 9V 94 110 126 VCSP = 12V 105 123 141 VCSP = 14.5V 112 132 152 VCSP = 20V 135 157 180
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit Ratio of ∆VCSP-CSN to ∆ICSP (Note 5) -- 2.7 -- k CSN Input Current I CSN V CSN = 5V to 20V 12 16 20 A VRACT High-Level Output Voltage Sourcing current = 2mA VDD 0.2V VDD 0.1V -- V VBUS Built-in Bleeder Resistor At on state -- 1 1.3 k CC1/2 Voltage Detections and BMC Transmitter/Receiver CC1/2 Voltage Detection Range Using the 10-bit ADC 0 -- 2.7 V CC1/2 Voltage Detection Accuracy Using the 10-bit ADC, VCC1/2 = 0.1 to 2.7V 40 -- 40 mV CC1/2 Pull-Up Current Source – 1 Ip1 For default USB power 20% 80 20% A CC1/2 Pull-Up Current Source – 2 Ip2 For 1.5A @ 5V 8% 180 8% A CC1/2 Pull-Up Current Source – 3 Ip3 For 3A @ 5V 8% 330 8% A CC1/2 Pull-Down Resistor Rd 10% 5.1 10% k CC1/2 Maximum Output Voltage CC1/2 = open (Note 5) -- VDD 0.7V -- V Transmitter High-Level Output Voltage Range 1.05 -- 1.2 V Transmitter Low-Level Output Voltage Range 0 -- 75 mV Receiver High-Level Input Voltage Range 0.67 -- 1.45 V Receiver Low-Level Input Voltage Range 0.25 -- 0.43 V Rising Time of the Transmitter Output Voltage tR_CC From 10% to 90%, CL = 200pF to 600pF 300 -- -- ns Falling Time of the Transmitter Output Voltage tF_CC From 90% to 10%, CL = 200pF to 600pF 300 -- -- ns DFP-side CC1/2 Voltage Range in RT7800B Dead-Battery Condition For default USB power 0.25 -- 1.5 V For 1.5 A @ 5 V 0.45 -- 1.5 For 3.0 A @ 5 V 0.85 -- 2.45 On-Resistance of the VCONN-to- VCONN1/2 MOSFET V VCONN = 5V -- 0.7 -- VCONN1/2 Output Voltage Accuracy V VCONN = 5V, IO = 0 to 200mA 4.70 -- -- V VCONN1/2 Current-Limit Threshold 270 400 550 mA VCONN Input Current Disabled, VVCONN = 5V, VVCONN1/2 = 0V -- -- 2 A
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured under natural convection (still air) at T A = 25 °C with the component mounted on a high effective- thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the exposed pad of the package. The copper area is 70mm 2 connected with IC exposed pad. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design. Parameter Symbol Test Conditions Min Typ Max Unit MCU Section MCU Clock Frequency f MCU 10% 21.6 10% MHz Power-Path Gate Drivers and Input/Output Pins On Resistance of GC1, GC2A/B, GP Pull-Low MOSFET R PL_Gx -- 100 -- Maximum GC1 Output Voltage V VX = 20V, RVX-to-GND > 50M VVX + VDD VVX + 2VDD 3V VVX + 2VDD 1V V Maximum GC2A/B Output Voltage VVBUS = 20V, RGC2A/B-to-GND > 50MΩ VVBUS +VDD VVBUS +2VDD 3V VVBUS +2VDD 1V V Maximum GP Voltage V CSP = 20V, RGP-to-GND > 50M VCSP + VDD VCSP + 2VDD 3V VCSP + 2VDD 1V V High-Level Input Voltage Range of Digital Input Pins Including the digital pins (I2C, GPIOs, CEB, STAT , TS, ENB) configured as input pins 2.4 -- -- V Low-Level Input Voltage Range of Digital Input Pins -- -- 0.4 V Input Current of the Digital Input Pins Configured as input pins, Input voltage = 5V -- -- 2 A High-Level Output Voltage of Digital Output Pins Sourcing current = 2mA, for the digital pins configured as push-pull output pins -- V DD 0.8 -- V Low-Level Output Voltage of Digital Output Pins Sinking current = 2mA, for the digital pins configured as output pins -- -- 0.3 V AIN1/2 Input Voltage Range for ADC VDD = 4.5V, Resolution = 2.64mV 0.1 -- 2 V AIN1/2 Input Current V AIN1/2 = 5V -- -- 2 A TS Input Voltage Range for ADC VDD = 4.5V, Resolution = 7.93mV 0.3 -- 5.5 V TS Input Resistance R IN_TS Resistor-divider : On -- 90 -- k
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Application Circuit (1) Provider Application Circuit for Monitor VSYS +20V±5% REN 10k Provider RT7800B VBUS VBUS ALERT SDA_EC SCK_EC VSYS33 +3.3VUSB PD Controller GNDGND ENB GPIO1/AIN1 GPIO2/AIN2 GP GC2B VBP CSN CSP RCS 15m (1206)RCSP RCSN 100 CCS 22nF RVBUS CVBUS 1µF RPU1 10k RPU2 10k RPU3 10k RENB 10k Q2B RVBP NC RGP Q2A CCG1 4.7nF VXGC1 GC2A RGC1 RGC2A 0 RVX CVX 1µF CGP 4.7nF Q1B DAC_CVVRACT CBOOT 1µF 10µH/3A Q1A SDA_CHG IRQ SCK_CHG VSYS5 +5V Type-C Receptacle (24 Pins) EC SM4802DSKC Q1 : SM4802DSKC SM4838NSK C1~5 : 25V CO1 to 3 : 25V CIN1 to 3 : 25V CO2 22µF CO3 22µF L1 : MMD-10DZ-100M-X1 (optional) VIN RT8298EZSP SW BOOT BG FB EN/SYNC GND VCC CVCC 1µF DBT 1N4148 VSYS5 +5V 10µF RVRACT C5V 1µF Depending on the Buck converter, Q1A is optional. CIN3 1µF CIN2 10µF CIN1 10µF Output = 5V to 15V or 20V/3A, Po 60W TSSTAT CEB CFB2 1nF CO1 22µFRFB2 73k 1µFC1 1µF 1µF 1µF CC1 CC2 CC1 VCONN1 CC2 VCONN2 VDD VSYS5 V2VCONN RCC1 22 D2, D3 : 1A/20V Schottky diode CVCN1 0.1µF CVCN2 0.1µF CCC1 470pF CCC2 470pF CVDD 2.2µF CV2 1µF RCC2 22 CVSYS5 2.2µF CVCONN 4.7µF RVSYS5 CFB1 4.7nF RFB1 14.3k RFBS 12k
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. (2) Provider Application Circuit for Desktop PC RT7800B ALERT SDA_EC SCK_EC TS SDA_CHG IRQ STAT CEB SCK_CHG VSYS33 +3.3V USB PD ControllerGND ENB GPIO1/AIN1 GPIO 2/AIN2 GP GC2B CSN CSP VDD VSYS5 V2VCONN Q1A VSYS5 +5V DAC_CVVRACT CIN3 10µF GC1 GC2A VSYS12 +12V RGC2A EC SM4802DSKC D1 : 3A/20V Schottky Diode Q1B 1µF SM4802DSKC CGC1 4.7nF RGC1 RVBP VX RVX CVX 1µF VBP C1 to 5 : 16V 1µF 1µF RVBUS RCS 15m (1206)RCSP RCSN 100 CCS 22nF Q2B 1µF RGP Q2A CGP 4.7nF RPU1 10k RPU2 10k RPU3 10k RENB 10k CIN1 100µF CIN1 : 6.3V CIN2 to 3 : 16V CIN2 100µF 1µF CVBUS 1µF VBUS VCONN1 VCONN2 CC1 CC2 RCC1 22 D2, D3 : 1A/20V Schottky diode CVCN1 0.1µF CVCN2 0.1µF CCC1 470pF CCC2 470pF CVDD 2.2µF CV2 1µF RCC2 22 CVSYS5 2.2µF CVCONN 4.7µF RVSYS5 Type-C Receptacle (24 Pins) VBUS GND CC1 CC2 Output = 5V or 12V/3A, Po 36W Provider
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. (3) Dual Role Application Circuit for Notebook PC VDD VSYS5 V2VCONN CSN CSP DAC_CV VX RCS 15m Provider/ Consumer Type-C Receptacle (24 Pins) RT7800B VBUS VBUS ALERT SDA_EC SCK_ECTS SDA_CHG IRQ STAT CEB SCK_CHG VSYS5 +5V EC VSYS33 +3.3V VRACT USB PD Controller VBRL GC1 VBP GC2A GC2B GP Charger SCK IOUT ACOK SDA VSYS VSYS33 +3.3V GNDGND ENB GPIO1/AIN1 GPIO2/AIN2 CSIP CSIN DRV2 GND CSON CSOP UG LG PH Barrel Receptacle RVBUS
2 CVBUS
1µF CVX 1µF RVX SM4802DSKC RVBP SM4802DSKC 1µFQ1A Q1B 10k 10k 10k 73k 15µH CO1 22µF RCSP RCSN 100 VBP RGP RGC2B 510 RGC1 RGC2A 1µF Q3A 1µF Q3B SM4802DSKC Q2A 1µF Q2B CCS 22nF 1µF CO2 22µF CGP 4.7nF CGC2A 4.7nF CGC1 4.7nF 10k VCC RT7263EZQW EN/SYNC REN 10k SWx4 FB CVCC 1µF BOOT CBOOT 0.1µF DBT 1N4148 VSYS5 +5V SS CSS 47nF PGOOD RVRACT C5V 1µF VBAT RBRL 2CBRL 2.2µF Battery Pack GNDx3 AGND VIN VSYS CIN1 10µF CIN2 10µF CC1 CC2 VCONN1 VCONN2 CC1 CC2 VSYS = 9 to 23V VOUT = 5 to 15V (IO 3A, Po 24W) Duty cycle < 85% CFB1 4.7nF CFB2 1nF RFBS 12k RCC1 22 D2, D3 : 1A/20V Schottky diode CVCN1 0.1µF CVCN2 0.1µF CCC1 470pF RCC2 22 CVDD 2.2µF CV2 1µF CVSYS5 2.2µF CVCONN 4.7µF RVSYS5 RFB1 27k CCC2 470pF
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. (4) Dual Role Application Circuit for Smart-phone and Tablet PC Type-C Receptacle (24 Pins) RT7800B VBUS VDD VSYS5 VBUS ALERT SDA_EC SCK_ECTS SDA_CHG IRQ STAT CEB SCK_CHG USB PD Controller VDDP LX SYS PPCTRL SCL VIN CEB IRQ VPTS TS BAT RT9460 DM DP SDA OTG STAT AGND BOOT (Optional) VSYS33 +3.3V MID VSYS PGND GNDGND ENB VCO NN GC2A GPIO2/AIN2GPIO1/AIN1 CSN CSP DAC_CV VX VBP G C2B GC1 G P VRACT AP CVSYS5 2.2µF CVDD 2.2µF CV2 1µF RVBUS CVBUS 1µF CVIN 2.2µF CMID 4.7µF CVDDP 1µF CBOOT 47nF L 2.2µH CSYS 22µF CBAT 10µF RPULL 10k 10k 10k 10k 10k 10k 10k 10k CVCONN 1µF 1µF 1µF (Optional) Provider/ Consumer Battery Pack RNTC VCONN1 VCONN2 CC1 CC2 D2, D3 : 1A/20V Schottky diode CVCN1 0.1µF CVCN2 0.1µF CCC1 470pF CCC2 470pF CC1 CC2 RCC1 22 RCC2 22 RVSYS5
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. CC1 Ip vs. Temperature -50 -25 0 25 50 75 100 125 Temperature (°C) Ip (μA) VTH_VBUSUV vs. Temperature 14.65 14.79 14.93 15.07 15.21 15.35 -50 -25 0 25 50 75 100 125 Temperature (°C) VTH_VBUSUV (V) Typical Operating Characteristics VTH_VBUSOV vs. Temperature 5.92 5.98 6.04 6.10 6.16 6.22 -50 -25 0 25 50 75 100 125 Temperature (°C) VTH_VBUSOV (V) VTH_VBUSOV vs. Temperature 14.05 14.19 14.33 14.47 14.61 14.75 -50 -25 0 25 50 75 100 125 Temperature (°C) VTH_VBUSOV (V) VTH_VBUSOV vs. Temperature 23.50 23.73 23.96 24.19 24.42 24.65 -50 -25 0 25 50 75 100 125 Temperature (°C) VTH_VBUSOV (V) VTH_VBUSUV vs. Temperature 2.90 2.93 2.96 2.99 3.02 3.05 -50 -25 0 25 50 75 100 125 Temperature (°C) VTH_VBUSUV (V) 6.065V (0x40) 14.405V (0x98) 24.071V (0xFE) 2.980V (0x26) 14.980V (0xBF) Ip1 : 80μA
DS7800B-00 May 2017 www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. CC1 Ip vs. Temperature 174 177 180 183 186 -50 -25 0 25 50 75 100 125 Temperature (°C) Ip (μA) CC1 Ip vs. Temperature 318 324 330 336 342 -50 -25 0 25 50 75 100 125 Temperature (°C) Ip (μA) CC2 Ip vs. Temperature -50 -25 0 25 50 75 100 125 Temperature (°C) Ip (μA) CC2 Ip vs. Temperature 174 177 180 183 186 -50 -25 0 25 50 75 100 125 Temperature (°C) Ip (μA) CC2 Ip vs. Temperature 318 324 330 336 342 -50 -25 0 25 50 75 100 125 Temperature (°C) Ip (μA) Rd vs. Temperature 4.85 4.95 5.05 5.15 5.25 5.35 -50 -25 0 25 50 75 100 125 Temperature (°C) Rd (kΩ) Ip2 : 180μA Ip3 : 330μA Ip1 : 80μA Ip2 : 180μA Ip3 : 330μA CC1
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Rd vs. Temperature 4.85 4.95 5.05 5.15 5.25 5.35 -50 -25 0 25 50 75 100 125 Temperature (°C) Rd (kΩ) CC2
©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. on the maximum power dissipation. and OCP function is not used. the GND and VBUS terminals of USB Type-C connector. terminals through the low impedance paths. Figure 8. Derating Curve of Maximum Power Dissipation
DS7800B-00 May 2017www.richtek.com RT7800B ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 4.950 5.050 0.195 0.199 D2 3.250 3.500 0.128 0.138 E 4.950 5.050 0.195 0.199 E2 3.250 3.500 0.128 0.138 e 0.400 0.016 L 0.350 0.450 0.014 0.018 W-Type 40L QFN 5x5 Package Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2 D E L b A e SEE DETAIL A
DS7800B-00 May 2017 www.richtek.com RT7800B Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than ci rcuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no respon sibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. Footprint Inforamtion P A xA yB xB y C D S xS y Tolerance Footprint Dimension (mm) Package Number of Pin