RT7237J RICHTEK | Alldatasheet
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Technical content
Features
zzzzz ±±±±±1.5% High Accuracy Reference Voltage zzzzz 4.5V to 18V Input Voltage Range zzzzz 2A Output Current zzzzz Integrated N-MOSFET Switches zzzzz Current Mode Control zzzzz Fixed Frequency Operation : 340kHz zzzzz Output Adjustable from 0.8V to 15V zzzzz Stable with Low ESR Ceramic Output Capacitors zzzzz Up to 95% Efficiency zzzzz Adjustable Soft-Start zzzzz Cycle-by-Cycle Current Limit zzzzz Input Under Voltage Lockout zzzzz Output Under Voltage Protection zzzzz Thermal Shutdown Protection zzzzz RoHS Compliant and Halogen Free Simplified Application Circuit VIN EN GND BOOT FB SW L VOUT VIN RT7237J SS CSS COMP CC RC CP CBOOTCIN COUT Chip Enable
DS7237J-00 September 2012www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Pin Description Pin No. Pin Name Pin Function 1 BOOT Bootstrap for High Side Gate Driver. Connect a 0.1 μF or greater ceramic capacitor from BOOT to SW pin. 2 VIN Supply Voltage Input, 4.5V to 18V. Must bypass with a suitable large ceramic capacitor. 3 SW Switch Node. Connect this pin to an external L-C filter. 9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 5 FB Feedback Input. It is used to regulate the output of the converter to a set value via an external resistive voltage divider.
6 COMP
Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required. 7 EN Enable Input. A logic high enables the converter; a logic low forces the IC into shutdown mode reducing the supply current to less than 3μA. 8 SS Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1 μF capacitor sets the soft-start period to 13.5ms.
Ordering Information
Note : Richtek products are : \ RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. \ Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations (TOP VIEW) SOP-8 (Exposed Pad) BOOT VIN SW GND SS EN FB COMP GND 4 5 Marking Information RT7237JAHGSP : Product Number YMDNN : Date CodePackage Type SP : SOP-8 (Exposed Pad-Option 2) RT7237JAH Lead Plating System G : Green (Halogen Free and Pb Free) RT7237JAH GSPYMDNN
DS7237J-00 September 2012 www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Function Block Diagram UV Comparator Oscillator Foldback Control 0.4V Internal Regulator 1.8V Shutdown Comparator Current Sense Amplifier BOOT VIN GND SW FB EN COMP VA VCC 6µA Slope Comp Current Comparator EA0.8V S R Q Q SS 1.2V Lockout Comparator VCC 130mΩ 150mΩ VARSENSE 5kΩ Operation Internal Regulator Provide internal power for logic control and switch gate drivers. Shutdown Comparator Activate internal regulator once EN input level is higher than the target level. Force IC to enter shutdown mode when the EN input level is lower than 0.4V. Lockout Comparator Activate the current comparator, release lock-out logic, and enable the switches as EN input level is higher than lockout threshold voltage. Otherwise, the switches still lock out. Oscillator The oscillator provides internal clock and controls the converter's switching frequency. Foldback Control Dynamically adjust the internal clock. It provides a slower frequency as a lower FB voltage. UV Comparator As FB voltage is lower than the UV voltage, it will activate a UV protect scheme. Error Amplifier The output voltage COMP of the error amplifier is adjusted by comparing FB signal with the internal reference voltage and SS signal. Current Sense Amplifier R SENSE detects the peak current of the high side switch. This signal is amplified by the current sense amplifier and added with a slope compensation signal. Then, It controls the switches by comparing this signal with the COMP voltage.
DS7237J-00 September 2012www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Electrical Characteristics
(VIN = 12V, TA = 25 °C, unless otherwise specified) Absolute Maximum Ratings (Note 1) z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 2) z ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4) Parameter Symbol Test Conditions Min Typ Max Unit Shutdown Supply Current V EN = 0V -- 0.5 3 μA Quiescent Supply Current V EN = 3V, VFB = 0.9V -- 0.8 1.2 mA Reference Voltage V REF 4.5V ≤ VIN ≤ 18V 0.788 0.8 0.812 V Error Amplifier Transconductance GEA ΔIC = ±10μA -- 940 -- μA/V High Side Switch On-Resistance RDS(ON)1 -- 150 -- m Ω Low Side Switch On-Resistance RDS(ON)2 -- 130 -- m Ω High Side Switch Leakage Current V EN = 0V, VSW = 0V -- 0 10 μA High Side Switch Current Limit Min. Duty Cycle, V BOOT − VSW = 4.8V -- 4 -- A COMP to Current Sense Transconductance GCS -- 3.7 -- A/V Oscillator Frequency f OSC1 300 340 380 kHz Short Circuit Oscillation Frequency fOSC2 V FB = 0V -- 100 -- kHz Maximum Duty Cycle D MAX V FB = 0.7V -- 93 -- % Minimum On-Time t ON -- 100 -- ns
DS7237J-00 September 2012 www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit Logic-High V IH 2 -- 18 EN Input Voltage Logic-Low V IL -- -- 0.4 V Input Under Voltage Lockout Threshold VUVLO V IN Rising 3.8 4.2 4.5 V Input Under Voltage Lockout Hysteresis ΔVUVLO -- 320 -- mV Soft-Start Current I SS V SS = 0V -- 6 -- μA Soft-Start Period t SS C SS = 0.1μF -- 13.5 -- ms Thermal Shutdown T SD -- 150 -- °C Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured at T A = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions.
©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Table 1. Suggested Components Selection
DS7237J-00 September 2012 www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Operating Characteristics Switching Frequency vs. Temperature 300 310 320 330 340 350 360 370 380 - 5 0- 2 5 0 2 5 5 0 7 51 0 0 1 2 5 Temperature (°C) Switching Frequency (kHz) 1 VIN = 4.5V VIN = 12V VIN = 17V IOUT = 0.5A Switching Frequency vs. Input Voltage 300 310 320 330 340 350 360 370 380 4 6 8 1 01 21 41 61 8 Input Voltage (V) Switching Frequency (kHz) 1 IOUT = 0.5A Reference Voltage vs. Temperature 0.75 0.76 0.77 0.78 0.79 0.80 0.81 0.82 0.83 0.84 0.85 -50 -25 0 25 50 75 100 125 Temperature (°C) Reference Voltage (V) VOUT = 3.3V, IOUT = 1A VIN = 4.5V VIN = 12V VIN = 17V Output Voltage vs. Input Voltage 3.280 3.285 3.290 3.295 3.300 3.305 3.310 3.315 3.320 4 6 8 1 01 21 41 61 8 Input Voltage (V) Output Voltage (V) VOUT = 3.3V, IOUT = 1A Efficiency vs. Output Current 100 0.01 0.1 1 10 Output Current (A) Efficiency (%) VOUT = 3.3V VIN = 4.5V VIN = 12V VIN = 17V Output Voltage vs. Output Current 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 Output Current (A) Output Voltage (V) RT7237J, VOUT = 3.3V VIN = 4.5V VIN = 12V VIN = 17V
DS7237J-00 September 2012www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (100 μs/Div) Load Transient Response VOUT (200mV/Div) IOUT (1A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 0.5A to 2A Time (2.5 μs/Div) VOUT (5mV/Div) VSW (5V/Div) IL (1A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 2A Output Ripple Voltage Time (100 μs/Div) Load Transient Response VOUT (200mV/Div) IOUT (1A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 1A to 2A Time (10ms/Div) Power On from VIN VIN = 12V, VOUT = 3.3V, IOUT = 2A VOUT (2V/Div) VIN (5V/Div) IL (2A/Div) Time (10ms/Div) Power Off from VIN VIN = 12V, VOUT = 3.3V, IOUT = 2A VOUT (2V/Div) VIN (5V/Div) IL (2A/Div) Current Limit vs. Temperature -50 -25 0 25 50 75 100 125 Temperature (°C) Current Limit (A) VIN = 12V VIN = 17V High Side Switch, V OUT = 3.3V
DS7237J-00 September 2012 www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (10ms/Div) Power Off from EN VIN = 12V, VOUT = 3.3V, IOUT = 2A VOUT (2V/Div) VIN (5V/Div) IL (1A/Div) Time (10ms/Div) Power On from EN VIN = 12V, VOUT = 3.3V, IOUT = 2A VOUT (2V/Div) VIN (5V/Div) IL (1A/Div)
DS7237J-00 September 2012www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Application Information
The resistive divider allows the FB pin to sense the output voltage as shown in Figure 1. Figure 1. Output Voltage Setting Where VREF is the reference voltage (0.8V typ.). driver voltage for the high side MOSFET. Figure 2. External Bootstrap Diode and CEN capacitor from the VIN pin (see Figure 3).
0.8 CSoft-Start time t = , if C capacitor I
Figure 3. Enable Timing Control Figure 4. Digital Enable Control Circuit
©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. is disabled during soft-start period. Figure 5. Hiccup Mode Under Voltage Protection large inductor to achieve this goal. approximately 20°C, the converter will resume operation. temperature should be lower than 125°C. and decreases with higher inductance. see Table 2 for the inductor selection reference. Table 2. Suggested Inductors for Typical trapezoidal current at the source of the high side MOSFET. deviations do not offer much relief. meet size or height requirements in the design.
DS7237J-00 September 2012www.richtek.com ©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. The output ripple will be the highest at the maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirement. Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, V IN. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at V IN large enough to damage the part. Thermal Considerations For continuous operation, do not exceed the maximum operation junction temperature 125 °C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : OUT L OUT 1VI E S R 8fC For the input capacitor, two 10 μF low ESR ceramic capacitors are suggested. For the suggested capacitor, please refer to Table 3 for more details. The selection of C OUT is determined by the required ESR to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key for COUT selection to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔV OUT , is determined by : PD(MAX) = (TJ(MAX) − TA ) / θJA Where T J(MAX) is the maximum operation junction temperature , TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification, the maximum junction temperature is 125°C. The junction to ambient thermal resistance θJA is layout dependent. For SOP-8 (Exposed Pad) package, the thermal resistance θ JA is 75°C/W on the standard JEDEC 51-7 four-layers thermal test board. The maximum power dissipation at T A = 25°C can be calculated by following formula : (min.copper area PCB layout) (70mm2copper area PCB layout) The thermal resistance θJA of SOP-8 (Exposed Pad) is determined by the package architecture design and the PCB layout design. However, the package architecture design had been designed. If possible, it's useful to increase thermal performance by the PCB layout copper design. The thermal resistance θ JA can be decreased by adding copper area under the exposed pad of SOP-8 (Exposed Pad) package. As shown in Figure 6, the amount of copper area to which the SOP-8 (Exposed Pad) is mounted affects thermal performance. When mounted to the standard SOP-8 (Exposed Pad) pad (Figure 6.a), θ JA is 75°C/W. Adding copper area of pad under the SOP-8 (Exposed Pad) (Figure 7.b) reduces the θ JA to 64°C/W. Even further, increasing the copper area of pad to 70mm2 (Figure 8.e) reduces the θJA to 49°C/W. The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. The Figure 7 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed.
©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Figure 8. PCB Layout Guide Table 3. Suggested Capacitors for CIN and COUT
DS7237J-00 September 2012 www.richtek.com Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. Outline Dimension A BJ F H M C D I Y X EXPOSED THERMAL PAD (Bottom of Package) 8-Lead SOP (Exposed Pad) Plastic Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Option 1 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Option 2 Y 3.000 3.500 0.118 0.138