RT5133 RICHTEK | Alldatasheet

Document overview

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Technical content

Features

 Top  Hardware Enable Pin  I2C Controlled Interface  Programmable Channel Power On/Off  IRQB Output for Indication  Input Under-Voltage Protection  Over-Temperature Protection  LDO  LDO1/2  2 Low Dropout Regulators for VIO18 and auto Focus Application  Wide 2.8V to 5V Operating Input Range  Programmable Output Voltage by I2C  High PSRR : 70dB @ 1KHz  300mA Low Dropout Voltage Regulators  LDO3/4/5/6  4 Low Dropout Regulators for AVDD application  Wide 2.8V to 5V Operating Input Range  Programmable Output Voltage by I2C  High PSRR : 85dB @ 1KHz  300mA Low Dropout Voltage Regulators  LDO7/8  2 Low Dropout Regulators for DVDD application  Wide 1.1V to 5V Operating Input Range  Programmable Output Voltage by I2C  High PSRR : 75dB @ 1KHz  600mA/1000mA Low Dropout Voltage Regulators  GPO  3 GPO Pins to Control a Single Regulator

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Pin Configuration (TOP VIEW) PVIN3VOUT7PVIN8 PVIN7 VOUT8 VOUT1GPO1 GPO2 AGNDVDDA AGND PVIN12 VREF IRQB VOUT2SCL VOUT6 PVIN6 VOUT4VOUT5 VOUT3 GPO3 HWEN SDA PVIN45 WL-CSP-25B 1.84x1.84 (BSC) Marking Information 27 : Product Code W : Date Code 27W Typical Application Circuit AGND VREF 1μF /6.3V VDDA GPO1 SCL SDA IRQB GPO3 HWEN To VDDIO Processor VOUT1 VOUT2 VOUT3 VOUT5 VOUT4GPO2 To VSYS AGND PVIN12 To VSYS PVIN45 To VSYS PVIN6 To VSYS VOUT6 PVIN7 To Ext. Buck VOUT7 PVIN8 VOUT8 PVIN3 To VSYS To AVDD To AVDD To AVDD To VIO18 To VAF R1 R2 R3 RT5133 R1 to R3 = 2.2k 1μF /6.3VC2 1μF /6.3VC3 2.2μF /6.3VC4 2.2μF /6.3VC5 1μF /6.3VC6 2.2μF /6.3VC7 1μF /6.3VC8 2.2μF /6.3VC9 2.2μF /6.3VC10 1μF /6.3VC11 To AVDD 2.2μF /6.3VC12 1μF /6.3VC13 To DVDD 4.7μF /6.3VC14 To Ext. Buck1μF /6.3VC15 To DVDD 4.7μF /6.3VC16

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Functional Pin Description Pin No. Pin Name Pin Description A1 PVIN8 Power supply of LDO8. A2 PVIN7 Power supply of LDO7. A3 VOUT7 LDO7 regulator output. A4 VOUT3 LDO3 regulator output. A5 PVIN3 Power supply of LDO3. B1 VOUT8 LDO8 regulator output. B2 GPO1 General Purpose output control 1 for external device. B3 GPO2 General Purpose output control 2 for external device. B4 GPO3 General Purpose output control 3 for external device. B5 VOUT1 LDO1 regulator output. C1 VDDA Regulated power input for an internal analog base. Connect a 1F ceramic capacitor between VDDA and ground. C2, C3 AGND Analog ground. Tie AGND and ground on the PCB. C4 HWEN Enable input pin to turn on/off device. C5 PVIN12 Power supply of LDO1 to 2. D1 VREF Internal reference output. It requires a 1F decouple ceramic capacitor. D2 IRQB Active-low open-drain interrupt output. It requests the processor to read the registers. D3 SCL I2C clock signal input. D4 SDA I2C data signal input/output (Open-drain). D5 VOUT2 LDO2 regulator output. E1 VOUT6 LDO6 regulator output. E2 PVIN6 Power supply of LDO6. E3 VOUT5 LDO5 regulator output. E4 PVIN45 Power supply of LDO4 to 5. E5 VOUT4 LDO4 regulator output.

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Functional Block Diagram LDO1 VIO18 LDO2 VAF LDO3 AVDD LDO4 AVDD LDO5 AVDD LDO6 AVDD LDO7 DVDD LDO8 DVDD Output Discharge CTRLTOP with I2C GPIO VDDA AGND AGND HWEN SCL SDA PVIN12 PVIN45 PVIN6 PVIN7 PVIN8 VREF IRQB GPO1 GPO2 GPO3 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 VIO18 PVIN3

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Operation Control Pin Description Part Pin Name Pin Description Pin Type I2C Controlled Pin Connection Suggestion when Unused Top SDA I2C interface serial data input/output. Open-drain. An external pull-up resistor is required. Input/Output/ Open-drain Yes SCL I2C interface serial clock input. Open- drain. An external pull-up resistor is required. Input/Open- drain Yes IRQB Interrupt output, active-low open-drain, to request the processor to read the registers. Output/Open- drain No Floating HWEN Enable input Input/Active- high No Tie to GPIO GPO1 General purpose output control Output/Push- pull Yes Floating GPO2 General purpose output control Output/Push- pull Yes Floating GPO3 General purpose output control Output/Push- pull Yes Floating If a channel is unused, follow the setting instructions as below Unused Part Unused Function Unused Pin Name Pin Connection (Short to Ground/Floating/Others) LDO LDO1 VOUT1 Floating LDO2 VOUT2 Floating LDO3 VOUT3 Floating LDO4 VOUT4 Floating LDO5 VOUT5 Floating LDO6 VOUT6 Floating LDO7 VOUT7 Floating LDO8 VOUT8 Floating

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 BOM List Reference Q'ty Part Number Description Package Manufacturer C14, C16 2 GRM155R60J475ME47 4.7F/0402/6.3V/X5R 0402 MURATA C4, C5, C7, C9, C10, C12 4 GRM033R60J225ME47D 2.2F/0201/6.3V/X5R 0201 MURATA C1, C2, C3, C6, C8, C11, C13, C15 8 GRM033R60J105ME11D 1F/0201/6.3V/X5R 0201 MURATA R1, R2, R3 3 RM02FTN2201 2.2k/0201/1% 0201 TA-I Protection List Part Protection Type Threshold (Typical Value) Deglitch Time Protection Method Reset Method TOP VDDA UVLO VDDA < 2.6V 1ms All LDOs shut down VSYS > 2.8V OTP Temperature > 150°C 1ms OTP shut down selection by (0x0A, bit[4]) Temperature < 110°C LDO1 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO1 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO1 shut down Re-power on LDO2 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO2 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO2 shut down Re-power on LDO3 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO3 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO3 shut down Re-power on LDO4 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO4 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO4 shut down Re-power on LDO5 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO5 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO5 shut down Re-power on LDO6 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO6 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO6 shut down Re-power on LDO7 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO7 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO7 shut down Re-power on LDO8 Over-Current 1.2 x Imax to 3 x Imax 5ms LDO8 shut down Re-power on Power Good VOUT < Target x 70% 400s LDO8 shut down Re-power on

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Absolute Maximum Ratings (Note 1)  Power Dissipation, PD @ TA = 25C  Package Thermal Resistance (Note 2)  ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4)

Electrical Characteristics

(VDDA = VSYS = PVINx = 4V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit PMIC Quiescent Current and OTP Shut Down Current ISHDN On VDDA pin, with all channels shut down, VDDA = 4V, HWEN = L -- 1 2 A Standby-Mode Current IStandby On VDDA pin, with all channels shut down, VDDA = 4V, HWEN = H -- 50 70 A Over-Temperature Protection Threshold TOTP Thermal shut down threshold temperature -- 150 -- C Over-Temperature Protection Accuracy TOTP_ACC Thermal shut down temperature accuracy 15 -- 15 C Over-Temperature Protection Recover TOTP_RECOVER Thermal shut down recover temperature 95 110 125 °C Control I/O Pin, VDDA and VSYS Logic-High Threshold Voltage for GPO Outputs VOH IDS = 10mA 1.35 -- -- V Logic-Low Threshold Voltage for All Open- Drain Outputs VOL IDS = 10mA -- -- 0.45 V Logic-High Threshold Voltage for All Inputs VIH Logic high threshold 1.2 -- -- V

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Parameter Symbol Test Condition Min Typ Max Unit Logic-Low Threshold Voltage for All Inputs VIL Logic low threshold -- -- 0.4 V VDDA Under-Voltage Protection Rising Threshold VDDA_UVP_RISE VDDA rising 2.7 2.8 2.9 V VDDA Under-Voltage Protection Hysteresis VDDA_UVP_HYS VDDA falling -- 0.2 -- V Pull-Down Ability on HWEN IPD_HWEN -- 1 -- A Pull-Down Ability on GPO1/2/3 IPD_GPO -- 1 -- A LDO1 to 8 (LDO1 : VIO / LDO2 : VAF / LDO3/4/5/6 : AVDD / LDO7/8 : DVDD) Input Voltage Range VLDO_ PVIN12/3/45/6 VDDA ≥ PVIN 2.8 -- 5 V VLDO_PVIN7/8 LDO7/8 = 1.8V/10mA 2 -- 5 VLDO_PVIN7/8 1.1 -- 2 Output Voltage Accuracy VOUT_LDO1/2 VOUT = 1.8V, IOUT = 300mA 1 -- 1 VOUT_ LDO3/4/5/6 VOUT = 2.8V, IOUT = 300mA 1 -- 1 VOUT_LDO7 VOUT = 1.1V, IOUT = 600mA 1 -- 1 VOUT_LDO8 VOUT = 1.1V, IOUT = 1000mA 1 -- 1 Output Current Limit Ioc_LDO1/2 360 -- 900 mA Ioc_LDO3/4/5/6 360 -- 900 Ioc_LDO7 720 -- 1800 Ioc_LDO8 1200 -- 3000 Output Short Current limit ISHORTLIM_ LDO1/2 LDO1/2_OCFB_EN = 1 60 -- 300 mA ISHORTLIM_ LDO3/4/5/6 LDO3/4/5/6_OCFB_EN = 1 60 -- 300 ISHORTLIM_LDO7 LDO7_OCFB_EN = 1 120 -- 600 ISHORTLIM_LDO8 LDO8_OCFB_EN = 1 200 -- 1000 Dropout Voltage VDROP_ mV VDROP_LDO7 I_LOAD7 = 600mA -- -- 200 VDROP_LDO8 I_LOAD8 = 1000mA -- -- 200 Rated Load Current (I_rated) I_LDO1/2/3/4/5/6 I_rated ≤ 300mA -- -- 300 mA I_LDO7 I_rated ≤ 600mA -- -- 600 I_LDO8 I_rated ≤ 1000mA -- -- 1000

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Parameter Symbol Test Condition Min Typ Max Unit Power Supply Rejection Ratio (Note 5) PSRRLDO1/2 1. PVIN = 3.8V 2. VOUT = 1.8V/50mA 3. Freq = 1kHz -- 70 -- dB 1. PVIN = 3.8V 2. VOUT = 1.8V/50mA 3. Freq = 10kHz -- 60 -- 1. PVIN = 3.8V 2. VOUT = 1.8V/50mA 3. Freq = 100kHz -- 40 -- 1. PVIN = 3.8V 2. VOUT = 1.8V/50mA 3. Freq = 1MHz -- 25 -- PSRRLDO3/4/5/6 1. PVIN = 3.8V 2. VOUT = 2.8V/60mA 3. Freq = 1kHz -- 85 -- 1. PVIN = 3.8V 2. VOUT = 2.8V/60mA 3. Freq = 10kHz -- 75 -- 1. PVIN = 3.8V 2. VOUT = 2.8V/60mA 3. Freq = 100kHz -- 64 -- 1. PVIN = 3.8V 2. VOUT = 2.8V/60mA 3. Freq = 1MHz -- 41 -- PSRRLDO7/8 1. PVIN = 1.35V 2. VOUT = 1.1V/150mA 3. Freq = 1kHz -- 78 -- 1. PVIN = 1.35V 2. VOUT = 1.1V/150mA 3. Freq = 10kHz -- 68 -- 1. PVIN = 1.35V 2. VOUT = 1.1V/150mA 3. Freq = 100kHz -- 47 -- 1. PVIN = 1.35V 2. VOUT = 1.1V/150mA 3. Freq = 1MHz -- 32 -- Soft-Start Time tSS_LDO1/2 VOUT_LDO = 90% of VOUT_LDO COUT < 10μF -- -- 1000 tSS_LDO3/4/5/6/7/8 VOUT_LDO = 90% of VOUT_LDO COUT < 10μF -- -- 1000 Power Off Time tSS_LDO1/2 VOUT_LDO = 10% of VOUT_LDO COUT < 10μF -- -- 2000 tSS_LDO3/4/5/6/7/8 VOUT_LDO = 10% of VOUT_LDO COUT < 10μF -- -- 2000

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Parameter Symbol Test Condition Min Typ Max Unit Quiescent Current IIQ_LDO1/2 VDDA = PVIN > VOUT + Dropout ILOAD = 0mA and not include base Iq. -- 30 45 A IIQ_LDO3/4/5/6 VDDA = PVIN > VOUT + Dropout ILOAD = 0mA and not include base Iq. -- 55 65 IIQ_LDO7/8 PVIN > VOUT + Dropout ILOAD = 0mA, LDO7 & LDO8 are turned on -- 220 320 Output Noise Voltage (Note 5) Noise_LDO1/2 VOUT = 1.8V/150mA -- 45 -- VrmsNoise_LDO3/4/5/6 VOUT = 2.8V/150mA -- 50 -- Noise_LDO7/8 VOUT = 1.1V/300mA -- 75 -- I2C characteristics SCL, SDA High- Level Input Threshold Voltage VIH_I2C VDD = 1.8V to 5V 1.2 -- -- V SCL, SDA Low-Level Input Threshold Voltage VIL_I2C VDD = 1.8V to 5V -- -- 0.4 V SCL Clock Frequency fCLK Fast-mode -- -- 400 kHz High-speed mode Cb = 100pF -- -- 3.4 MHz Bus Free Time between Stop and Start Condition tBUF Fast-mode 1.3 -- -- s (Repeated) Start Hold Time tHD;STA Fast-mode 0.6 -- -- s High-speed mode Cb = 100pF 160 -- -- ns (Repeated) Start Setup Time tSU;STA Fast-mode 0.6 -- -- s High-speed mode Cb = 100 pF 160 -- -- ns STOP Condition Setup Time tSU;STO Fast-mode 0.6 -- -- s High-speed mode Cb = 100pF 160 -- -- ns SDA Data Hold Time tHD;DAT Fast-mode 0 -- -- ns High-speed mode Cb = 100pF 0 -- 70 SDA Valid Acknowledge Time tVD;ACK Fast-mode -- -- 0.9 s SDA Setup Time tSU;DAT Fast-mode 100 -- -- ns High-speed mode Cb = 100pF 10 -- -- SCL Clock Low Time tLOW Fast-mode 1.3 -- -- s High-speed mode Cb = 100pF 160 -- -- ns SCL Clock High Time tHIGH Fast-mode 0.6 -- -- s High-speed mode Cb = 100pF 60 -- -- ns Note 1. Stresses beyond those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. JA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective-thermal- conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. This specification is guaranteed by design.

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Typical Operating Characteristics Shutdown Current vs. Input Voltage 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Input Voltage (V) Shutdown Current (μA) 1 HWEN = L Quiescent Current vs. Input Voltage Input Voltage (V) Quiescent Current (μA) 1 HWEN = H LDO1 Dropout Voltage vs. Output Current 0.00 0.05 0.10 0.15 0.20 0.25 0 50 100 150 200 250 300 Output Current (mA) LDO1 Dropout Voltage (V) 85°C 25°C 40°C LDO2 Dropout Voltage vs. Output Current 0.00 0.05 0.10 0.15 0.20 0.25 0 50 100 150 200 250 300 Output Current (mA) LDO2 Dropout Voltage (V) 85°C 25°C 40°C LDO3 Dropout Voltage vs. Output Current 0.00 0.05 0.10 0.15 0.20 0.25 0 50 100 150 200 250 300 Output Current (mA) LDO3 Dropout Voltage (V) 85°C 25°C 40°C LDO4 Dropout Voltage vs. Output Current 0.00 0.05 0.10 0.15 0.20 0.25 0 50 100 150 200 250 300 Output Current (mA) LDO4 Dropout Voltage (V) 85°C 25°C 40°C

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com LDO5 Dropout Voltage vs. Output Current 0.00 0.05 0.10 0.15 0.20 0.25 0 50 100 150 200 250 300 Output Current (mA) LDO5 Dropout Voltage (V) 85°C 25°C 40°C LDO6 Dropout Voltage vs. Output Current 0.00 0.05 0.10 0.15 0.20 0.25 0 50 100 150 200 250 300 Output Current (mA) LDO6 Dropout Voltage (V) 85°C 25°C 40°C LDO7 Dropout Voltage vs. Output Current 0 100 200 300 400 500 600 Output Current (mA) LDO7 Dropout Voltage (mV) 85°C 25°C 40°C LDO8 Dropout Voltage vs. Output Current 100 120 0 200 400 600 800 1000 Output Current (mA) LDO8 Dropout Voltage (mV) 85°C 25°C 40°C LDO1/2 PSRR -100 -80 -60 -40 -20 100 1000 10000 100000 1000000 Frequency (Hz) LDO1/2 PSRR (dB) VIN = 3.8V, VOUT = 1.8V, IOUT = 50mA LDO3/4/5/6 PSRR -120 -100 -80 -60 -40 -20 100 1000 10000 100000 1000000 Frequency (Hz) LDO3/4/5/6 PSRR (dB) VIN = 3.8V, VOUT = 2.8V, IOUT = 60mA

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 LDO7/8 PSRR -90 -80 -70 -60 -50 -40 -30 -20 -10 100 1000 10000 100000 1000000 Frequency (Hz) LDO7/8 PSRR (dB) VIN = 1.35V, VOUT = 1.1V, IOUT = 150mA LDO1/2 Load Regulation 1.75 1.77 1.79 1.81 1.83 1.85 Output Current (A) Output Voltage (V) VIN = 4V VIN = 4.5V VIN = 5V VIN = 2.8V VIN = 3V VIN = 3.5V LDO3/4/5/6 Load Regulation 2.75 2.77 2.79 2.81 2.83 2.85 Output Current (A) Output Voltage (V) VIN = 3V VIN = 3.5V VIN = 4V VIN = 4.5V VIN = 5V LDO7/8 Load Regulation 1.080 1.085 1.090 1.095 1.100 1.105 1.110 Output Current (A) Output Voltage (V) VIN = 1.3V VIN = 1.4V VIN = 1.6V VIN = 2V

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com

Application Information

The RT5133 is a highly -integrated power management IC, which includes 8 LDOs, 3 GPO for portable camera module. There are 2 ways to power on/off for each regulator. 1. It can be set at the registers 0x1A for power on and 0x1B for power off. When the HWEN pin toggles from low to high, it will force all 8 LDO regulators power on. The HWEN pin toggles from high to low, it will force all 8 LDO regulators to power off. The device also provides delay time selection by EN_TD bit. Because LDO7/8 PVIN is from external Buck, the external Buck needs to be powered on first before LDO7/8 operates. 2. Individual on/off control by LDOx_EN bit. VDDA VOUT1 VOUT6 HWEN BASE on ready time ~ 4ms Ext. Buck_EN Ext. Buck VOUT7/8 VREF EN_TD = 0 ~ 10ms (±20%) EN_TD = 0 ~ 10ms (±20%) Figure 1. Power ON/OFF Control The RT5133 also features over-temperature protection (OTP), and has three sensors of OTP0, OTP1 and OTP2. They can be enabled in the registers (0x0A[7:5]). channels which will be turned off can be selected by register (0x0A[4]). If the junction temperature drops to TOTP_RECOVER, 110°C typically, the device can be reactivated. UVP function is started and all channels will be turned off after 1ms.

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Table 1. LDO Types and Brief Specifications can be disabled by LDOx_OCFB_EN bit. Figure 4. OCFB Operation Diagrams function, “0” : Disable. “1” : Enable.

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Register Map Register Detailed Description Address Reg Name Bit Bit Name Default Type Description 0x00 CHIP_INFO 7:4 VENDOR_ID 0111 RO Vendor Identification 3:0 CHIP_REV 0010 RO Chip Revision : 0001 : 1st Version 0010 : 2nd Version ... 1111 : 15th Version 0x06 RST_CTRL 7:4 RST_PAS_CODE 0000 RW RESET Passcode Set REG 0x06[7:4] = 1011, then unlock REG0x06[0] ALL_RST To erase RST_PAS_CODE, ALL_RST cannot work. 3:1 EN_TD 010 RW Deglitch time of EN 000 : 0ms (Sync only) 001 : 0.5ms 010 : 1ms (default) 011 : 2ms 100 : 4ms 101 : 6ms 110 : 8ms 111 : 10ms

0 ALL_RST 0 RWC

0 : No reset (default) 1 : Reset all registers and logic Note : After reset procedure, this bit is cleared to '0' 0x07 TM_PAS_ CODE1

7 INT_RETRIGGER 0 RWC

0 : Disabled (default) 1 : Re-Trigger IRQB Note: After re-trigger, this bit is cleared to '0' 6:5 INT_RET 00 RW Pulse width of re-trigger interrupt 00 : 16s (default) 01 : 32s 10 : 64s 11 : 128s 4:0 Reserved 00000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x08 I2C_CTRL

7 I2CSTMR_RST_EN 1 RW

Enable control of I2C Safe Timer : Check SDA keeps low for 32ms  I2C reset 0 : Disable 1 : Enable (default)

6 I2C_MODE 1 RW

0 : 400kHz 1 : 3.4MHz (default)

5 Reserved 1 RW

4:3 Reserved 10 RW 2:0 SDA_DRVSRSEL 111 RW SDA pull low slew rate 000 : Fastest 111 : Slowest (default) 0x09 BASE_CTRL

7 VDDAUV_SHDN_SEL 1 RW

0 : Interrupt only 1 : Shut down all LDOs (default)

6 Reserved 0 RW

5:4 VDDAUV_TD 11 RW Deglitch time of VDDAUV 00 : 64s 01 : 128s 10 : 256s 11 : 1024s (default) 3:2 Reserved 00 RW

1 FOFF_BASE 0 RW

0 : Normal work 1 : Force-off

0 Reserved 0 RW

0x0A OTP_CTRL

7 OTP0_EN 1 RW

0 : Disable 1 : Enable (default)

6 OTP1_EN 1 RW

0 : Disable 1 : Enable (default)

5 OTP2_EN 1 RW

0 : Disable 1 : Enable (default)

4 OTP_SHDN_SEL 1 RW

0 : Interrupt Only 1 : Shut down all LDOs (default) 3:0 Reserved 0000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x0B GPO_CTRL

7 GPO1_EN 0 RW

0 : Disable (default) 1 : Enable

6 GPO2_EN 0 RW

0 : Disable (default) 1 : Enable

5 GPO3_EN 0 RW

0 : Disable (default) 1 : Enable

4 Reserved 0 RW

3 GPO1_TX 0 RW

0 : Low (default) 1 : High

2 GPO2_TX 0 RW

0 : Low (default) 1 : High

1 GPO3_TX 0 RW

0 : Low (default) 1 : High

0 Reserved 0 RW Reserved

IRQ_MASK (IRQ Source Indicator Mask)

7 VDDAUV_EVT 0 WC

0 : No event 1 : Event occurred

6 VREF_EVT 0 WC

0: No event 1: Event occurred 5:3 Reserved 000 WC

2 OTP2_EVT 0 WC

0 : No event 1 : Event occurred

1 OTP1_EVT 0 WC

0 : No event 1 : Event occurred

0 OTP0_EVT 0 WC

0 : No event 1 : Event occurred

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x11 LDO_OC_EVT

7 LDO8_OC_EVT 0 WC

0 : No event 1 : Event occurred

6 LDO7_OC_EVT 0 WC

0 : No event 1 : Event occurred

5 LDO6_OC_EVT 0 WC

0 : No event 1 : Event occurred

4 LDO5_OC_EVT 0 WC

0 : No event 1 : Event occurred

3 LDO4_OC_EVT 0 WC

0 : No event 1 : Event occurred

2 LDO3_OC_EVT 0 WC

0 : No event 1 : Event occurred

1 LDO2_OC_EVT 0 WC

0 : No event 1 : Event occurred

0 LDO1_OC_EVT 0 WC

0 : No event 1 : Event occurred 0x12 LDO_PGB_EVT

7 LDO8_PGB_EVT 0 WC

0 : No event 1 : Event occurred

6 LDO7_PGB_EVT 0 WC

0 : No event 1 : Event occurred

5 LDO6_PGB_EVT 0 WC

0 : No event 1 : Event occurred

4 LDO5_PGB_EVT 0 WC

0 : No event 1 : Event occurred

3 LDO4_PGB_EVT 0 WC

0 : No event 1 : Event occurred

2 LDO3_PGB_EVT 0 WC

0 : No event 1 : Event occurred

1 LDO2_PGB_EVT 0 WC

0 : No event 1 : Event occurred

0 LDO1_PGB_EVT 0 WC

0 : No event 1 : Event occurred

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x13 BASE_STAT

7 VDDAUV_STAT 0 RO

0 : VDDAUV doesn't occur 1 : VDDAUV occurs

6 VREF_STAT 0 RO

0 : BASE VREF doesn't occur 1 : BASE VREF occurs 5:3 Reserved 000 RO

2 OTP2_STAT 0 RO

0 : Temperature is normal 1 : Temperature is over threshold

1 OTP1_STAT 0 RO

0 : Temperature is normal 1 : Temperature is over threshold

0 OTP0_STAT 0 RO

0 : Temperature is normal 1 : Temperature is over threshold

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x14 LDO_OC_STAT

7 LDO8_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO is disabled 1 : LDO OC occurs

6 LDO7_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO is disabled 1 : LDO OC occurs

5 LDO6_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO is disabled 1 : LDO OC occurs

4 LDO5_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO is disabled 1 : LDO OC occurs

3 LDO4_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO is disabled 1 : LDO OC occurs

2 LDO3_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO disabled 1 : LDO OC occurs

1 LDO2_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO is disabled 1 : LDO OC occurs

0 LDO1_OC_STAT 0 RO

0 : LDO OC doesn't occur or LDO is disabled 1 : LDO OC occurs

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x15 LDO_PG_STAT

7 LDO8_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

6 LDO7_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

5 LDO6_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

4 LDO5_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

3 LDO4_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

2 LDO3_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

1 LDO2_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

0 LDO1_PGB_STAT 0 RO

0 : LDO PGB doesn't occur or LDO is disabled 1 : LDO PGB occurs

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x16 BASE_MASK

7 VDDAUV_MASK 0 RW

0 : Interrupt is not masked (default) 1 : Interrupt is masked

6 VREF_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default) 5:3 Reserved 111 RW

2 OTP2_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

1 OTP1_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

0 OTP0_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x17 LDO_OC_MASK

7 LDO8_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

6 LDO7_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

5 LDO6_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

4 LDO5_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

3 LDO4_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

2 LDO3_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

1 LDO2_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

0 LDO1_OC_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x18 LDO_PG_MASK

7 LDO8_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

6 LDO7_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

5 LDO6_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

4 LDO5_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

3 LDO4_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

2 LDO3_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

1 LDO2_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default)

0 LDO1_PGB_MASK 1 RW

0 : Interrupt is not masked 1 : Interrupt is masked (default) 0x19 LDO_SHDN

7 LDO_OC_SHDN_ALL 0 RW

Anyone of LDO OC state, shut down all LDO channels 0 : LDO OC only shut down itself (default) 1 : LDO OC shut down all channels

6 LDO_PGB_SHDN_ALL 0 RW

state, shut down all LDO channels 0 : LDO PGB only shut down itself (default) 1 : LDO PGB shut down all channels 5:0 Reserved 000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x1A LDO_ON

7 LDO8_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

6 LDO7_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

5 LDO6_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

4 LDO5_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

3 LDO4_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

2 LDO3_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

1 LDO2_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

0 LDO1_ON 0 WC

0 : No function 1 : Enable LDO, and then clear this bit to '0'

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x1B LDO_OFF

7 LDO8_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

6 LDO7_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

5 LDO6_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

4 LDO5_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

3 LDO4_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

2 LDO3_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

1 LDO2_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

0 LDO1_OFF 0 WC

0 : No function 1 : Disable LDO, and then clear this bit to '0'

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x20 LDO1_CTRL1

7 LDO1_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event

4 Reserved 1 RW

3:2 LDO1_STCD_TD 00 RW LDO1 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO1_STBTD 01 RW Soft-start time of LDO1 control 00 : 0ms (Sync) 01 : 1ms (default) 10 : 2ms 11 : 4ms 0x21 LDO1_CTRL2 7:5 LDO1_VOSEL 000 RW LDO1 VOUT selection 000 : 1.8V (default) 001 : 2.5V 010 : 2.7V 011 : 2.8V 100 : 2.9V 101 : 3.0V 110 : 3.1V 111 : 3.2V 4:0 Reserved 00000 RW 0x22 LDO1_CTRL3

7 Reserved 0 RW

6 LDO1_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO1_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

3 Reserved 0 RW

2 LDO1_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x23 LDO1_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x24 LDO2_CTRL1

7 LDO2_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event 3:2 LDO2_STCD_TD 00 RW LDO2 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO2_STBTD 01 RW Soft-start time of LDO2 control 00 : 0ms (Sync) 01 : 1ms (default) 10 : 2ms 11 : 4ms 0x25 LDO2_CTRL2 7:5 LDO2_VOSEL 011 RW LDO2 VOUT selection 000 : 1.8V 001 : 2.5V 010 : 2.7V 011 : 2.8V (default) 100 : 2.9V 101 : 3.0V 110 : 3.1V 111 : 3.2V 4:0 Reserved 00000 RW 0x26 LDO2_CTRL3

6 LDO2_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO2_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

2 LDO2_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x27 LDO2_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x28 LDO3_CTRL1

7 LDO3_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event 3:2 LDO3_STCD_TD 00 RW LDO3 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO3_STBTD 01 RW Soft-start time of LDO3 control 00: 0ms (Sync) 01: 1ms (default) 10: 2ms 11: 4ms 0x29 LDO3_CTRL2 7:5 LDO3_VOSEL 101 RW LDO3 VOUT selection 000 : 1.7V 001 : 1.8V 010 : 1.9V 011 : 2.5V 100 : 2.7V 101 : 2.8V (default) 110 : 2.9V 111 : 3.0V 4:0 Reserved 00000 RW 0x2A LDO3_CTRL3

6 LDO3_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO3_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

2 LDO3_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x2B LDO3_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x2C LDO4_CTRL1

7 LDO4_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event 3:2 LDO4_STCD_TD 00 RW LDO4 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO4_STBTD 01 RW Soft-start time of LDO4 control 00 : 0ms (Sync) 01 : 1ms (default) 10 : 2ms 11 : 4ms 0x2D LDO4_CTRL2 7:5 LDO4_VOSEL 101 RW LDO4 VOUT selection 000 : 1.7V 001 : 1.8V 010 : 1.9V 011 : 2.5V 100 : 2.7V 101 : 2.8V (default) 110 : 2.9V 111 : 3.0V 4:0 Reserved 00000 RW 0x2E LDO4_CTRL3

6 LDO4_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO4_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

2 LDO4_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x2F LDO4_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x30 LDO5_CTRL1

7 LDO5_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event 3:2 LDO5_STCD_TD 00 RW LDO5 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO5_STBTD 01 RW Soft-start time of LDO5 control 00 : 0ms (Sync) 01 : 1ms (default) 10 : 2ms 11 : 4ms 0x31 LDO5_CTRL2 7:5 LDO5_VOSEL 101 RW LDO5 VOUT selection 000 : 1.7V 001 : 1.8V 010 : 1.9V 011 : 2.5V 100 : 2.7V 101 : 2.8V (default) 110 : 2.9V 111 : 3.0V 4:0 Reserved 00000 RW 0x32 LDO5_CTRL3

6 LDO5_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO5_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

2 LDO5_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x33 LDO5_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x34 LDO6_CTRL1

7 LDO6_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event 3:2 LDO6_STCD_TD 00 RW LDO6 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO6_STBTD 01 RW Soft-start time of LDO6 control 00 : 0ms (Sync) 01 : 1ms (default) 10 : 2ms 11 : 4ms 0x35 LDO6_CTRL2 7:5 LDO6_VOSEL 101 RW LDO6 VOUT selection 000 : 1.7V 001 : 1.8V 010 : 1.9V 011 : 2.5V 100 : 2.7V 101 : 2.8V (default) 110 : 2.9V 111 : 3.0V 4:0 Reserved 00000 RW 0x36 LDO6_CTRL3

6 LDO6_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO6_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

2 LDO6_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x37 LDO6_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Address Reg Name Bit Bit Name Default Type Description 0x38 LDO7_CTRL1

7 LDO7_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event 3:2 LDO7_STCD_TD 00 RW LDO7 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO7_STBTD 01 RW Soft-start time of LDO7 control 00 : 0ms (Sync) 01 : 1ms (default) 10 : 2ms 11 : 4ms 0x39 LDO7_CTRL2 7:5 LDO7_VOSEL 100 RW LDO7 VOUT selection 000 : 0.90V 001 : 0.95V 010 : 1.00V 011 : 1.05V 100 : 1.10V (default) 101 : 1.15V 110 : 1.20V 111 : 1.80V 4:0 Reserved 00000 RW 0x3A LDO7_CTRL3

6 LDO7_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO7_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

2 LDO7_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x3B LDO7_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Address Reg Name Bit Bit Name Default Type Description 0x3C LDO8_CTRL1

7 LDO8_EN 0 RWC

0 : Disable (default) 1 : Enable Note : Clear by VDDAUV/OT/OC/PGB event 3:2 LDO8_STCD_TD 00 RW LDO8 soft-start count down 00 : 1ms (default) 01 : 2ms 10 : 4ms 11 : 8ms 1:0 LDO8_STBTD 01 RW Soft-start time of LDO8 control 00 : 0ms (Sync) 01 : 1ms (default) 10 : 2ms 11 : 4ms 0x3D LDO8_CTRL2 7:5 LDO8_VOSEL 100 RW LDO8 VOUT selection 000 : 0.90V 001 : 0.95V 010 : 1.00V 011 : 1.05V 100 : 1.10V (default) 101 : 1.15V 110 : 1.20V 111 : 1.80V 4:0 Reserved 00000 RW 0x3E LDO8_CTRL3

6 LDO8_OCFB_EN 1 RW

0 : Disable 1 : Enable (default) 5:4 LDO8_OCFB_TD 10 RW Deglitch time of OCFB 00 : 10s 01 : 15s 10 : 60s (default) 11 : 100s

2 LDO8_NDIS_EN 1 RW

0 : Disable 1 : Enable (default) 1:0 Reserved 00 RW 0x3F LDO8_CTRL4 7:0 Reserved 00000000 RW

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.500 0.600 0.020 0.024 A1 0.140 0.200 0.006 0.008 b 0.210 0.270 0.008 0.011 E 1.800 1.880 0.071 0.074 E1 1.400 0.055 D 1.800 1.880 0.071 0.074 D1 1.400 0.055 e 0.350 0.014 25B WL-CSP 1.84x1.84 Package (BSC)

Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com Footprint Information Package Number of Pin Type Footprint Dimension (mm) Tolerance e A B WL-CSP1.84x1.84-25(BSC) 25 NSMD 0.350 0.220 0.320 ±0.025 SMD 0.250 0.220 Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is curre nt and complete. Ric htek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsid iaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiar ies.