RT5047_17 RICHTEK | Alldatasheet
Document overview
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Technical content
Features
Wide Input Supply Voltage Range : 8V to 16V Output Current Limit of 550mA with 45ms timer Low Noise LNB Output Voltage (13.3V and 18.3V by SEL Pin, 14.3V and 19.3V by COMP Pin) 3% High Accuracy for 0 mA to 500mA Current Output Push-Pull Output Stage minimizes 13.3V to 18.3V and 18.3V to 13.3V Output Transition Time External 22kHz Tone Input Meet DiSEqCTM1.x Protocol Output Short Circuit Protection Over-Temperature Protection
Applications
LNB Power Supply and Control for Satellite Set-Top Box Analog and Digital Satellite Receivers/ Satellite TV, Satellite PC cards Pin Configuration (TOP VIEW) LNB BOOST LX VIN TONE COMP EN SEL GND 4 5 SOP-8 (Exposed Pad) Simplified Application Circuit VIN CBST VIN RT5047 LX SEL TONE GND LNB CLNB Max. 550mA CIN2 CIN1 BOOST EN VLNB D2 D4 COMP
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5047-02 July 2017 Marking Informaton RT5047 GSPYMDNN RT5047GSP : Product Number YMDNN : Date Code Functional Pin Description Pin No. Pin Name Pin Function 1 LNB Output voltage for LNB. 2 BOOST Boost output and tracking supply voltage to LNB. 3 LX Switching node of DC-DC boost converter. 4 VIN Power supply input. 5 EN LNB output enable. 6 SEL LNB output voltage selection pin (Low is for 13.3V, high is for 18.3V). 7 COMP LNB output voltage compensate pin. 8 TONE 22kHz TONE input. 9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Functional Block Diagram Oscillator 4-steps Voltage Setting 22kHz Tone Shape GND VIN TONE Reference Voltage VFB2 VR1 Bandgap Reference VD2 VFB2 Dynamic Dropout Control BOOST OSC VUD VFB1 VR1 PWM Controller DAC VD1 LX Error Amp RF1 RF2 LNBLinear Regulator OCP2 OCP1 UVLO OTP SEL EN COMP
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5047-02 July 2017 www.richtek.com Operation The RT5047 integrates a current mode boost converter and linear regulator. Use the SEL pin to control the LNB voltage and the boost converter track is at least greater 850mV than LNB voltage. The boost converter is the high efficiency PWM architecture with 700kHz operation frequency . The linear regulator has the capability to source current up to 550mA during continuous operation. All the loop compen sation, current sensing, and slope compensation functions are provided internally. OCP Both the boost converter and the linear regulator have independent current limit. In the boost converter (OCP1), this is achieved through cycle -by-cycle internal curren t limit (typ. 3A) . In the linear regulator (OCP2), when the linear regulator exceeds OCP more than 48ms, the LNB output will be disabled and re-start after 1.8s. Tone Circuit This circuit is used for tone generation. Use the TONE pin to control output amplitude of LNB. OTP When the junction temperature reaches the critical temperature (typically 150C), the boost converter and the linear regulator are immediately disabled. UVLO The UVLO circuit compares the VIN with the UVLO threshold (7.7V rising typically) to ensure that the input voltage is high enough for reliable operation. The 350mV (typ.) hysteresis prevents supply transients from causing a shutdown. PWM Controller The loop compensation, current sensing, and s lope compensation functions are provided internally.
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5047-02 July 2017 Absolute Maximum Ratings (Note 1) Power Dissipation, PD @ TA = 25C Package Thermal Resistance (Note 2) ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4)
Electrical Characteristics
(VIN (typ.) = 12V, VIN = 8V to 16V, TA = 25C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit General LNB Output Accuracy, Load and Line Regulation ERR Relative to selected VLNB target level, ILNB = 0 to 450mA 3 -- 3 % Supply Current IIN_OFF EN = 0, LNB output disabled -- 0.3 0.5 mA IIN_ON EN = 1, VLNB = 18.3V, Tone = 0V -- 10 18 mA IIN_ON EN = 1, VLNB = 18.3V, 22kHz TONE Input -- 16 28 mA Boost Switch On Resistance RDS(ON) ILNB = 450mA -- 150 300 m Switching Frequency fSW 600 700 800 kHz Switch Current Limit ILIMSW VIN = 10V, VLNB = 20.5V -- 3 -- A Linear Regulator Voltage Drop VDROP VBOOST-VLNB, ILNB = 450mA -- 0.85 -- V Output Voltage Rise Time TR_LNB For VLNB = 13.3V18.3V, CLNB = 100nF, ILNB = 450mA -- 3 10 ms Output Voltage Pull-Down Time TF_LNB For VLNB = 18.3V13.3V, CLNB = 100nF, ILNB = 0mA -- 3 10 ms
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5047-02 July 2017 www.richtek.com Parameter Symbol Test Conditions Min Typ Max Unit Ripple and Noise on LNB Output VRIP_PP 20MHz bandwidth limit (GBD) -- 20 -- mVPP Load Regulation VOUT_LOAD VLNB = 13.3V, ILNB = 50mA to 450mA -- 38 76 mV VLNB = 18.3V, ILNB = 50mA to 450mA -- 45 90 Line Regulation VOUT_LINE VIN = 9 to 14V, VLNB = 13.3V, ILNB = 50mA 10 -- 10 mV VIN = 9 to 14V, VLNB = 18.3V, ILNB = 50mA 10 -- 10 Protection Output Over-Current Limit ILIM_LNB1 VLNB = 13.3V/18.3V 500 550 650 mA Output Over-Current Disable Time TDIS_ON VLNB short to GND -- 45 -- ms Output Over-Current Disable Time TDIS_OFF VLNB short to GND (GBD) -- 1800 -- ms VIN Under-Voltage Lockout Threshold VUVLO VIN falling -- 7.35 -- V VIN Turn On Threshold VIN_TH VIN rising -- 7.7 8 V VIN Under-Voltage Lockout Hysteresis VUVLOHYS -- 350 -- mV OTP Threshold TOTP -- 140 -- C OTP Hysteresis TOTPHYS -- 15 -- C TONE TONE Frequency FTONE 20 22 24 kHz TONE Amplitude, Peak to Peak VTONE_PP ILNB = 50 to 450mA, CLNB = 200nF 550 700 900 mVPP TONE Duty Cycle DCTONE ILNB = 0 to 450mA, CLNB = 570nF 40 50 60 % TONE Rise Time TRTONE ILNB = 0 to 450mA, CLNB = 570nF 5 10 15 s TONE Fall Time TFTONE ILNB = 0 to 450mA, CLNB = 570nF 5 10 15 s TONE Logic Input VTONE_H 1.2 -- -- V VTONE_L -- -- 0.4 V TONE Input Leakage ITONELKG -- 5 10 A ENABLE, SEL Pins EN Logic Input VEN_H 1.2 -- -- V VEN_L -- -- 0.4 V EN Input Leakage IENLKG -- 5 10 A SEL Logic Input VSEL_H 1.2 -- -- V VSEL_L -- -- 0.4 V SEL Input Leakage ISELLKG -- 5 10 A
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5047-02 July 2017 Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. JA is measured at T A = 25C on a high effective thermal conductivity four -layer test board per JEDEC 51 -7. JC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Operation at VIN = 16V may be limited by power loss in the linear regulator.
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5047-02 July 2017 www.richtek.com Typical Application Circuit VIN CBST 20μF/30μF VIN RT5047 10μF LX SEL TONE GND LNB CLNB 0.1μF Max. 550mA CIN2 1μF CIN1 2x10μF BOOST EN VLNB SS14 SS14 SMDJ20A SS14 SS141 9 (Exposed Pad) COMP Note : 1. D2, D3, D4, D5 are used for surge protection. 2. The capacitor C3 should not be less than 1F for the power stability. 3. EN, TONE and SEL are connected to microcontroller directly.
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5047-02 July 2017 Typical Operating Characteristics Boost Efficiency vs. Output Current 100 Output Current (A) Efficiency (%) VIN = 12V, VBOOST = 14.3V System Efficiency vs. Output Current 100 Output Current (A) Efficiency (%) VIN = 12V, VBOOST = 14.3V, VLNB = 13.3V Tone Amplitude vs. Temperature 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 -50 -25 0 25 50 75 100 125 Temperature (°C) Tone Amplitude (V) VIN = 12V, VLNB = 13.3V, TONE enable Tone Amplitude vs. Output Current 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 Output Current (A) Tone Amplitude (V) VIN = 12V, VLNB = 13.3V, TONE enable Output Voltage vs. Temperature -50 -25 0 25 50 75 100 125 Temperature (°C) Output Voltage (V) VIN = 12V VLNB_18.3V VLNB_13.3V Output Voltage vs. Output Current Output Current (A) Output Voltage (V) VLNB_13.3V VIN = 12V VLNB_ 18.3V
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5047-02 July 2017 www.richtek.com Over Current Protect vs. Temperature 0.50 0.55 0.60 0.65 0.70 -25 0 25 50 75 100 125 Temperature (°C) Current (A) VIN = 12V, VLNB = 13.3V Under Voltage Lockout vs. Temperature 7.00 7.20 7.40 7.60 7.80 8.00 -50 -25 0 25 50 75 100 125 Temperature (°C) Under Voltage Lockout (V) 1 VIN = 12V VLNB_ac (200mV/Div) Time (50s/Div) Tone Output VIN = 12V VSEL from 0V to 3.3V, CLNB = 0.1F, VLNB from 13V to 18V VLNB (5V/Div) VSEL (2V/Div) Time (500s/Div) Output Voltage Transition Rising VIN = 12V, VSEL from 3.3V to 0V, CLNB = 1F, VLNB from 18V to 13V VLNB (5V/Div) VSEL (2V/Div) Time (500s/Div) Output Voltage Transition Falling VIN = 12V VIN (10V/Div) VBOOST (10V/Div) VLNB (10V/Div) Time (5ms/Div) Power On Sequence
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5047-02 July 2017 VIN = 12V VBOOST (5V/Div) VLNB (5V/Div) ILNB (500mA/Div) Time (500ms/Div) Over Current Protection
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5047-02 July 2017 www.richtek.com
Application Information
Boost Converter/Linear Regulator The 5047 integrates a current-mode boost converter and linear regulator. Use the SEL pin to control the LNB voltage and the boost converter track is at least greater 800mV than the LNB voltage . The boost converter is high efficiency PWM architecture with 700kHz operation frequency . The linear regulator has the capability to source current up to 550mA during continuous operation. All the loop compensation, current sensing, and slope compensation functions are provided internally. The RT5047 has current limiting on the boost converter and the LNB output to protect the IC against short circuits. The internal MOSFET will turn off when the LX current is higher than 3A cycle-by-cycle. The LNB output will turn off when the output current higher than the 550mA and 45m s and turn -on after 1800m s automatically. Input Capacitor Selection The input capacitor reduces voltage spikes from the input supply and minimizes noise injection to th e converter. A 30 F capacitance is sufficient for most applications. Nevertheless, a higher or lower value may be used depending on the noise level from the input supply and the input current to the converter. Note that the voltage rating of the input capacitor must be greater than the maximum input voltage. Inductor Selection The inductance depends on the maximum input current. As a general rule, the inductor ripple current range is 20% to 40% of the maximum input current. If 40% is selected as an example, the inductor ripple current can be calculated according to the following equations : OUT OUT(MAX) IN(MAX) IN RIPPLE IN(MAX) VII = V I = 0.4 I where η is the efficiency of the converter, I IN(MAX) is the maximum input current, and IRIPPLE is the inductor ripple current. The input pe ak current can then be obtained by adding the maximum input current with half of the inductor ripple current as shown in the following equation : IPEAK = 1.2 x IIN(MAX) note that the saturated current of the inductor must be greater than I PEAK. The inductance can eventually be determined according to the following equation : IN OUT IN OUT OUT(MAX) OSC η V V VL
0.4 V I f
where f OSC is the switching frequency. For better system performance, a shielded inductor is preferred to avoid EMI problems. Boost Output Capacitor Selection The RT5047 boost regulator is internally compensated and relies on the inductor and output capacitor value for overall loop stability. The output capacitor is in the 30F to 50 F range with a low ESR, as strongly recommended. The voltage rating on this capacitor should be in the 25V to 35V range since it is connected to the boost VOUT rail. The output ripple voltage is an important index for estimating chip performance. This portion consists of two parts. One is the product of the inductor current with the ESR of the output capacitor, while the other part is formed by the charging and discharging process of the output capacitor. As shown in Figure 1, VOUT1 can be evaluated based on the ideal energy equalization. According to t he definition of Q, the Q value can be calculated as the following equation : IN L OUT IN L OUT IN OUT OUT1 OUT OSC 1 1 1Q = I I I I I I2 2 2 V 1 = C VVf where f OSC is the switching frequency and IL is the inductor ripple current. Bring C OUT to the left side to estimate the value of VOUT1 according to the following equation : OUTOUT1 OUT OSC DIV = Cf
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Figure 1. The Output Ripple Voltage without the forward-voltage drop and fast switching speed. since it increases with temperature. more than 45ms, the LNB output will be disabled. allowed to restart by normal start operation.
- The rise time and fall time of the VLNB is 3mS (typ.).
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. signal, the LNB linear regulator output will carry a 22kHz, 700mV peak to peak signal for DiSEqC 1.x communication. Figure 2. Tone Generation Options successful soft-start process.
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. required, up to a maximum of 45ms. difference between junction and ambient temperature. temperature on the maximum power dissipation. Figure 3. Derating Curve of Maximum Power
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. stability. The following descriptions are the guidelines for better PCB layout. enough especially for the high-current loop. Minimize the size of the LX node and keep it wide and shorter. The exposed pad of the chip should be connected to a strong ground plane for maximum thermal consideration. noise coupling into other circuits. short especially for the high-current loop. Figure 4. PCB Layout Guide
Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5047-02 July 2017 Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 Option 1 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 Option 2 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is curre nt and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for an y infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its su bsidiaries.