RT2825 RICHTEK | Alldatasheet
Document overview
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Technical content
Features
Wide Input Supply Voltage Range : 4.5V to 18V Fully Integrated Dual-Buck, Up to 5A/5A Adjustable Switching Frequency 200kHz to 1MHz Set by External Resistor or SYNC Signal Dedicated Enable/Soft-Start for Each Buck Current Mode Control with Simple Compensation Circuit Adjustable Cycle-by-Cycle Current Limit Set by External Resistor Over-Temperature Protection Power Good Indicator Discontinuous Operating Mode at Light Load when LOWP = L RoHS Compliant and Halogen Free
Applications
DTV TCON BDVD Set Top Boxes Tablet Note : ***Empty means Pin1 orientation is Quadrant 1 Richtek products are : RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes.
Ordering Information
QV : VQFN-36L 6x6 (V-Type) RT2825 Lead Plating System G : Green (Halogen Free and Pb Free) Pin 1 Orientation*** (2) : Quadrant 2, Follow EIA-481-D
DS2825-00 May 2017www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Pin No. Pin Name Pin Function 1, 2 VIN2 Power input for CH2. Place a 10 F ceramic capacitor close to this pin. 3 NC No internal connection. 4 LOWP Discontinuous operation mode input. 5 PVCC 5V power supply output. Connect a capacitor 1uF between this pin and AGND. 6 VINR Supply voltage input for internal control circuit. 7,8 VIN1 Power input for CH1. Place a 10 F ceramic capacitor close to this pin. 9, 10, 11 PGND1 Power ground for CH1. 12 PG1 Power good indicator output with open-drain of CH1. 13 PG2 Power good indicator output with open-drain of CH2. 14 FB1 Feedback voltage input for CH1. 15 RLIM1 Current limit setting for CH 1. Connect a resistor from RLIM1 to AGND to set the peak current limit on the output inductor. 16 BOOT1 Bootstrap supply for high-side gate driver of CH1. Connect a 0.1 F ceramic capacitor from this pin to LX1 17, 18, 19 LX1 Switch node of CH1. 20 SS1 Soft-start time setting for CH1. Connect a capacitor to this pin and AGND for soft-start time setting.
21 COMP1
Compensation node for CH1. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to AGND. In some cases, an additional capacitor from COMP to AGND is required.
22 ROSC
Oscillator setting. Connect a resistor from ROSC to GND to set the switching frequency. When this pin connects to an external clock, the internal oscillator will synchronize to the external clock. 23 AGND Analog ground. Functional Pin Description Marking Information Pin Configuration (TOP VIEW) VQFN-36L 6x6 PGND 181716151413121110 282930313233343536 VIN2 VIN2 NC LOWP PVCC VINR VIN1 VIN1 PGND1 LX2 LX2 SS2 COMP2 AGND ROSC COMP1 SS1 LX1 PGND1 PGND1 PG1 PG2 FB1 RLIM1 BOOT1 LX1 LX1 PGND2 PGND2 PGND2 EN2 EN1 FB2 RLIM2 BOOT2 LX2 RT2825 GQV YMDNN RT2825GQV : Product Number YMDNN : Date Code
DS2825-00 May 2017 www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Pin No. Pin Name Pin Function
24 COMP2
Compensation node for CH2. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to AGND. In some cases, an additional capacitor from COMP to AGND is required. 25 SS2 Soft-start time setting for CH2. Connect a capacitor to this pin and AGND for soft-start time setting. 26, 27, 28 LX2 Switch node of CH2. 29 BOOT2 Bootstrap supply for high-side gate driver of CH2. Connect a 0.1 F ceramic capacitor from this pin to LX2 30 RLIM2 Current limit setting for CH2. Connect a resistor from RLIM2 to AGND to set the peak current limit on the output inductor. 31 FB2 Feedback voltage input for CH2. 32 EN1 Enable control input for CH1. A low level signal on this pin disables it. If this pin is left open, a weak internal pull-up will allow automatic enables. 33 EN2 Enable control input for CH2. A low level signal on this pin disables it. If this pin is left open, a weak internal pull-up will allow automatic enables. 34, 35, 36 PGND2 Power ground for CH2. 37 (Exposed Pad) PGND Ground. The exposed pad must be soldered to a large PCB and connected to PGND for maximum power dissipation.
DS2825-00 May 2017www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Operation UV Comparator If the feedback voltage (VFB) is lower than threshold voltage (91% of V REF), the UV Comparator's output goes high and the logic control circuit is allowed to turn on the MOSFET to pull PG1/PG2 pin to low. OV Comparator If the feedback voltage (V FB) is higher than threshold voltage (109% of VREF), the OV Comparator's output goes high and the logic control circuit is allowed to turn on the MOSFET to pull PG1/PG2 pin to low. Voltage Reference The converter produces a precise ±1% voltage reference over-temperature by scaling the output of a temperature stable bandgap circuit. Functional Block Diagram Buck 1 Buck 2 Internal Regulator OSC VINR VIN1 EN1 RLIM1 SS1 ROSC VIN2 EN2 RLIM2 SS2 LOWP VCC PVCC PVCCVCC BOOT1 LX1 FB1 COMP1 BOOT2 LX2 FB2 COMP2 Power Good VCC PGND2 PGND1 PG1 PG2 AGND AGND AGND Error Amplifier The device uses a transconductance error amplifier. The error amplifier compares the FB pin voltage with the SS pin voltage and the internal reference voltage which is 0.6V. The transconductance of the error amplifier is 1300 μA/V during normal operation. The compensation network should be connected between the COMP pin and ground. Oscillator with RT/SYNC Function The switching frequency is adjustable by an external resistor connected between the ROSC pin and GND. The available frequency range is from 200kHz to 1MHz. An internal synchronized circuit has been implemented to switch from RT mode to SYNC mode. To implement the synchronization function, connect a square wave clock signal to the ROSC pin with a duty cycle between 10% to 90%. The switching cycle is synchronized to the falling edge of the external clock at ROSC pin.
DS2825-00 May 2017 www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Electrical Characteristics
(VIN = 4.5V to 18V, TA = −45°C to 105°C, unless otherwise specified) Absolute Maximum Ratings (Note 1) Power Dissipation, PD @ TA = 25°C Package Thermal Resistance (Note 2) ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4) Parameter Symbol Test Conditions Min Typ Max Unit Input Supply VIN Operating Input Voltage V IN 4.5 -- 18 V Shutdown Supply Current I SHDN VEN1 = VEN2 = 0V -- 5 -- A Supply Current (No Switching) I Q_NSW VEN1 = VEN2 = VLOWP = 3.3V, without bucks switching -- 2.6 -- mA Supply Current (Switching) I Q_SW VEN1 = VEN2 = VLOWP = 3.3V, with bucks switching -- 30 -- mA VINR Internal UVLO Threshold UVLO VINR rising -- 4.25 4.5 V VINR falling 3.5 3.75 -- Hysteresis -- 0.5 -- 5.1V LDO V PVCC VPVCC load current = 0A -- 5.1 -- V Enable EN Threshold V IH Rising -- 1.21 1.26 V EN Threshold V IL Falling 1.1 1.17 -- V
DS2825-00 May 2017www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit EN Pull High Current V EN = 1.1V -- 3 -- A EN Hysteresis Current V EN = 1.3V -- 3 -- A Oscillator Switching Frequency f OSC ROSC = 36k 800 1000 1200 kHz ROSC = 90.9k 352 440 528 ROSC = 210k 160 200 240 Switching Frequency Range (RT/SYNC Mode) Include Sync Mode and RT Mode Set Point 200 -- 1000 kHz Minimum Pulse Width -- 20 -- ns SYNC Threshold Voltage High-Level -- -- 2 V Low-Level 0.8 -- -- SYNC Falling Edge to LX Rising Edge Delay Measure at 500kHz with ROSC resistor in series -- 66 -- ns Buck1, Buck2 Converters Reference Voltage V REF 0A ILOAD 6A 0.594 0.6 0.606 V Line Regulation I OUT = 2A -- 0.5 -- %/V Load Regulation I OUT = (10% - 90%) x IOUT(MAX) -- 0.5 -- %/A Error Amplifier GM 2A < ICOMP < 2A, VCOMP = 1V -- 1300 -- MHOS COMP to Iswitch GN -- 16 -- A/V SS Charge Current -- 6 -- A Upper Switch Current Limit R LIM = 60.4k -- 8.4 -- A Lower Sinking Current Limit -- 2.6 -- A High-Side Switch On-Resistance RDS(ON)_U -- 31 48 m Low-Side Switch On-Resistance RDS(ON)_L -- 23 36 m Minimum On-Time t ON_MIN -- 70 100 ns BOOT-PH UVLO -- 2.1 3 V Hiccup Wait Time -- 512 -- cycles Hiccup Time before Re-start -- 16384 -- cycles Power Good Power Good Rising Threshold V FB rising (Good) -- 94 -- V FB rising (Fault) -- 109 -- Power Good Falling Threshold V FB falling (Fault) -- 91 -- V FB falling (Good) -- 106 -- Over-Temperature Protection Thermal Shutdown T SD -- 160 -- °C Thermal Shutdown Hysteresis TSD -- 20 -- °C
DS2825-00 May 2017 www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured under natural convection (still air) at T A = 25 °C with the component mounted on a high effective- thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Parameter Symbol Test Conditions Min Typ Max Unit LOWP Threshold Voltage High-Level -- -- 2 V Low-Level 0.8 -- --
DS2825-00 May 2017www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Application Circuit BOOT1 26, 27, 28 17,18, 19 FB1 COMP1 LX1 PVCC BOOT2 LX2 FB2 C10 1µF C17 22µF x 4 R12 C16 100nF R13 VOUT2 1.8V/5A 22µF x 4 100nF VOUT1 1.2V/5A RLIM1 15 60k RLIM2 30 R10 60k COMP2 24 C12 C11 RT2825 VINR LOWP 9, 10, 11 AGND PGND1 Input Signal 10µF 34, 35, 36 PGND2 VIN 4.5V to 18V EN1 7, 8 VIN1 100k 10µF EN2 1, 2 VIN2 R11 100k C15 10µF SS1 ROSC 10nF 90.9k 12PVCC PG1 100k SS225 C13 10nF 13PVCC PG2 100k
©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Table 1. Suggested Component Values de-rating effect, like a DC Bias.
DS2825-00 May 2017www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Operating Characteristics Efficiency vs. Output Current 100 012345 Output Current (A) Efficiency (%) VOUT = 3.3V Forced PWM Auto PSM-PWM Efficiency vs. Output Current 100 012345 Output Current (A) Efficiency (%) VOUT = 5V Forced PWM Auto PSM-PWM Output Voltage vs. Output Current 3.240 3.250 3.260 3.270 3.280 3.290 3.300 3.310 3.320 3.330 3.340 3.350 3.360 0123456 Output Current (A) Output Voltage (V) VOUT = 3.3V Auto PSM-PWM Forced PWM Output Voltage vs. Output Current 4.900 4.910 4.920 4.930 4.940 4.950 4.960 4.970 4.980 4.990 5.000 5.010 5.020 5.030 5.040 0123456 Output Current (A) Output Voltage (V) Auto PSM-PWM Forced PWM VOUT = 5V Efficiency vs. Output Current 100 Output Current (A) Efficiency (%) VOUT = 5V Auto PSM-PWM Forced PWM Efficiency vs. Output Current 100 Output Current (A) Efficiency (%) VOUT = 3.3V Auto PSM-PWM Forced PWM
DS2825-00 May 2017 www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (2 μs/Div) Output Ripple Voltage VOUT1 (20mV/Div) VLX1 (10V/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3.5A, Forced PWM VLX2 (10V/Div) VOUT2 (20mV/Div) Time (2 μs/Div) Output Ripple Voltage VOUT1 (20mV/Div) VLX1 (10V/Div) VIN = 12V, VOUT = 3.3V, IOUT = 0A, Forced PWM VLX2 (10V/Div) VOUT2 (20mV/Div) Input Voltage vs. Output Voltage 4.900 4.910 4.920 4.930 4.940 4.950 4.960 4.970 4.980 4.990 5.000 5.010 5.020 5.030 6 8 10 12 14 16 18 Input Voltage (V) Output Voltage (V) VOUT = 5V Auto PSM-PWM 0A Forced PWM 4.5A Forced PWM 0A Input Voltage vs. Output Voltage 3.260 3.270 3.280 3.290 3.300 3.310 3.320 3.330 3.340 3.350 6 8 10 12 14 16 18 Input Voltage (V) Output Voltage (V) VOUT = 3.3V Forced PWM 4.5A Forced PWM 0A Auto PSM-PWM 0A Time (1ms/Div) Power On from Enable VOUT1 (3V/Div) EN1/EN2 (2V/Div) VOUT2 (3V/Div) VIN = 12V, VOUT = 3.3V, IOUT = 0A, startup with enable Time (5 μs/Div) Output Ripple Voltage VOUT1 (20mV/Div) VLX1 (10V/Div) VIN = 12V, VOUT = 3.3V, IOUT1 = 0.1A, IOUT2 = 0.3A, Auto PSM-PWM VLX2 (10V/Div) VOUT2 (20mV/Div)
DS2825-00 May 2017www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (10ms/Div) Hiccup Recover VOUT1 (2V/Div) ILX1 (4A/Div) VIN = 12V, VOUT = 3.3V Time (100 μs/Div) Load Transient Response VOUT1 (100mV/Div) IOUT1 (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT1 = 0.5A to 2.5A Time (200 μs/Div) Load Transient Response VOUT1 (200mV/Div) VOUT2 (200mV/Div) IOUT1 (2A/Div) IOUT2 (2A/Div) IOUT1 = 2.5A to 4.5A IOUT2 = 0.5A to 2.5A VIN = 12V, VOUT = 3.3V Time (10ms/Div) Power Off from Enable VOUT1 (2V/Div) EN1/EN2 (2V/Div) VOUT2 (2V/Div) VIN = 12V, VOUT = 3.3V, IOUT = 0A, startup with enable Time (200 μs/Div) Load Transient Response VOUT2 (100mV/Div) IOUT2 (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT2 = 0.5A to 2.5A Time (500 μs/Div) Power On than Short VOUT1 (2V/Div) ILX1 (4A/Div) VIN = 12V, VOUT = 3.3V
DS2825-00 May 2017 www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (1 μs/Div) SYNC at 500kHz SYNC (1V/Div) VIN = 12V, VOUT = 3.3V VLX1 (10V/Div) VLX2 (10V/Div) Time (500 μs/Div) Power On than Short VOUT2 (2V/Div) ILX2 (4A/Div) VIN = 12V, VOUT = 3.3V Time (10ms/Div) Hiccup Recover VOUT2 (2V/Div) ILX2 (4A/Div) VIN = 12V, VOUT = 3.3V
DS2825-00 May 2017www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Application Information
The RT2825 features two synchronous wide input range high efficiency buck converters that cab deliver up to 5A/ 5A output current from a 4.5V to 18V input supply. Each Buck PWM converter with two integrated N-MOSFETs. It provides good performance during load and line transients by implementing a single feedback loop, current-mode control, and external compensation. The integrated synchronous power switches can increase efficiency and it is suitable for lower duty cycle applications. The switching frequency can be externally set from 200kHz to 1MHz which allows for high efficiency and optimal size selection of output filter components. In additional, there is a synchronization mode control in this device which can be synchronized to the external clock frequency, and easily switched from internal switching mode to synchronization mode. The device contains a power good protection and an external soft-start function that is able to monitor the system output voltage for normal regulation and provides a programmable power up sequence for avoiding inrush currents efficiently. Furthermore, the device incorporates a lot of protections such as OVP, OCP, OTP and etc. Main Control Loop The device implements an adjustable fixed frequency with peak current-mode control which offers an excellent performance over various line and loading. During normal operation, the internal high-side power switch is turned on by the internal oscillator initiating. Current in the inductor increases until the high-side switch current reaches the current reference converted by the output voltage V COMP of the error amplifier. The error amplifier adjusts its output voltage by comparing the feedback signal from a resistive voltage divider on the FB pin with an internal 0.6V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier increases its current reference until the average inductor current matches the new load current. When the high-side power MOSFET turns off, the low- side synchronous power switch (N-MOSFET) turns on until the beginning of the next clock cycle. VINR and VIN Pins The VINR and VIN pins can be used together or separately for a variety of applications. In this device, the VINR pin is an input for supplying internal reference and control circuitry and the VIN pin is an input for providing main power to device system and internal high-side power MOSFET. When the VINR and VIN pins are tied together, both pins can operate from 4.5V to 18V. When the VINR and VIN pins are used separately, VINR pin must be ranged from 4.5V to 18V, and the VIN pin can be applied down to as low as 1.6V to 18V. The device incorporates an internal Under-Voltage Lockout (UVLO) circuitry on the VIN pin. If the VIN pin voltage exceeds the UVLO rising threshold voltage 4.25V, the converter resets and prepares the PWM for operation. If the VINR pin voltage falls below the falling threshold voltage 3.75V during normal operation, the device is disabled. Such wide internal UVLO hysteresis of 500mV can efficiently prevent noise caused reset. There is also an external UVLO circuitry which can be achieved by configuring a resistive voltage divider on EN pin for both input VINR and VIN pins and it is able to provide either input pins an adjustable UVLO function to ensure a proper power up behavior. More discussions are located in the section of Enable Operation. Output Voltage Setting The resistive voltage divider allows the FB pin to sense the output voltage as shown in Figure 1. Figure 1. Setting the Output Voltage
©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Table 2. Suggested Capacitors for CIN and COUT
DS2825-00 May 2017 www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. The selection of COUT is determined by the required ESR to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key for C OUT selection to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response. The output ripple ΔV OUT is determined by Equation (8) : OUT L OUT 1VI E S R 8fC (8) Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input V IN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at V IN large enough to damage the part. Output Over-Current Protection (Hiccup Mode) For the RT2825, a hiccup mode of Over-Current Protection (OCP) is incorporated. For example, when the power supply output is shorted to ground and the high-side switch over current condition is kept for more than 512 switching cycles which is named hiccup wait time, the hiccup mode is triggered to force the device to stop switching for a period of time. During the shutdown period, the internal oscillator continuously counts and it is allowed to recover switching after the hiccup time of 16384 cycles. Such periodically re-start condition continues until the OCP condition is removed and then the device returns to normal operation. The hiccup mode of OCP can reduce input average current to avoid the thermal issue in short-circuit conditions efficiently. Output Over-Voltage Protection The device provides an output Over-Voltage Protection (OVP) once the output voltage exceeds 109% of V OUT, the OVP function turns off the high-side power MOSFET to stop current flowing to the output which can only be released when the output voltage drops below 106% of V OUT. There is a 5μs delay also built into the over-voltage protection circuit to prevent false transition. Using this OVP feature can easily minimize the output overshoot. High-Side MOSFET Over-Current Protection The Over-Current Protection (OCP) of high-side MOSFET is implemented in this device, it adopts monitoring inductor current during the on-state to control the COMP pin voltage for turning off the high-side MOSFET. Each cycle the separated inductor current signal is compared through sensing the external inductor current to the COMP pin voltage from an error amplifier output. If the separated inductor current peak value exceeds the set current limit threshold, the high-side power switch is turned off. Low-Side MOSFET Over-Current Protection The device not only implements the high-side over-current protection but also provides the over sourcing current protection and over sinking current protection for low-side MOSFET. With these three current protections, the IC can easily control inductor current at both side power switches and avoid current runaway for short-circuit condition. For the sourcing current protection, there is a specific comparator in internal circuitry to compare the low-side MOSFET sourcing current to the internal set current limit at the end of every clock cycle. When the low-side sourcing current is higher than the set sourcing limit, the high-side power switch is not turned on and low-side power switch is kept on until the following clock cycle for releasing the above sourcing current to the load. It is allowed to turn on the high-side MOSFET again when the low-side current is lower than the set sourcing current limit at the beginning of a new cycle. For the sinking current protection, it is implemented by detecting the voltage across the low-side power switch. If the low-side reverse current exceeds the set sinking limit, both power switches are off immediately, and it is held to stop switching until the beginning of next cycle. By incorporating this additional protection, the device is able to prevent an excessive sinking current from the load during the condition of pre-biased output and the SS pin is asserted high that is 2.1V or above.
©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. on the maximum power dissipation. Figure 10. Derating Curve of Maximum Power
DS2825-00 May 2017 www.richtek.com ©Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Outline Dimension V-Type 36L QFN 6x6 Package Min. Max. Min. Max. A 0.800 1.000 0.031 0.039 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 5.900 6.100 0.232 0.240 D2 4.050 4.150 0.159 0.163 E 5.900 6.100 0.232 0.240 E2 4.050 4.150 0.159 0.163 e L 0.500 0.600 0.020 0.024 Symbol Dimensions In Millimeters Dimensions In Inches 0.500 0.020 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2
DS2825-00 May 2017www.richtek.com Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before p lacing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuit ry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Ric htek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by i mplication or otherwise under any patent or patent rights of Richtek or its subsidiaries.