R7731 RICHTEK | Alldatasheet
Document overview
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- PDF pages: 11
Technical content
Features
zzzzz Very Low Start-Up Current (<30μμμμμA) zzzzz 10/14V UVLO zzzzz Soft-Start Function zzzzz Current Mode Control zzzzz Jittering Switching Frequency zzzzz Internal Leading Edge Blanking zzzzz Built-in Slope Compensation zzzzz Burst Triple Mode PWM for Green-Mode zzzzz Cycle-by-Cycle Current Limiting zzzzz Feedback Open Protection zzzzz Output Over Voltage Protection zzzzz Over Temperature Protection zzzzz Over Load Protection zzzzz Soft Driving for Reducing EMI zzzzz High Noise Immunity zzzzz Opto Coupler Short Protection zzzzz RoHS Compliant and Halogen Free
Applications
z Adaptor and Battery Charger z ATX Standby Power z Set Top Boxes (STB) z DVD and CD(R) z TV/Monitor Standby Power z PC Peripherals Typical Application Circuit VO+ RT COMP GND VDD GATE CS R7731 AC Mains (90V to 265V) VO-
DS7731-03 March 2011www.richtek.com
Ordering Information
E : SOT-23-6 N : DIP-8 Lead Plating System G : Green (Halogen Free and Pb Free) Pin Configurations (TOP VIEW) Note : Richtek products are : \ RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. \ Suitable for use in SnPb or Pb-free soldering processes. Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. DIP-8 678 GATE VDD NC CS RTNCCOMPGND SOT-23-6 GND COMP RT CSVDDGATE
DS7731-03 March 2011 www.richtek.com Function Block Diagram Pin No. SOT-23-6 DIP8 Pin Name Pin Function 1 8 GND Ground. 2 7 COMP Comparator Input Pin. By connecting a photo-coupler to this pin, the peak current set point is adjusted accordingly to the output power requirement. 3 5 RT Set the switching frequency by connecting a resistor to GND. 4 4 CS Primary Current Sense Pin. 5 2 VDD IC Power Supply Pin. 6 1 GATE Gate driver output to drive the external MOSFET. -- 3, 6 NC No Internal Connection. Functional Pin Description LEB VDD R S Q OTP SS Slope Ramp Burst Triple Mode COMP VBURL VBURH VDD PWM comparator Counter Shutdown Logic COMP open sensing Brown out sensing Dmax Jittering Oscillator POR 27V Bias & Bandgap UVLO OVP RT GATE GND CS COMP 14V/10V OLP Constant Power Soft Driver
DS7731-03 March 2011www.richtek.com
Electrical Characteristics
Parameter Symbol Test Conditions Min Typ Max Unit VDD Section VDD Over Voltage Protection Level V OVP 25.5 27 28.5 V On Threshold Voltage V TH_ON 13 14 15 V VDD On/Off Hysteresis V DD_hys 3 4 5 V Start-Up Current I DD-ST V DD = VTH_ON – 0.1V -- 20 30 μA Operating Current I DD-OP VDD = 15V, RT = 100kΩ, GATE = Open, VCOMP = 2.5V -- 1.1 2.2 mA VDD Hold Up Mode Hysteresis Ending Level VDD_hys V COMP < 1.6V -- 11.5 -- V VDD Hold Up Mode Entry Level V DD_Low V COMP < 1.6V -- 11 -- V VDD Clamp Voltage V DD_Clamp -- 29 -- V Oscillator Section (RT pin) Normal PWM Frequency f OSC R T = 100kΩ 60 65 70 kHz Frequency Jittering Range -- ± 4 -- % Maximum Duty Cycle D MAX 70 75 80 % To be continued Recommended Operating Conditions (Note 4) Absolute Maximum Ratings (Note 1) z Power Dissipation, PD @ TA = 25°C z Package Thermal Resistance (Note 2) z ESD Susceptibility (Note 3) (VDD = 15V, RT = 100k Ω, TA = 25°C, unless otherwise specified)
DS7731-03 March 2011 www.richtek.com Note 1. Stresses beyond those listed under “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. θ JA is measured in the natural convection at T A = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design. Parameter Symbol Test Conditions Min Typ Max Unit Frequency Variation Versus VDD Deviation fDV V VDD = 12V to 25V -- -- 2 % Frequency Variation Versus Temperature Deviation fDV T A = −30°C to 105°C (Note 5) -- -- 5 % COMP Input Section Open Loop Voltage V COMP-OP COMP pin Open 5 5.5 6 V COMP Open Loop Protection Delay Cycles TOLP R T = 100kΩ -- 29 -- ms Short Circuit COMP Current I ZERO V CO MP = 0V -- 1.2 2.2 mA Current Sense Section Peak Current Limitation V CSTH 0.65 0.7 0.75 V Leading Edge Blanking Time T LEB -- 420 520 ns Propagation Delay Time T PD -- 100 -- ns GATE Section Rising Time T R V DD = 15V, CL = 1nF -- 250 350 ns Falling Time T F V DD = 15V, CL = 1nF -- 150 250 ns Gate Output Clamping Voltage V clamp V DD = 22V -- 12 -- V Over Temperature Protection T OTP 140 -- -- °C OTP Hysteresis T OTP_hys -- 30 -- °C
DS7731-03 March 2011www.richtek.com Typical Operating Characteristics VTH vs. Temperature -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) VDD (V) VTH_ON VTH_OFF IDD-ST vs. Temperature -40 -15 10 35 60 85 110 135 Temperature (°C) IDD-ST (μA) VDD = 13V IDD-OP vs. Temperature 1.25 1.30 1.35 1.40 1.45 1.50 1.55 -40 -15 10 35 60 85 110 135 Temperature (°C) IDD-OP (mA) VCOMP = 2V, CL = 1nF VDD = 11V VDD = 27V VDD = 15V fOSC vs. Temperature -40 -15 10 35 60 85 110 135 Temperature (°C) fOSC (kHz) VDD = 11V VDD = 27V VDD = 15V DMAX vs. Temperature -40 -20 0 20 40 60 80 100 120 Temperature (°C) DMAX (%) VCOMP vs. Temperature 5.15 5.20 5.25 5.30 5.35 5.40 5.45 5.50 -40 -20 0 20 40 60 80 100 120 Temperature (°C) VCOMP (V) COMP Open Voltage
DS7731-03 March 2011 www.richtek.com VOH vs. VDD 11 12 13 14 15 16 17 18 19 20 21 22 VDD (V) VOH (V) ISOURCE = 20mA VOL vs. VDD 400 425 450 475 500 525 550 575 600 11 12 13 14 15 16 17 18 19 20 21 22 VDD (V) VOL (mV) ISINK = 20mA ISUPPLY vs. VDD 0.408 0.410 0.412 0.414 0.416 0.418 0.420 0.422 0.424 0.426 11 12 13 14 15 16 17 18 19 20 21 22 VDD (V) ISUPPLY (mA) VCOMP Open No Gate Output ISUPPLY = IDD-OP − ICOMP Clamp Voltage vs. Temperature 10.0 10.5 11.0 11.5 12.0 12.5 13.0 -40 -15 10 35 60 85 110 135 Temperature (°C) Voltage (V) VDD = 20V, CL = 1nF GATE (Rising/Falling) vs. Temperature 100 150 200 250 300 350 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) GATE (ns) VDD = 20V, CL = 1nF Rising Falling ISUPPLY vs. Temperature 0.30 0.35 0.40 0.45 0.50 -40 -20 0 20 40 60 80 100 120 Temperature (°C) ISUPPLY (mA) COMP Open No Gate Output ISUPPLY = IDD-OP − ICOMP
ON/OFF cycle of IC. This will last until fault is removed. modes in R7731. Please also refer to Figure. 3 for details. will run at traditional PWM current mode. after VDD is running low and triggers UVLO. will be shutdown after 20us deglitch delay. hiccup till over temperature condition is gone. Figure 3. Burst Triple Mode signal goes back to VburH, switching will be resumed. have any patent infringement issue.
DS7731-03 March 2011www.richtek.com Outline Dimension A e b B D C H L SOT-23-6 Surface Mount Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.889 1.295 0.031 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024
DS7731-03 March 2011 www.richtek.com Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringemen t of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed b y Richtek. Richtek Technology Corporation Taipei Office (Marketing) 5F, No. 95, Minchiuan Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)86672399 Fax: (8862)86672377 Email: marketing@richtek.com J A B E C I D L F 8-Lead DIP Plastic Package Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 9.068 9.627 0.357 0.379 B 6.198 6.604 0.244 0.260 C 3.556 4.318 0.140 0.170 D 0.356 0.559 0.014 0.022 E 1.397 1.651 0.055 0.065 F 2.337 2.743 0.092 0.108 I 3.048 3.556 0.120 0.140 J 7.366 8.255 0.290 0.325 L 0.381 0.015