PLL602-03 PLL | Alldatasheet

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Technical content

Low Phase Noise CMOS XO (48MHz to 100MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1

FEATURES

  • Low phase noise XO outp ut for the 48MHz to 100MHz range (-130 dBc at 10kHz offset).
  • 12 to 25MHz crystal input.
  • Integrated crystal load capacitor: no external load capacitor required.
  • Low jitter (RMS): 3ps period jitter (1 sigma).
  • Selectable High Drive (30mA) or Standard Drive (10mA) output.
  • 3.3V operation.
  • Available in 8-Pin TSSOP or SOIC.

DESCRIPTION

The PLL602-03 is a low cost, high performance and low phase noise XO, providing less than -130dBc at 10kHz offset in the 48MHz to 100MHz operating range. The very low jitter (3ps RMS period jitter) makes this chip ideal for applications requiring clean reference frequency sources. Input crystal can range from 12 to 25MHz (fundamental resonant mode). PIN CONFIGURATION OUTPUT RANGE MULTIPLIER FREQUENCY RANGE OUTPUT BUFFER X4 48 - 100MHz CMOS BLOCK DIAGRAM Reference Divider Phase Comparator Charge Pump Loop Filter VCO VCO Divider XTAL OSC OEXIN XOUT CLK PLL602-031 8CLK VDD OE^ XIN GND N/C XOUT GND Note: ^ denotes internal pull up

Low Phase Noise CMOS XO (48MHz to 100MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2 PIN DESCRIPTIONS Name Number Type Description CLK 1 O Output clock. VDD 2 P power supply. OE 3 I Output enable input. Disables (tri-state) output when low. Internal pull-up enables output by default if pin is not connected to low. XIN 4 I Crystal input. See Crystal Specification on page 3. XOUT 5 I Crystal output. See Cr ystal Specification on page 3. N/C 6 - Not connected. GND 7, 8 P Ground. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage V DD 4.6 V Input Voltage, dc V I -0.5 V DD +0.5 V Output Voltage, dc V O -0.5 V DD +0.5 V Storage Temperature T S -65 150 °C Ambient Operating Temperature* T A -40 85 °C Junction Temperature T J 125 °C Lead Temperature (soldering, 10s) 260 °C ESD Protection, Human Body Model 2 kV Exposure of the device under conditions beyond the limits specif ied by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. Thes e conditions represent a stress rating on ly, and functional operations of the devic e at these or any other con- ditions above the operational limits noted in this specification is not implied. * Note : Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only . 2. DC Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current, Dynamic, with Loaded Outputs IDD FXIN = 12 - 25MHz Output load of 10pF 16 20 mA Operating Voltage V DD 2.97 3.63 V IOH V OH = V DD -0.4V, V DD =3.3V 30 mA Output drive current (High Drive) IOL V OL = 0.4V, V DD = 3.3V 30 mA IOH V OH = V DD -0.4V, V DD =3.3V 10 mA Output drive current (Standard Drive) IOL V OL = 0.4V, V DD = 3.3V 10 mA Short Circuit Current ±50 mA

Low Phase Noise CMOS XO (48MHz to 100MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3 3. AC Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Input Crystal Frequency 12 25 MHz Output Clock Rise/Fall Time (Standard Drive) 0.3V ~ 3.0V with 15 pF load 2.4 Output Clock Rise/Fall Time (High Drive) 0.3V ~ 3.0V with 15 pF load 1.2 ns Output Clock Duty Cycle Measured @ 50% V DD 45 50 55 % 4. Jitter and Phase Noise Specification PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS RMS Period Jitter (1 sigma – 1000 samples) at 80MHz, with capacitive decoupling between VDD and GND. 3.5 ps Phase Noise relative to carrier 80M Hz @100Hz offset -103 dBc/Hz Phase Noise relative to carrier 80M Hz @1kHz offset -122 dBc/Hz Phase Noise relative to carrier 80M Hz @10kHz offset -130 dBc/Hz Phase Noise relative to carrier 80M Hz @100kHz offset -125 dBc/Hz 5. Crystal Specifications PARAMETERS SYMBOL MIN. TYP. MAX. UNITS Crystal Resonator Frequency FXIN 12 25 MHz Crystal Loading Capacitance Rating CL (xtal) 20 pF Driving power 1 mW ESR R S 30 Ω

PACKAGE INFORMATION

C L A

8 PIN ( dimensions in mm )

Symbol Min. Max. A 1.47 1.73 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 4.95 E 3.80 4.00 H 5.80 6.20 L 0.38 1.27 e 1.27 BSC E H D e B TSSOP Min. Max. - 1.20 0.05 0.15 0.19 0.30 0.09 0.20 2.90 3.10 4.30 4.50 6.20 6.60 0.45 0.75

0.65 BSC

Low Phase Noise CMOS XO (48MHz to 100MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 03/ 14/00 Page 4

ORDERING INFORMATION

PhaseLink Corporation, reserves the right to make changes in its products or specifications, or bo th at any time without notice . The information fur- nished by Phaselink is believed to be accurate and reliable. Ho wever, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY : PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex- press written approval of the President of PhaseLink Corporation. PART NUMBER For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL602-03 (H) X C Order Number Marking Package Option PLL602-03OC-R PLL602-03OC TSSOP - Tape and Reel PLL602-03OC PLL602- 03OC TSSOP – Tube PLL602-03HOC-R PLL602-03HO C TSSOP - Tape and Reel PLL602-03HOC PLL602- 03HOC TSSOP – Tube PLL602-03SC-R PLL6 02-03SC SOIC - Tape and Reel PLL602-03SC PLL602-03 SC SOIC – Tube PLL602-03HSC-R PLL602-03HSC SOIC - Tape and Reel PLL602-03HSC PLL602- 03HSC SOIC - Tube TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE S=SOIC , O=TSSOP Optional High Drive