PLL130-09SC-R

PLL130-09 PLL | Alldatasheet

Document overview

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Technical content

High Speed Translator Buffer to LVDS 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 1

FEATURES

• Differential LVDS output
• Single AC coupled input (min. 100mV swing).
• Input range from DC to 1.0 GHz.
• 2.5V to 3.3V operation.
• Available in 8-Pin SOIC or 3x3mm QFN.

DESCRIPTION

The PLL130-09 is a low cost, high performance, high speed, buffer that reproduces any input fre- quency from DC to 1.0GHz. It provides a pair of differential LVDS output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from sine wave, TTL, CMOS, or PECL to LVDS. PIN CONFIGURATION (TOP VIEW) BLOCK DIAGRAM Input Amplifier LVDS_BAR REF_IN LVDS PLL130-09 GND REF_IN GND LVDS VDD LVDS_BAR VDD GND PLL130-09 LVDS_BAR LVDS GND VDD VDD VDD GND VDD GND GND GND OE^ GND GND REF_IN GND Note: ^ denotes internal pull up

High Speed Translator Buffer to LVDS 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 2 PIN DESCRIPTIONS Name 8pin SOIC Pin number 3x3mm QFN Pin number Type 1,3,7 1,2,4,5, 9,13,14,15 P Ground. VDD 5,8 7,10,11,12 P Power supply. REF_IN I Reference input signal. The frequency of this signal will be reproduced at the output (after translation to LVDS level). LVDS O LVDS True output. LVDS_BAR O LVDS Complementary output. OE N/A I Output enable (‘1’ for enable). Internal pull-up (default is ‘1’). ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS -65 150 Ambient Operating Temperature* TA -40 Junction Temperature TJ 125 Lead Temperature (soldering, 10s) 260 ESD Protection, Human Body Model kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con- ditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. AC Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Input Frequency 1000 MHz Input signal swing REF_IN input 100 mV Output Frequency 1000 MHz

High Speed Translator Buffer to LVDS 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 3 3. LVDS Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Output Differential Voltage VOD 247 355 454 mV VDD Magnitude Change ∆VOD -50 mV Output High Voltage VOH 1.4 1.6 V Output Low Voltage VOL 0.9 1.1 V Offset Voltage VOS 1.125 1.2 1.375 V Offset Magnitude Change ∆VOS RL = 100 Ω (see figure) mV Power-off Leakage IOXD Vout = VDD or GND VDD = 0V ±10 uA Output Short Circuit Current IOSD -5.7 mA 4. LVDS Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time tr 0.2 0.7 1.0 ns Differential Clock Fall Time tf RL = 100 Ω CL = 10 pF (see figure) 0.2 0.7 1.0 ns OUT OUT VOD VOS 50Ω 50Ω OUT VDIFF RL = 100Ω CL = 10pF CL = 10pF LVDS Switching Test Circuit LVDS Levels Test Circuit LVDS Transistion Time Waveform OUT OUT OUT 0V (Differential) 20% 80% 20% 80% tR tF VDIFF

High Speed Translator Buffer to LVDS 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 4

PACKAGE INFORMATION

C L A

8 PIN ( dimensions in mm )

Min. Max. A 1.47 1.73 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 4.95 E 3.80 4.00 H 5.80 6.20 L 0.38 1.27 e

1.27 BSC

E H D A e B

High Speed Translator Buffer to LVDS 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 5

ORDERING INFORMATION

PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur- nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex- press written approval of the President of PhaseLink Corporation. For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL130-09 S C Order Number Marking Package Option PLL130-09QC-R P130-09QC QFN - Tape and Reel PLL130-09QC P130-09QC QFN - Tube PLL130-09SC-R P130-09SC SOIC -Tape and Reel PLL130-09SC P130-09SC SOIC - Tube PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE S=SOIC; Q=QFN