P502-35QC | DigiCamel IC Datasheet

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PLL502-35 PLL | Alldatasheet

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Technical content

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 1

FEATURES

Selectable 750kHz to 800MHz range. Low phase noise output (@ 10kHz frequency offset, -142dBc/Hz for 19.44MHz, -125dBc/Hz for 155.52MHz, -115dBc/Hz for 622.08MHz). CMOS (PLL502-37), PECL (PLL502-35 and PLL502-38) or LVDS (PLL502-39) output. 12 to 25MHz crystal input. No external load capacitor or varicap required. Output Enable selector. Wide pull range (+/-200 ppm) Selectable 1/16 to 32x frequency multiplier. 3.3V operation. Available in 16-Pin (TSSOP or 3x3mm QFN).

DESCRIPTION

The PLL502-35 (PECL with inverted OE), PLL502-37 (CMOS), PLL502-38 (PECL), and PLL502-39 (LVDS) are high performance and low phase noise VCXO IC chips. They provide phase noise performance as low as –125dBc at 10kHz offset (at 155MHz), by multi- plying the input crystal frequency up to 32x. The wide pull range (+/- 200 ppm) and very low jitter make them ideal for a wide range of applications, including SONET/SDH and FEC. They accept fun- damental parallel resonant mode crystals from 12 to 25MHz. BLOCK DIAGRAM PIN CONFIGURATION (Top View) ^: Internal pull-up *: On 3x3 package, PLL502-35/-38 do not have SEL0 available: Pin 10 is VDD, pin 11 is GND. However, PLL502-37/-39 have SEL0 (pin 10), and pin11 is VDD. See pin assignment table for details. OUTPUT ENABLE LOGICAL LEVELS Part # OE State 0 (Default) Output enabled PLL502-38 Tri-state Tri-state PLL502-35 PLL502-37 PLL502-39 1 (Default) Output enabled OE input: Logical states defined by PECL levels for PLL502-38 Logical states defined by CMOS levels for PLL502-37/-39 PLL 502-3x VDD XIN XOUT SEL3^ SEL2^ OE VCON GND SEL0^ SEL1^ GND CLKC VDD CLKT GND GND P502-3x GND VDD CLKT CLKC XIN SEL0^ / VDD* SEL1^ VDD / GND* SEL3^ XOUT SEL2^ OE GND VCON GND GND OE Q PLL502-3x Vin Q PLL by-pass SEL PLL (Phase Locked Loop) Oscillator Amplifier integrated varicaps

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 2 FREQUENCY SELECTION TABLE SEL3 SEL2 SEL1 SEL0 Selected Multiplier Fin x 32 Fin / 8 Fin x 2 Fin / 2 Fin / 16 Fin x 4 Fin / 4 Fin x 8 Fin x 16 No multiplication Note: SEL0 is not available (always “1”) for PLL502-35 and PLL502-38 in 3x3mm package PIN DESCRIPTIONS PLL502-35 and PLL502-38 (see next page of PLL502-37/-39) Name TSSOP Pin number 3x3mm QFN Pin number Type I Crystal input. See Crystal Specification on page 4. XOUT I Crystal output. See Crystal Specification on page 4. OE I Output enable pin (see OE logic state table on page 1). VCON I Voltage Control input. GND 8,9,10,14 2,3,4,8,11 P Ground. CLKT O True output PECL CLKC O Complementary output PECL. SEL0 Not available I SEL1 I SEL2 I SEL3 I Multiplier selector pins. These pins have an internal pull-up that will default SEL to ‘1’ when not connected to GND. VDD 1, 12 6,10 P +3.3V power supply.

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 3 PIN DESCRIPTIONS PLL502-37/-39 (see previous page of PLL502-35/-38) Name TSSOP Pin number 3x3mm QFN Pin number Type I Crystal input. See Crystal Specification on page 4. XOUT I Crystal output. See Crystal Specification on page 4. OE I Output enable pin (see OE logic state table on page 1). VCON I Voltage Control input. GND 8,9,10,14 2,3,4,8 P Ground. CLKT O True output LVDS (PLL502-39) (N/C for PLL502-37) CLKC O Complementary output LVDS (PLL502-39) (CMOS out for PLL502-37). SEL0 I SEL1 I SEL2 I SEL3 I Multiplier selector pins. These pins have an internal pull-up that will default SEL to ‘1’ when not connected to GND. VDD 1, 12 6,11 P +3.3V power supply. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS -65 150 Ambient Operating Temperature* TA -40 Junction Temperature TJ 125 Lead Temperature (soldering, 10s) 260 ESD Protection, Human Body Model kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con- ditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 4 2. Crystal Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Crystal Resonator Frequency FXIN Parallel Fundamental Mode MHz Crystal Loading Rating CL (xtal) At VCON = 1.65V 9.5 pF Crystal Pullability C0/C1 (xtal) AT cut 250 Recommended ESR RE AT cut Ω Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at nomi- nal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range. 3. Voltage Control Crystal Oscillator PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS VCXO Stabilization Time * TVCXOSTB From power valid ms VCXO Tuning Range FXIN = 12 – 25MHz; XTAL C0/C1 < 250 0V ≤ VCON ≤ 3.3V 500 ppm CLK output pullability VCON=1.65V, ±1.65V ±200 ppm VCXO Tuning Characteristic 150 ppm/V Pull range linearity VCON pin input impedance 2000 kΩ VCON modulation BW 0V ≤ VCON ≤ 3.3V, -3dB kHz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 4. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Fout<24MHz 60/28/15 24MHz<Fout<96MHz 65/45/30 Supply Current, Dynamic (with Loaded Outputs) IDD PECL/LVDS/CMOS 96MHz<Fout<800MHz 100/80/40 mA Operating Voltage VDD 2.97 3.63 V Output Clock Duty Cycle @ 50% VDD (CMOS) @ 1.25V (LVDS) @ VDD – 1.3V (PECL) Short Circuit Current ±50 mA

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 5 5. Jitter Specifications PARAMETERS CONDITIONS FREQUENCY MIN. TYP. MAX. UNITS 19.44MHz 2.2 77.76MHz 4.5 155.52MHz 4.5 Period jitter RMS With capacitive decoupling be- tween VDD and GND. Over 10,000 cycles. 622.08MHz 5.0 ps 19.44MHz 77.76MHz 155.52MHz Period jitter Peak-to- Peak1 With capacitive decoupling be- tween VDD and GND. Over 10,000 cycles. 622.08MHz ps 155.52MHz 2.5 Integrated jitter RMS2 Integrated 12 kHz to 20 MHz 622.08MHz 2.5 ps 6. Phase Noise Specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS 19.44MHz -80 -108 -132 -142 -150 77.76MHz -72 -103 -122 -130 -125 155.52MHz -65 -95 -120 -125 -121 Phase Noise relative to carrier (typical) 622.08MHz -55 -85 -109 -115 -110 dBc/Hz Note: Phase Noise measured at VCON = 0V 7. CMOS Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS IOH VOH= VDD-0.4V, VDD=3.3V mA Output drive current IOL VOL = 0.4V, VDD = 3.3V mA Output Clock Rise/Fall Time 0.3V ~ 3.0V with 15 pF load 2.4 ns

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 6 8. LVDS Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Output Differential Voltage VOD 247 355 454 mV VDD Magnitude Change ∆VOD -50 mV Output High Voltage VOH 1.4 1.6 V Output Low Voltage VOL 0.9 1.1 V Offset Voltage VOS 1.125 1.2 1.375 V Offset Magnitude Change ∆VOS RL = 100 Ω (see figure) mV Power-off Leakage IOXD Vout = VDD or GND VDD = 0V ±10 uA Output Short Circuit Current IOSD -5.7 mA 9. LVDS Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time tr 0.2 0.7 1.0 ns Differential Clock Fall Time tf RL = 100 Ω CL = 10 pF (see figure) 0.2 0.7 1.0 ns OUT OUT VOD VOS 50Ω 50Ω OUT VDIFF RL = 100Ω CL = 10pF CL = 10pF LVDS Switching Test Circuit LVDS Levels Test Circuit LVDS Transistion Time Waveform OUT OUT OUT 0V (Differential) 20% 80% 20% 80% tR tF VDIFF

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 7 10. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. MAX. UNITS Output High Voltage VOH VDD – 1.025 V Output Low Voltage VOL RL = 50 Ω to (VDD – 2V) (see figure) VDD – 1.620 V 11. PECL Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Clock Rise Time tr 20%~80% of Waveform 0.6 1.5 ns Clock Fall Time tf 20%~80% of Waveform 0.6 1.5 ns OUT OUT 50Ω 50Ω PECL Levels Test Circuit PECL Transistion Time Waveform OUT OUT 50% 20% 80% tR tF VDD DUTY CYCLE 45 - 55% 55 - 45% 50% OUT OUT tSKEW PECL Output Skew 2.0V

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 8

PACKAGE INFORMATION

16 Pin TSSOP

C L A E H D e B Dimensions in ( mm ) Symbol Min. Max. A 1.20 0.05 0.15 B 0.19 0.30 C 0.09 0.20 D 4.90 5.10 E 4.30 4.50 H

6.40 BSC

L 0.45 0.75 e

0.65 BSC

16 Pin 3x3 QFN

Min. Max. Min. Max. A 0.70 0.80 0.028 0.032 b 0.18 0.30 0.007 0.012 D 2.90 3.10 0.114 0.122 E 2.90 3.10 0.114 0.122 e L 0.30 0.50 0.012 0.020 Symbol Dimension in MM Dimension in inch

0.50 BSC

0.020 BSC

0.203 REF

0.008 REF

D E ee LL bb ee LL bb A AAA

750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/19/06 Page 9

ORDERING INFORMATION

PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur- nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex- press written approval of the President of PhaseLink Corporation. For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type, Operating temperature range, shipping method PLL502-3x X X X -R Order Number Marking Package Option PLL502-35OC P502-35OC 16-Pin TSSOP (Tube) PLL502-35OC-R P502-35OC 16-Pin TSSOP (Tape and Reel) PLL502-35QC P502-35QC 16-Pin 3x3 QFN (Tube) PLL502-35QC-R P502-35QC 16-Pin 3x3 QFN (Tape and Reel) PLL502-35OCL P502-35OCL 16-Pin TSSOP (Tube) PLL502-35OCL-R P502-35OCL 16-Pin TSSOP (Tape and Reel) PLL502-35QCL P502-35QCL 16-Pin 3x3 QFN (Tube) PLL502-35QCL-R P502-35QCL 16-Pin 3x3 QFN (Tape and Reel) PLL502-37OC P502-37OC 16-Pin TSSOP (Tube) PLL502-37OC-R P502-37OC 16-Pin TSSOP (Tape and Reel) PLL502-37QC P502-37QC 16-Pin 3x3 QFN (Tube) PLL502-37QC-R P502-37QC 16-Pin 3x3 QFN (Tape and Reel) PLL502-37OCL P502-37OCL 16-Pin TSSOP (Tube) PLL502-37OCL-R P502-37OCL 16-Pin TSSOP (Tape and Reel) PLL502-37QCL P502-37QCL 16-Pin 3x3 QFN (Tube) PLL502-37QCL-R P502-37QCL 16-Pin 3x3 QFN (Tape and Reel) PLL502-38OC P502-38OC 16-Pin TSSOP (Tube) PLL502-38OC-R P502-38OC 16-Pin TSSOP (Tape and Reel) PLL502-38QC P502-38QC 16-Pin 3x3 QFN (Tube) PLL502-38QC-R P502-38QC 16-Pin 3x3 QFN (Tape and Reel) PLL502-38OCL P502-38OCL 16-Pin TSSOP (Tube) PLL502-38OCL-R P502-38OCL 16-Pin TSSOP (Tape and Reel) PLL502-38QCL P502-38QCL 16-Pin 3x3 QFN (Tube) PLL502-38QCL-R P502-38QCL 16-Pin 3x3 QFN (Tape and Reel) PLL502-39OC P502-39OC 16-Pin TSSOP (Tube) PLL502-39OC-R P502-39OC 16-Pin TSSOP (Tape and Reel) PLL502-39QC P502-39QC 16-Pin 3x3 QFN (Tube) PLL502-39QC-R P502-39QC 16-Pin 3x3 QFN (Tape and Reel) PLL502-39OCL P502-39OCL 16-Pin TSSOP (Tube) PLL502-39OCL-R P502-39OCL 16-Pin TSSOP (Tape and Reel) PLL502-39QCL P502-39QCL 16-Pin 3x3 QFN (Tube) PLL502-39QCL-R P502-39QCL 16-Pin 3x3 QFN (Tape and Reel) PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE O=TSSOP Q=QFN NONE=NORMAL PACKAGE L=GREEN PACKAGE NONE= TUBE -R=TAPE AND REEL

Product Information

P502-35QC specifications and overview.

Summary

750kHz - 800MHz Low Phase Noise Multiplier VCXO

Description

750kHz - 800MHz Low Phase Noise Multiplier VCXO

Source title P502-35QC Datasheet(PDF) - PhaseLink Corporation

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