PLL601-12 PLL | Alldatasheet
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Technical content
Dual Output PLL Clock with Selectable Odd Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1
FEATURES
Selectable multipliers (x2.5, x2.75, x3, x4.25, x5, x12.5). Crystal input range, 13MHz to 31MHz (see Se- lection Table for detailed acceptable input ranges). Maximum output frequency: 312.5MHz 2 CMOS outputs. Selectable output drive (Standard or High-Drive). Selectable REF_CLK output. 3.3V operation. Available in 14-Pin SOIC.
DESCRIPTION
The PLL601-12 is a highly flexible XO with select- able multipliers and two CMOS outputs (one of which can be selected to be REF_CLK). Thanks to Phase- Link’s advanced Phase Locked Loop technology, it allows a wide choice of selectable multipliers that permits the user to achieve useful frequencies from standard low cost crystals. It accepts fundamental parallel resonant mode crystals from 13 to 31MHz, and is ideal to generate 156.25MHz from a standard 25MHz crystal. BLOCK DIAGRAM PIN CONFIGURATION (Top View) ^: Internal pull-up. PLL 601-12 VDD XIN XOUT S3^ S2^ DRIVE_SEL^ GND S0^ S1^ REF_SEL^ CLK2/ REF_CLK VDD CLK1 GND XIN XOUT REF_SEL CLK1 CLK2/REF_CLK [S3,S0] Oscillator Amplifier PLL (Phase Locked Loop)
Dual Output PLL Clock with Selectable Odd Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2 FREQUENCY SELECTION TABLE Xtal Min Xtal Max Multiplier Reserved Reserved X 4.25 X 11 X 12 X 12.5 X 5.75 X 3 X 11.5 X 5.5 X 2.75 X 5 X 2.5 X 10 X 6 X 6.25 Note: Internal pull-ups default S3, S2, S1, and S0 to ‘1’ when not connected PIN DESCRIPTIONS Name Pin # Type 1,11 P Power Supply. XIN I Crystal input. XOUT I Crystal output. I I Multiplier selector pins. These pins have an internal pull-up that will de- fault SEL to ‘1’ when not connected to GND. DRIVE_SEL I Selector pin. If DRIVE_SEL is ‘0’, outputs are at high drive. If ‘1’ or not connected, outputs are standard drive (internal pull-up). GND 7,8 P Ground. CLK1 O CLK1 output is the output of the reference frequency (crystal) after multi- plication through the Phase Locked Loop. CLK2/REF_CLK O CLK2 or REF_CLK output (depending on REF_SEL). CLK2 is in phase and at the same frequency as CLK1. REF_CLK provides the same output as the crystal reference. REF_SEL I Selector pin. This pin if set to ‘0’ selects REF_CLK on pin 10. If not con- nected, it defaults to ‘1’ (pin 10 = CLK2). Internal pull-up. I I Multiplier selector pins. These pins have an internal pull-up that will de- fault SEL to ‘1’ when not connected to GND.
Dual Output PLL Clock with Selectable Odd Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS -65 150 Ambient Operating Temperature* TA -40 Junction Temperature TJ 125 Lead Temperature (soldering, 10s) 260 ESD Protection, Human Body Model kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con- ditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. Crystal Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Crystal Resonator Frequency FXIN Parallel Fundamental Mode (see Selection Table) MHz Crystal Loading Rating CL (xtal) At VCON = 1.65V pF Recommended ESR RE AT cut Ω 3. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Fout<30MHz 30MHz<Fout<100MHz Supply Current, Dynamic (with Loaded Outputs) IDD 15 pF load Fout >100MHz mA Operating Voltage VDD 2.97 3.63 V Short Circuit Current ±50 mA 4. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS 0.8V ~ 2.0V with 10 pF load 1.5 Output Clock Rise Time 0.3V ~ 3.0V with 15 pF load 3.7 2.0V ~ 0.8V with 10 pF load 1.5 Output Clock Fall Time 3.0V ~ 0.3V with 15pF load 3.7 ns Output Clock Duty Cycle Measured @ 1.4V
Dual Output PLL Clock with Selectable Odd Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 4 5. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Max. Absolute Jitter, peak-to-peak Short term 100 ps Max. Jitter, cycle to cycle ps Phase Noise, relative to carrier, 125Mhz(x5)
100 Hz offset
Phase Noise, relative to carrier, 125Mhz(x5) 1kHz offset 125 dBc/Hz Phase Noise, relative to carrier, 125Mhz(x5) 10kHz offset 130 dBc/Hz Phase Noise, relative to carrier, 125Mhz(x5) 100kHz offset 125 dBc/Hz
Dual Output PLL Clock with Selectable Odd Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 5
PACKAGE INFORMATION
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur- nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex- press written approval of the President of PhaseLink Corporation. For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL601-12 S C Order Number Marking Package Option PLL601-12SC P601-12SC 16-Pin SOIC (Tube) PLL601-12SC-R P601-12SC 16-Pin SOIC (Tape & Reel) PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE S=SOIC C L A
14 PIN Narrow SOIC ( mm )
Min. Max. A 1.35 1.75 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 8.58 8.69 E 3.85 3.97 H 5.80 6.20 L 0.40 1.27 e
1.27 BSC
E H D e B