PLL500-17 PLL | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 6
Technical content
Low Phase Noise VCXO (17MHz to 36MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 1 XTAL OSC OE XIN XOUT VCON VARICAP CLK
FEATURES
- VCXO output for the 17MHz to 36MHz range
- Low phase noise (-130 dBc @ 10kHz offset at 35.328MHz).
- CMOS output with OE tri-state control.
- 17 to 36MHz fundame ntal crystal input.
- Integrated high linearity variable capacitors.
- 12mA drive capability at TTL output.
- +/- 150 ppm pull range, max 5% (typ.) linearity.
- Low jitter (RMS): 2.5ps period jitter.
- 2.5 to 3.3V operation.
- Available in 8-Pin SOIC, 6-pin SOT23 GREEN / RoHS compliant packages, or DIE.
DESCRIPTION
The PLL500-17 is a low cost, high performance and low phase noise VCXO for the 17 to 36MHz range, providing less than -130dBc at 10kHz offset at 35.328MHz. The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources. Input crystal can range from 17 to 36MHz (fundamental resonant mode). BLOCK DIAGRAM PIN CONFIGURATION PLL500-171 8XIN VDD* VCON GND XOUT VDD* CLK OE^ P500-171 6XOUT GND CLK XIN VCON VDD SOIC-8 SOT23-6 ^: Denotes internal Pull-up *: Only one VDD pin needs to be connected
Low Phase Noise VCXO (17MHz to 36MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 2 DIE PAD LAYOUT DIE SPECIFICATIONS Name Value Size 39 x 32 mil Reverse side GND Pad dimensions 80 micron x 80 micron Thickness 10 mil PACKAGE PIN and DIE PAD ASSIGNMENT Pin# Die Pad Position Name SOP-8 SOT23-6 X ( µm) Y ( µm) Type Description XIN 1 6 94.183 768.599 I Crystal input pin. VDD 2 5 94.157 605.029 P VDD power supply pin. Only one VDD pin is nec- essary. VCON 3 4 94.183 331.756 I Frequency control voltage input pin. GND 4 2 94.193 140.379 P Ground pin. CLK 5 3 715.472 203.866 O Output clock pin. VDD 6 - 715.307 455.726 P VDD power supply pin. Only one VDD pin is nec- essary. OE 7 - 715.472 626.716 I Output Enable input pin. Disables the output when low. Internal pull-up enables output by default if pin is not connected to low. XOUT 8 1 476.906 888.881 I Crystal output pin. Ref Clock input. * OE (Output Enable) pin is not available in SOT-26 package, the output will always be enabled by the build in pull-up resister . Y X (0,0) (812,986) 39 mil 32 mil DIE ID: PLL500-17: C500A0404-04A
1 XIN
OE^ VDD Note: ^ denotes internal pull up
Low Phase Noise VCXO (17MHz to 36MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 3 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage V DD 4.6 V Input Voltage, dc V I -0.5 V DD +0.5 V Output Voltage, dc V O -0.5 V DD +0.5 V Storage Temperature T S -65 150 °C Ambient Operating Temperature* T A -40 85 °C Junction Temperature T J 125 °C Lead Temperature (soldering, 10s) 260 °C ESD Protection, Human Body Model 2 kV Exposure of the device under conditions beyond the limits specif ied by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. Thes e conditions represent a stress rating on ly, and functional operations of the devic e at these or any other conditions above the operational limits noted in this spec ification is not implied. * Note : Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only . 2. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Input Crystal Frequency 17 36 MHz 0.8V ~ 2.0V with 10 pF load 1.15 Output Clock Rise/Fall Time 0.3V ~ 3.0V with 15 pF load 3.7 ns Output Clock Duty Cycle Measured @ 1.4V 45 50 55 % Short Circuit Current ±50 mA 3. Voltage Control Crystal Oscillator PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS VCXO Stabilization Time * T VCXOSTB From power valid 10 ms VCXO Tuning Range XTAL C 0/C1 < 250 0V ≤ VCON ≤ 3.3V 300 ppm CLK output pullability VCON=1.65V, ±1.65V ±150 ppm VCXO Tuning Characteristic 100 ppm/V Pull range linearity 5 10 % Power Supply Rejection PWSRR Frequency change with VDD varied +/- 10% -1 +1 ppm VCON pin input impedance 2000 kΩ VCON modulation BW 0V ≤ VCON ≤ 3.3V, -3dB 45 kHz Note: Parameters denoted with an asterisk (*) represent nominal charac terization data and are not production tested to any specific limits.
Low Phase Noise VCXO (17MHz to 36MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 4 4. Jitter and Phase Noise Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS RMS Period Jitter (1 sigma – 1000 samples) With capacitive decoupling between VDD and GND. 2.5 ps Phase Noise relative to carrier 36M Hz @100Hz offset -80 dBc/Hz Phase Noise relative to carrier 36M Hz @1kHz offset -110 dBc/Hz Phase Noise relative to carrier 36M Hz @10kHz offset -130 dBc/Hz Phase Noise relative to carrier 36M Hz @100kHz offset -138 dBc/Hz Phase Noise relative to carrier 36M Hz @1MHz offset -145 dBc/Hz 5. DC Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current, Dynamic, with Loaded Outputs IDD FXIN = 36MHz Output load of 15pF 5 6 mA Operating Voltage V DD 2.25 3.63 V Output Low Voltage at CMOS level VOLC IOL = +4mA 0.4 V Output High Voltage at CMOS level VOHC IOH = -4mA V DD – 0.4 V Output drive current For V OL <0.4V or V OH >2.4V 8 9.5 mA Short Circuit Current ±50 mA VCXO Control Voltage VCON 0 V DD V 6. Crystal Specifications PARAMETERS SYMBOL MIN. TYP. MAX. UNITS Crystal Resonator Frequency F XIN 17 36 MHz Crystal Loading Rating (VCON = 1.65V) C L (xtal) 8.5 pF Maximum Sustainable Drive Level 200 µW Operating Drive Level 50 µW C0 5 pF C0/C1 250 - ESR R S 30 Ω Note : The crystal must be such that it oscillates (parallel re sonant) at nominal frequency when presented a C Load as specified abo ve. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range.
Low Phase Noise VCXO (17MHz to 36MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 5 PACKAGE INFORMATION ( GREEN PACKAGE COMPLIANT) SOIC 8L SOT23-6 L Dimension in MMSymbol Min. Max. A 1.35 1.75 A1 0.10 0.25 A2 1.25 1.50 B 0.33 0.53 C 0.19 0.27 D 4.80 5.00 E 3.80 4.00 H 5.80 6.20 L 0.40 0.89 e 1.27 BSC Dimension in MMSymbol Min. Max. A 1.05 1.35 A1 0.05 0.15 A2 1.00 1.20 b 0.30 0.50 c 0.08 0.20 D 2.80 3.00 E 1.50 1.70 H 2.60 3.0 L 0.35 0.55 e 0.95 BSC C L E H D e b A C L E H D e b A Pin1 Dot
Low Phase Noise VCXO (17MHz to 36MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 6 ORDERING INFORMATION ( GREEN PACKAGE) PhaseLink Corporation, reserves the right to make changes in its products or specifications, or bo th at any time without notice . The information fur- nished by Phaselink is believed to be accurate and reliable. Ho wever, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY : PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex- press written approval of the President of PhaseLink Corporation. For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL502-51 X C X R Part / Order Number Marking Package Option PLL500-17DC P500-17DC Die (Waffle Pack) PLL500-17SC P500-17SC 8-Pin SOIC (Tube) PLL500-17SC-R P500-17SC 8-Pin SOIC (Tape and Reel) PLL500-17SCL P500-17SCL 8-Pin SOIC GREEN (Tube) PLL500-17SCL-R P500-17SCL 8-Pin SOIC GREEN (Tape and Reel) PLL500-17TC-R P500-17TC 6-Pin SOT (Tape and Reel) PLL500-17TCL-R P500-17TCL 6-Pin SOT GREEN (Tape and Reel) PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRIAL PACKAGE TYPE D=Die S= SOIC T= SOT NONE=NORMAL PACK AGE L=GREEN PACKAGE NONE= TUBE R=TAPE AND REEL