PL623-38

PL623-38 PLL | Alldatasheet

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Technical content

Low Phase Noise XO (for 3rd O.T.) For 65-130MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 1

FEATURES

Input: 65-130MHz 3rd Overtone or fundamental Crystal Output frequency: Up to 130MHz Selectable /2, /4, /8 output dividers with 60KΩ pull up resistor on the selector pins Available output: PECL Supports 2.5V or 3.3V-Power Supply Available in die form

DESCRIPTION

PL623-38 is an XO IC specifically designed to work with high frequency 3rd overtone or fundamental crystals from 65MHz to 135MHz. It requires an external resistor for the 3rd overtone selection. Its design was optimized to tolerate higher limits of inter-electrodes capacitance and bonding capacitance to improve yield. It achieves very low current into the crystal resulting in better overall stability. It is ideal for XO applications requiring PECL output levels at high frequencies. BLOCK DIAGRAM DIE CONFIGURATION Note: ‘^’ Denotes 60kΩ pull-up resistor DIE SPECIFICATIONS Name Value Size 57.5 x 56.5 mil Reverse side GND Pad dimensions 80 micron x 80 micron Thickness 10 mil OE SELECTION Pad #12 OESEL Pad #22 OECTRL State Tri-state Output enabled (default) Output enabled (default) (default) Tri-state Pad #12: Bond to VDD to set to “1” Pad #22: Logical states defined by PECL levels OUTPUT DIVIDER SELECTOR LOGIC SEL 0 SEL1 Output No Divider Divide by 2 Divide by 4 Divide by 8 XIN XOUT OECTRL Q PL623-38 Q Oscillator Amplifier 3rd OT Resistor Y X (0,0) (1460,1435) 56.5 mil 57.5 mil VDDANA XIN XOUT GNDBUF Q Q VDDBUF GNDBUF GNDASHIELD GNDANA OECTRL OESEL (pull down) SEL0 VDDBUF GNDBSHIELD SEL1 VDDOSC GNDOSC GNDOSC VDDBUF OECTRL GNDOSC Die ID: C560A-FFFF-FP

Low Phase Noise XO (for 3rd O.T.) For 65-130MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 2 DIE PAD ASSIGNMENT Pad # Name X (µm) Y (µm) Pad Description GNDOSC 329.6 110.1 GND connection for oscillator circuitry. GNDOSC 498.3 110.0 GND connection for oscillator circuitry. GNDANA 696.2 110.0 GND connection for analog circuitry. GNDSHIELD 825.0 110.0 GND shielding connection. GNDSHIELD 973.6 110.0 GND shielding connection. GNDBUF 1150.0 109.1 GND connection for output buffer circuitry. GNDBUF 1183.6 302.2 GND connection for output buffer circuitry. Q 1183.6 452.3 PECL output. QBAR 1183.6 613.5 Complementary PECL output. VDDBUF 1182.4 745.9 VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other VDDs whenever possible. VDDBUF 1252.4 903.6 VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other VDDs whenever possible. OESEL 1252.4 1081.3 This is the selector input to choose the OE control logic to be applied, as presented on the OE SELECTION TABLE on page ‘1’. VDDBUF 1058.5 1221.6 VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other VDDs whenever possible. VDDANA 864.5 1221.6 VDD connection for analog circuitry. VDDANA should be separately decoupled from other VDDs whenever possible. VDDOSC 624.0 1222.7 VDD connection for oscillator circuitry. VDDOSC should be separately decoupled from other VDDs whenever possible. SEL1 467.1 1222.6 Output Divider Selector pin as presented on the DIVIDER SELECTOR TABLE on page ‘1’. SEL0 271.1 1222.6 Output Divider Selector pin as presented on the DIVIDER SELECTOR TABLE on page ‘1’. GNDOSC 109.4 1222.9 GND connection for oscillator circuitry. OECTRL 108.9 1062.1 Output Enable input pad. See OE SELECTION TABLE on page 1. XIN 109.0 865.8 Crystal connector pad. This pad is the input of the crystal oscillator circuitry. The crystal should be mounted as close to the IC as possible, with minimum parasitic capacitance. XOUT 108.6 358.4 Crystal connector pad. This pad is the input of the crystal oscillator circuitry. The crystal should be mounted as close to the IC as possible, with minimum parasitic capacitance. OECTRL 108.6 146.5 Output Enable input pad. See OE SELECTION TABLE on page 1.

Low Phase Noise XO (for 3rd O.T.) For 65-130MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 3 EXTERNAL COMPONENT VALUES – 3RD OVERTONE RESISTOR SELECTIONS This resistor is only required when a third overtone crystal is used. The chart below indicates the calculated and the nearest “E12” resistor values versus frequency for PL623-38. Frequency (MHz) R3OT (Ω) E12 Pick KΩ Frequency (MHz) R3OT (Ω) E12 Pick KΩ 2,162 2.2 100 1,406 1.5 67.5 2,082 2.2 102.5 1,372 1.5 2,008 2.2 105 1,339 1.2 1,875 1.8 107.5 1,308 1.2 77.5 1,815 1.8 110 1,278 1.2 1,758 1.8 112.5 1,250 1.2 82.5 1,705 1.8 115 1,223 1.2 1,654 1.8 117.5 1,197 1.2 87.5 1,607 1.5 120 1,172 1.2 1,563 1.5 122.5 1,148 1.2 92.5 1,520 1.5 125 1,125 1.2 1,480 1.5 127.5 1,103 1.2 97.5 1,442 1.5 130 1,082 1.0 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI VSS-0.5 VDD+0.5 V Output Voltage, dc VO VSS-0.5 VDD+0.5 V Storage Temperature TS -65 150 Ambient Operating Temperature TA -40 +85 Input Static Discharge Voltage Protection kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.

Low Phase Noise XO (for 3rd O.T.) For 65-130MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 4 2. Crystal Specifications 3. General Electrical Specifications PARAMETERS SYMBO L CONDITIONS MIN. TYP. MAX. UNITS Supply Current (Loaded Outputs) IDD PECL mA Operating Voltage VDD 2.25 3.63 V Output Clock Duty Cycle @ Vdd – 1.3V (PECL) Short Circuit Current ±50 mA 4. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS at 106.25MHz 2.0 Period jitter peak-to-peak at 106.25MHz With capacitive decoupling between VDD and GND. 17.0 ps Integrated jitter RMS at 106.25MHz Integrated 12 kHz to 20 MHz 0.3* ps *Measured on Agilent E5500. 5. Phase Noise Specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS Phase Noise vs. carrier with fund. crystal. 106.25MHz -55 -90 -110 -135 -145 dBc/Hz *: Note: Phase noise to be measured. Based on P520-20 product (fundamental 155MHz VCXO). Name Symbol Conditions Min. Max. Units Parallel Resonant mode 3rd Overtone N/A Load capacitance (capacitance on built-in on die seen by crystal) CL Die only, no bond wire, no package pF Inter-electrode capacitance pF Equivalent Series Resistance ESR Ω Oscillation Frequency 3rd Overtone 130 MHz

Low Phase Noise XO (for 3rd O.T.) For 65-130MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 5 8. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. MAX. UNITS Output High Voltage VOH VDD – 1.025 V Output Low Voltage VOL RL = 50 Ω to (VDD – 2V) (see figure) VDD – 1.620 V 9. PECL Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Clock Rise Time tr @20/80% - PECL 0.2 0.4 ns Clock Fall Time tf @80/20% - PECL 0.2 0.4 ns OUT OUT 50Ω 50Ω PECL Levels Test Circuit PECL Transistion Time Waveform OUT OUT 50% 20% 80% tR tF VDD DUTY CYCLE 45 - 55% 55 - 45% 50% OUT OUT tSKEW PECL Output Skew 2.0V

Low Phase Noise XO (for 3rd O.T.) For 65-130MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 6

ORDERING INFORMATION

PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PL623-38 D X Order Number Marking Package Option PL623-38DC P623-38 Waffle Pack PART NUMBER TEMPERATURE C= COMMERCIAL I= INDUSTRIAL PACKAGE TYPE D=DIE